* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Download operational amplifier design with rail to rail supply voltage output
Josephson voltage standard wikipedia , lookup
Analog-to-digital converter wikipedia , lookup
Tektronix analog oscilloscopes wikipedia , lookup
Index of electronics articles wikipedia , lookup
Oscilloscope history wikipedia , lookup
Integrated circuit wikipedia , lookup
Oscilloscope types wikipedia , lookup
Integrating ADC wikipedia , lookup
Surge protector wikipedia , lookup
Power MOSFET wikipedia , lookup
Wilson current mirror wikipedia , lookup
Public address system wikipedia , lookup
Regenerative circuit wikipedia , lookup
Transistor–transistor logic wikipedia , lookup
Negative feedback wikipedia , lookup
Power electronics wikipedia , lookup
Audio power wikipedia , lookup
Voltage regulator wikipedia , lookup
Resistive opto-isolator wikipedia , lookup
Wien bridge oscillator wikipedia , lookup
Schmitt trigger wikipedia , lookup
Radio transmitter design wikipedia , lookup
Switched-mode power supply wikipedia , lookup
Two-port network wikipedia , lookup
Current mirror wikipedia , lookup
Rectiverter wikipedia , lookup
Valve RF amplifier wikipedia , lookup
IJVD: 3(1), 2012, pp. 11-14 OPERATIONAL AMPLIFIER DESIGN WITH RAIL TO RAIL SUPPLY VOLTAGE OUTPUT HAVING REDUCED POWER DISSIPATION Raj Kumar Tiwari1 and Anil Kumar Shukla2 1,2 Circuit Design and Simulation Lab, Department of Physics and Electronics, Dr.R.M.L. Avadh University, Faizabad (U.P), India, 1E-mail: [email protected] 2E-mail: [email protected], Abstract: In this paper design for 1 volt rail to rail supply voltage output of operational amplifier with common mode feedback amplifier has been presented. The circuit has been simulated using BSIM4 model with 50nm CMOS process. The simulation results show that output voltages for the modified operational amplifier are swinging from 10mV to 990mV i.e. between the rail to rail supply voltages (0 to 1V). Results also show that current drawn by the modified operational amplifier is 310µA in comparison to the circuit for which it is 470 µA and thus shows the reduced power dissipation for the operational amplifier. Keywords: Operational amplifier, CMFB, power dissipation, differential amplifier. 1. INTRODUCTION In the recent years developments in the field of wireless communication and biomedical signal processing demand of analog circuits working on low supply voltages and reduced power dissipation has been increased.[1-2]. Operational amplifiers are the main analog building block required for these applications. Number of rail to rail operational amplifier design based on the complementary PMOS and NMOS transistors and constant-gm has been reported [3-5]. Several approaches have been reported for operational amplifier design by using both fully differential and pseudo-differential configurations respectively. The pseudo-differential structure requires the common mode feedback circuit (CMFB) for designing the operational amplifier [6-8]. In this paper design of a rail to rail operational amplifier has been presented. The paper is organized in the following way. Section II contains the circuit of two stage operational amplifier with common mode feed back amplifier. Section III contains the proposed circuit structure for rail to rail voltage operational amplifier. Finally section IV shows the simulation results for the operational amplifier circuits. 2. TWO-STAGE OPERATIONAL AMPLIFIER WITH CMFB AMPLIFIER Figure 1 shows the schematic of a two stage operational amplifier design with common mode feedback amplifier. In this circuit the gate-drain connected PMOS transistors behave like MOSFETs with twice the width of other PMOS transistors. The NMOS transistors which are biased from the voltage Vbias behave like MOSFETs with four times the width of the other NMOS transistors. The current flowing into all the MOSFET will be same for the equal differential amplifier inputs. When the input voltage at the positive terminal of differential amplifier is raised above the voltage at the negative terminal, all of the bias current flows into the left NMOS transistors of the differential amplifier. In this circuit the second stage of the operational amplifier operates as class AB. Capacitors of the value 50fF are used for the compensation. The common mode feedback amplifier (CMFB) used in the circuit balances the output over the entire range of the differential amplifier output voltages. 3. CIRCUIT STRUCTURE FOR RAIL TO RAIL SUPPLY VOLTAGE OUTPUT IN TWO STAGE OP-AMP WITH CMFB AMPLIFIER Figure 2 Shows the modified circuit structure for rail to rail supply voltage output. In this circuit the NMOS transistors in the output buffer of the operational amplifier are cascaded by the combination of NMOS and PMOS transistors respectively. The added transistors will operate near or in the triode region and allow the operational amplifier’s output to swing more freely. 12 Raj Kumar Tiwari and Anil Kumar Shukla Figure 1: Two -Stage Op-Amp with Common Mode Feedback Amplifier Figure 2: Circuit Structure for Rail to Rail Supply Voltage Operational Amplifier Design 4. RESULTS AND DISCUSSIONS Figure 3 shows the variation in differential output voltage of the two stage operational amplifier given by figure 1 with respect to the input voltage sweep. Simulation result shows that both the differential outputs cross at the ideal common mode voltage of 500mV. In this case outputs are swinging from 200mV to 800mV and not between rail to rail supply voltages. Figure 4 shows the variation in the difference between the differential output voltages with respect to the input voltage. Figure 5 shows variation of the derivative of the difference between the differential output voltages with respect to the input voltage and thus the gain of the operational amplifier. Figure 6 shows the current drawn by the operational amplifier and at the common mode voltage of 500mV the current drawn by the operational amplifier is 470µA. Operational Amplifier Design with Rail to Rail Supply Voltage Output Having Reduced Power Dissipation 13 Figure 3: Variation in the Differential Output Voltages with Respect to Input Voltage for the Operational Amplifier Given by Figure (1) Figure 4: Variation in the Difference between the Differential Output Voltages with Respect to Input Voltage for the Operational Amplifier Given by Figure (1). Figure 5: Variation in the Gain with Respect to Input Voltage for the Operational Amplifier Given by Figure (1). Figure 6: Variation in the Current Drawn with Respect to Input Voltage for the Operational Amplifier Given by Figure (1) Figure 7 shows the variation of differential output voltage of the modified circuit given in the figure 2. The simulation results show that the output voltages are now swinging from 10mV to 990mV i.e. between the rail to rail supply voltages (0 to 1V). Figure 8 Shows the variation in the difference between the differential output voltages with respect to the input voltage. Figure 9 Shows the variation in the gain of the modified circuit with respect to the input voltage. Simulation result shows that the modified circuit posses the higher gain. Figure 10 shows the current drawn by the operational amplifier and at the common mode voltage of 500mV the current drawn by the modified circuit of operational amplifier is approximately 310µA. It shows that the power dissipation in the modified circuit has been reduced. Figure 7: Variation in the Differential Output Voltages with Respect to Input Voltage for the Operational Amplifier Given by Figure 2. Figure 8: Variation in the Difference between the Differential Output Voltages with Respect to Input Voltage for the Operational Amplifier Given by Figure 2. 14 Raj Kumar Tiwari and Anil Kumar Shukla Figure 9: Variation in the Gain with Respect to Input Voltage for the Operational Amplifier Given by Figure (2). Figure 10: Variation in the Current with Respect to Input Voltage for the Operational Amplifier Given by Figure (2). 5. CONCLUSION [5] C.J.B. Fayomi, M. Sawan, and G.W. Roberts, “A Design Strategy for a 1-V Rail-to-Rail Input/Output CMOS Opamp”, in Proc. of the IEEE International Symposium on Circuits and Systems Conference, 639642, (2001). [6] Y. Lu, and R.H. Yao, “Low-voltage Constant-gm Rail-to-rail CMOS Operational Amplifier Input Stage”, Solid State Electronics, 52, 957-961, (2008). [7] M. Waltari, K. Halonen, “A Switched-opamp with Fast Common Mode Feedback”, ICECS ‘99, 3, 5-8 Sept. 1999, pp. 1523-1525. [8] M. Banu, J.M. Khoury, Y. Tsividis, “Fully Differential Operational Amplifiers with Accurate Output Balancing”, IEEE J.Solid-State Circuits, 23, Dec. 1988, pp. 1410-1414. [9] A.H. Maarefi, H. Parsa, Hatamkhani and D. Shiri, “A Wide Swing 1.5V Fully Differential OP-AMP Using A Rail-to-Rail Analog CMFB Circuit”, IEEE Trans. Instrum. Meas, 40, Aug. 1991, pp. 699-702. In this paper design of an operational amplifier with rail-to rail supply voltage output having reduced power dissipation has been presented. Simulation results show that for the designed operational amplifier output voltages are swinging from 10mV to 990mV which is very close to the supply voltages (0 to 1V). Results also show that current drawn by the designed operational amplifier is approximately 310µA and thus indicating the reduced power dissipation in the circuit. REFERENCES [1] Giannini V., Craninckx J., D’Amico S., Baschirotto A., “Flexible Baseband Analog Circuits for SoftwareDefined Radio Front-Ends”, Solid-State Circuits, IEEE Journal of, 42(7), pp. 1501-1512, July 2007. [2] Sandro A.P. Haddad and Wouter A. Serdijn, “Ultra Low-Power Biomedical Signal Processing: An Analog Wavelet Filter Approach for Pacemakers”, Springer, 2009. [3] A. Masoom, and K. Hadidi, “A 1.5 V Constant gm Rail-to-rail Input Stage Operational Amplifier”. in Proc. of the IEEE International Symposium on Circuits and Systems Conference, 632-635, (2005). [4] T.Y. Song, and S.L. Yan, “A Robust Rail-to-rail Input Stage with Constant gm and Constant Slew Rate using a Novel Level Shifter”, in Proc. of the IEEE International Symposium on Circuits and Systems Conference, 477-480, (2007). [10] R.J. Baker, “CMOS Circuit Design, Layout and Simulation”, 2nd edition IEEE Press Series on Microelectronic Systems, John Wiley & Sons, 1998. [11] P.E. Allen, and D.R. Holberg, “CMOS Analog Circuit Design”. Second Edition, New York: Oxford University Press, (2002). [12] A.L. Coban, P.E. Allen, and X. Shi, “Low Voltage Analog IC Design in CMOS Technology”, IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications, 42, 11, 955-958, (1995).