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Assessment Cover Sheet Complete and attach this cover sheet to your assessment before submitting Assessment Title Active Power Factor Correction Project Program Title: Bachelor of Engineering Technology Course No.: ENB6008 Course Title: Power Electronics Student Name: Ali Alsharakhat Student ID: 201201211 Tutor: John Leek Due Date: 8/1/2015 Date submitted: 8/1/2015 By submitting this assessment for marking, either electronically or as hard copy, I confirm the following: This assignment is my own work Any information used has been properly referenced. I understand that a copy of my work may be used for moderation. I have kept a copy of this assignment Do not write below this line. For Polytechnic use only. Assessor: Grade/Mark: Comments: Date of Marking: Table of Contents Abstract ................................................................................................................................................4 Objectives .............................................................................................................................................4 Part 1 ....................................................................................................................................................5 Experimental method .......................................................................................................................5 Test results without smoothing capacitor ........................................................................................5 Test results with 10,000uF smoothing capacitor .............................................................................7 Theory ...............................................................................................................................................8 Problem with low power factor........................................................................................................9 Part 2 ..................................................................................................................................................10 DCM and CCM.................................................................................................................................10 2 Table of Figures Figure 1: Part 1 circuit diagram ............................................................................................................5 Figure 2: Circuit designed by using altium ...........................................................................................6 Figure 3: Simulation results ..................................................................................................................7 Figure 4: Power triangle .......................................................................................................................8 Figure 5: Change in phase with change in load ....................................................................................8 Figure 6: Efficiency against output power plot ..................................................................................12 Figure 7: Output voltage against output power plot .........................................................................12 Table of Tables Table 1: Input measurements ..............................................................................................................5 Table 2: Output measurements ...........................................................................................................5 Table 3: Input measurements with smoothing capacitor ....................................................................7 Table 4: Output measurements with smoothing capacitor .................................................................7 Table 5: Ripple measurements with smoothing capacitor ..................................................................7 Table 6: Input measurements ............................................................................................................11 Table 7: Output measurements .........................................................................................................11 3 Abstract The aim of this project was to correct the power factor caused by a power supply. Correcting the power factor reduces the current harmonics and decreases the reactive power, which is crucial in an industrial field. The active PFC circuit was designed by calculations according to the datasheet of a power factor controller (TDA4862), built and then tested by using a power meter that records the PF. Results obtained were discussed and plotted. Objectives 4 Part 1 This part will investigate the change in power factor when the output from a bridge rectifier is connected to a capacitor. It will also investigate the change in power factor when the resistor value at the output is changed. Experimental method Figure 1: Part 1 circuit diagram On the first test, a full-wave rectifier was connected to a 24V AC power supply, and the output was connected to a 10Ω or 25Ω resistor. According to theory, the power factor on this circuit design would be unity because it is purely resistive. On the second test, a 10,000uF capacitor was added to the output of the circuit. In theory, there would be a leading power factor (current leading the voltage). Test results without smoothing capacitor Input measurements Table 1: Input measurements Input voltage Input current Input real ac Secondary ac Secondary power 10Ω 24.7V 2.26A 25Ω 25.4V 0.959A Load Resistor Input VA Power factor 55.6W 55.8 1 24.3W 25.4 1 Output measurements Table 2: Output measurements Peak input Average DC Output voltage voltage voltage ripple 10Ω 32.22V 20.5V 10.45V 51.9W 25Ω 33.3V 21.2V 10.8V 20.5W Load Resistor Power lost at 10Ω: 𝑃𝑙𝑜𝑠𝑠 = (24.7 ∗ 2.26) − 51.9 = 3.9𝑊 5 Output Power Reactive power at 10Ω:𝑃𝑟𝑒𝑎𝑐𝑡𝑖𝑣𝑒 = √55.82 − 55.62 = 4.7𝑉𝐴𝑟 Power lost at 25Ω: 𝑃𝑙𝑜𝑠𝑠 = (25.4 ∗ 0.959) − 20.5 = 3.86𝑊 Reactive power at 25Ω:𝑃𝑟𝑒𝑎𝑐𝑡𝑖𝑣𝑒 = √25.42 − 24.32 = 7.4𝑉𝐴𝑟 As this is a resistive load, the results agree with the theory because the reactive power is negligible (PF is unity) Figure 2: Circuit designed by using altium 6 Figure 3: Simulation results Test results with 10,000uF smoothing capacitor Input measurements Table 3: Input measurements with smoothing capacitor Input voltage Input current Input real ac Secondary ac Secondary power 10Ω 23.7V 4.56A 25Ω 24.6V 2.21A Load Resistor Input VA Power factor 82.6W 107.9 0.76 38.6W 54.2 0.71 Output measurements Table 4: Output measurements with smoothing capacitor Peak input Average DC Output voltage voltage voltage ripple 10Ω 28.55V 27.45V 1.7V 75.35W 25Ω 31.53V 30.7V 2.97V 37.7W Load Resistor Output Power Ripple voltage measurements Table 5: Ripple measurements with smoothing capacitor Load Resistor 7 Load Current Ripple voltage pk-pk RMS ripple voltage 10Ω 2.745A 5.49V 3.88V 25Ω 3.07A 6.14V 4.34V Peak current at 10Ω = 8.86A Peak current at 25Ω = 4.7A Frequency of ripple current = 100Hz Theory Power factor is the cosine of the phase angle between the voltage and current, which is the ratio of the real power to apparent power. The apparent power is the total supplied power and the real power is the power that produces the real work. The reactive power (lost power) is the power required to produce a magnetic field. Figure 4: Power triangle The reactive power causes the phase shift between current and voltage, which is caused by an inductive or a capacitive load in the circuit. An inductor causes the current to lag the voltage (lagging power factor) and a capacitor causes the current to lead the voltage (leading power factor). Figure 5: Change in phase with change in load 8 Problem with low power factor When the power factor is low, the reactive power would be high and leads to an increase in the required apparent power to make up for the loss. Increasing the power factor would decrease the required input power, which in turn leads to a greater efficiency. Uncorrected power factor causes power losses in a system. As power losses increase, voltage drops and harmonics occur. Excessive voltage drops and harmonics can cause overheating and premature failure of equipment. 9 Part 2 Introduction - DCM and CCM When current through an inductor falls to zero, the condition is Discontinuous Conduction Mode (DCM). When the inductor current never falls to zero, or when the rectification is synchronized, the condition is Continuous Conduction Mode (CCM). With synchronized rectification, active switches are used for rectifiers. Therefore, unless the switch turns off, the conduction mode will always be continuous. The method used in the project is DCM Advantages of CCM over DCM In DCM, the current must fall to zero before the start of the next cycle, hence low inductance values must be used. Low inductance values results in higher RMS and peak inductor currents. The DCM method causes ringing and leads to an undesirable noise at the output. Design and calculation Rsense Minimum input voltage = 𝑉𝑖𝑛𝑚𝑖𝑛 = 24 − 1 = 23𝑉 Minimum peak input voltage = 𝑉𝑖𝑛𝑝𝑘𝑚𝑖𝑛 = √2 ∗ 23 = 32.53𝑉 Minimum efficiency = 𝜂 = 0.9 Pout = 50W 2∗𝑃𝑜𝑢𝑡 2∗50 Max peak input current = 𝐼𝑖𝑛𝑝𝑘𝑚𝑎𝑥 = 𝑉𝑖𝑛𝑝𝑘𝑚𝑖𝑛∗𝜂 = 32.53∗0.9 = 3.42𝐴 Max high frequency peak current = 2 ∗ 𝐼𝑖𝑛𝑝𝑘𝑚𝑎𝑥 = 2 ∗ 3.42 = 6.84𝐴 Max current sense threshold = 𝑉𝑖𝑠𝑒𝑛𝑠𝑒𝑚𝑎𝑥 = 1.3𝑉 𝑀𝑎𝑥 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑠𝑒𝑛𝑠𝑒 𝑡ℎ𝑟𝑒𝑠ℎ𝑜𝑙𝑑 Rsense = 𝑀𝑎𝑥 ℎ𝑖𝑔ℎ 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 𝑝𝑒𝑎𝑘 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 = 0.19Ω Inductor The primary winding should have 0.1mH Steps taken to reach 0.1mH: L (at start) = 0.202mH n (turns removed) = 2 ∆L = 0.202-0.1912 = 0.0108mH ∆𝐿 2𝑛 0.0108 ∗ 10−3 2 ∗ 2 = = 𝐿 𝑁 0.202 ∗ 10−3 𝑁 N (number of turns) = 75 10 𝑁 = 75 Table 6: Input measurements Load Input voltage Input current Input power Apparent Reactive resistance (Ω) (V) (A) (W) power (VA) power (VAR) 33 22.8 2.57 56.9 58.5 13.4 37 23 2.35 53.1 54 9.8 44 23.2 2.05 47 47.7 8.1 54 23.5 1.59 37.2 37.3 3 65 23.9 1.28 30.6 30.6 1.3 87 24.4 0.93 22.7 22.7 0 100 24.2 0.82 19.9 19.9 0 Table 7: Output measurements Load resistance Output voltage Output power (Ω) (V) (W) 33 40.4 49.5 0.97 2.63 86.9 37 40.5 44.3 0.98 2.34 83.5 44 41.7 39.4 0.99 2.05 83.9 54 41.7 32.1 1 1.72 86.4 65 41.7 26.7 1 1.59 87.3 87 41.7 19.9 1 1.3 87.9 100 41.7 17.4 1 1.17 87.2 11 PF Ripple Vrms (V) Efficiency (%) Efficiency against Output Power plot 90 80 70 Efficiency (%) 60 50 40 30 20 10 0 15 20 35 30 Output Power (Watts) 25 40 45 40 45 50 Figure 6: Efficiency against output power plot Output Voltage against Output Power plot 45 40 Output Voltage (V) 35 30 25 20 15 10 5 0 15 20 25 Figure 7: Output voltage against output power plot 12 30 35 Output Power (Watts) 50 13