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Operating System Support
Raul Queiroz Feitosa
Parts of these slides are from the support material provided by W. Stallings
Objective
Objective
To present hardware support for the
Operating System.
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Outline
Outline
Operating System Overview
 Scheduling
 Memory Management
 Pentium Memory Management

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Operating System Support
Objectives and Functions
“An OS is a program that controls the execution of
application programs and acts as an interface
between the user of a computer and the computer
hardware.”
“It has two objectives:

Convenience
 Making the computer easier to use
 Efficiency
 Allowing better use of computer resources”
Stallings
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Layers and Views of a Computer System
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Operating System Services (1)
 Program creation

Facilities and services (e.g. editors, debuggers) to assist
the programmer in creating programs.
 Program execution

Do tasks necessary to execute programs (e.g. load
instructions and data into memory, initialization of I/O
devices and files)
 Access to

I/O devices
Provides a higher level interaction with I/O devices
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Operating System Services (2)
 Controlled access to

files
It worries about the details of accessing files (e.g. nature
of I/O device, storage format)
 System access

Control access to system resources avoiding misuse.
 Error detection and response

Provides a response to malfunction to minimize the
impact on program execution.
 Accounting

Monitors the performance (e.g. response time)
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O/S as a Resource Manager
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Types of Operating System(1)
Interactive
The user communicates with the program during execution
×
Batch
The user starts the programs and receives the outcome after
execution completion
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Types of Operating System (2)
Uni-programming
The processor works one program at a time
from start to completion
×
Multi-programming
The processor switches repeatedly among a
bunch of programs loaded into memory
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Outline
Outline
Operating System Overview
 Scheduling
 Memory Management
 Pentium Memory Management

Operating System Support
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Scheduling
The process concept:
A
program in execution
 The “animated spirit” of a program
 That entity to which a processor is assigned
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Scheduling
Key to multi-programming
 Long
term: determines which programs are admitted to the
system for processing (criteria: priority, execution time, I/O
requirements, etc).
 Medium term: decides which process are partially or fully
in main memory.
 Short term: decides which process will be executed by the
processor.
 I/O: decides which pending I/O request shall be handled by
an available I/O device.
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Five State Process Model
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Process Control Block
Contains information to (re)start
process execution
…
 Starting
and ending memory address
assigned to the process
 Register contents
 Outstanding I/O request, I/O devices,
files, etc
 Amount processing time, time limits,
etc..
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Scheduling Example
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Key Elements of O/S
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Process Scheduling
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Outline
Outline
Operating System Overview
 Scheduling
 Memory Management
 Pentium Memory Management

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Memory Management
Uni-program
Memory split into two parts.
 one for Operating System.
 one for currently executing program.
Multi-program
 “User”
part is sub-divided and shared among
active processes.
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Swapping
Problem:
I/O is so slow compared with CPU that even in
multi-programming system, CPU can be idle most
of the time.
Solutions:
 Increase main
memory to hold more processes
Expensive
 increasingly larger programs

 Swapping
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What is Swapping?

Long term queue of processes stored on
disk
 Processes “swapped” in as space
becomes available
 As a process completes it is moved out
of main memory
 If none of the processes in memory are
ready (i.e. all I/O blocked)



Swap out a blocked process to
intermediate queue (disk)
Swap in a ready process or a new
process
But swapping is an I/O process…
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Partitioning
fixed partitioning
 Splitting memory
into sections
to allocate to processes
(including Operating System)
 Fixed-sized partitions
Operating System
8K
Operating System
8K
8K
12K
8K
8K
8K
May not be equal size
 Process is fitted into smallest
hole that will take it (best fit)
 Some wasted memory
4K

 Leads to
variable sized
partitions
8K
16K
8K
4K
8K
12K
8K
equal-size
partitioning
unequal-size
partitioning
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Operating System Support
Variable Partitions (1)
 Allocate
exactly the required
memory to a process
 This leads to a hole at the end of
memory, too small to use

Only one small hole - less waste
 When
all processes are blocked,
swap out a process and bring in
another
 New process may be smaller than
swapped out process
 Another hole
Operating System Support
main memory
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Variable Partitions (2)
Operating
Operating
Operating
Operating
System
System
System
System
Process 1
Process 1
Process 1
Process 2
Process 2
Process 3
It starts out well, but..
Operating
Operating
Operating
System
System
System
Process 1
Process 1
Process 3
Operating
System
Process 2
Process 4
Process 4
Process 4
Process 3
Process 3
Process 3
… ends up with small holes!
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Operating System Support
Variable Partitions (3)
 Eventually have lots of
holes
(fragmentation)
 Solutions:
Coalesce - Join adjacent holes
into one large hole
 Compaction - From time to
time go through memory and
move all hole into one free
block (c.f. disk defragmentation)

main memory
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Relocation
 No
guarantee that process will load into the same place in
memory
 Instructions contain addresses


Locations of data
Addresses for instructions (branching)
 Logical
address - relative to beginning of program
 Physical address - actual location in memory (this time)
 Automatic conversion using base address
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Operating System Support
Paging







logical address space
Split memory into equal sized,
small chunks - page frames
Split programs (processes) into
equal sized small chunks - pages
Allocate the required number of
page frames to a process
Operating System maintains list
of free frames
A process does not require
contiguous page frames
Use page table to keep track
Page-by-page swapping
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physical address space
page-by-page
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Allocation of Free Frames
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Logical → Physical Addresses
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Virtual Memory
Demand paging
 Do
not require all pages of a process in memory
 Bring in pages as required!
 In consequence, more processes can be maintained in
memory!
Page fault
 Required
page is not in memory
 Operating System must swap in required page
 May need to swap out a page to make space
 Select page to throw out based on recent history
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Thrashing
 Too
many processes in too little memory
 Operating System spends all its time swapping
 Little or no real work is done
 Disk light is on all the time
 Solutions:
Good page replacement algorithms
 Reduce number of processes running
 More memory

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Bonus
 No
need to have all process in memory for it to run
 Pages can be swapped in as required
 A processes bigger than the available memory can
now run!
 Main memory is called physical memory
 User/programmer sees much bigger memory virtual memory
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Operating System Support
Translation Lookaside Buffer
 Every
virtual memory
reference causes at least
two physical memory
accesses:
logical address
Fetch page table entry
 Fetch data

hit
.
Offset
Page #
.
 Use
special cache for page
table

TLB
Frame # Offset
Page #
Frame # valid
TLB
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physical address
.
.
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TLB Operation
start
Page fault
handling routine
return to
faulted instruction
OS instructs CPU
to read the page
from disk
Page table
entry in TLB?
Access page table
Page transferred
from disk to
main memory
handling routine
no
no
Page
in main
memory?
yes
yes
Update TLB
Perform page
replacement
CPU generates
physical address
Page tables
updated
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Operating System Support
Segmentation






yes
no
CPU activates
I/O hardware
Memory
fault?
CPU checks the TLB
logical address space
Segments are pieces of contiguous
memory addresses sharing some property
(e.g. the code or data of a given
application).
Segments have variable and dynamic
sizes.
Pages are not (usually) visible to the
programmer
Segments are visible to the programmer
Usually different segments allocated to
program and data
There may be a number of program and
data segments associated to a single
application.
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physical address space
segment
by
segment
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Advantages of Segmentation
1.
2.
3.
4.
Simplifies handling of growing data structures
Lends itself to sharing among processes
Lends itself to protection
Some systems combine segmentation with
paging
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Outline
Outline
Operating System Overview
 Scheduling
 Memory Management
 Pentium Memory Management

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Pentium Address Translation Mechanism
Figures collected from Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3A:
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Pentium - Translation in segmentation
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Pentium – Segment Selector
 Selectors are
stored in so calles segment register
(CS, DS, ES, SS, GS, FS)
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Pentium - Segment Descriptor
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Pentium - Descriptor Tables
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Pentium – Segment Descriptor Cache
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Pentium - Translation in paging
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Pentium – Directory and Page Table Entries
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Petium - Address Translation
Exercise 1:
In an access of a Pentium processor neither the segment descriptor was not found in
the descritor cache nor the linear address was found in the TLB. In consequence 5
32 bit words were readen from the main memory. At that point in time




Effective Address (offset)= 00 13 9A 54h
[CS] (selector) = 53 C9h
[BASE(GDTR)]= 12 9C 00 00h
[CR3] = 23 59 70 00h
The table below describes the address and the value of each readen 32 bit words.
Complete the missing entries.
ACCESS
ADDRESS
DATA
1º
12 9C 53 C8 h
01 01 01 01 H
2º
12 9C 53 CC h
01 C0 9C 00 H
3º
23 59 70 10 h
11 23 6A 61 H
4º
11 23 64 E4 h
14 97 6E 73 H
5º
14 97 6B 55 h
15 9B 79 1A H
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Petium - Address Translation
Exercise 2:
During the execution of the instruction
MOV EAX,[EBX + ESI*2 + 4000h]
The processor accesses the memory to fetch the operand. At that point in time


[ESI] = 00 00 01 24h.
The corresponding segment descriptor = 00 C2 F3 34 27 00 00 00h.
Questions:
a)
b)
What is the maximum allowed content of register EBX (32 bits)? (1F FF BD B8 h)
Assuming that EBX = 01 23 45 78h, what is the linear address?
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Petium - Address Translation
Exercise 3:
The Pentium processor did not find the linear address in TLB, so that 3 32 bits
words have been accessed sequentialy. The table below shows the accessed
addresses. You are asked to complete the missing information, i.e., the readen
values. What is the content of CR3 register and the linear address in this case? Use
‘X’ for hexadecimal digits that can not be infered.
ACCESS
ADDRESS
DATA
1º
3A 27 93 54
17 69 3X XX h
2º
17 69 30 A8
43 71 6X XX h
3º
43 71 62 32
XX XX XX XX h
CR3 
3A 27 90 00 h
Linear Address 
35 42 A2 32 h
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Operating System Support
Petium - Address Translation
Exercise 4:
A Pentium processor operating in protected mode accesses 4 32 bit words to
determine the physical address. The table below contains information regarding
these accesses. What is the effective address (offset) in this case?
Segment Descriptor
00 C0 FF 48 12 34 FF FF
Effective Address
Address of Directory Entry:
54 78 37 40
73 DC 59 4C h
Address of the Page Table Entry
02 45 59 18
Physical Address
12 94 3B 80
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Petium - Address Translation
Exercise 5:
In a Pentium processor the base address of a segment is 67 48 34 C0 H, its size is
00 34 10 00h and the corresponding linear address is equal to 78 9C D5 4E H.
Please answer the questions below.
What is the segment descriptor?
67
The linear address is not in the TLB. What
are the address in the accesses to ....?
Directoy:
X0
Page Table:
Page:
XX
48
34
C0
03
41
XX XX X7 88 h
XX XX X7 34 h
XX XX X5 4E h
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Petium - Address Translation
Exercise 6:
A Pentium processor accessed the directory, the page table in order to compute the
physical address. The addresses were respectively 01 23 45 68 h, A9 87 65 40 h
and 45 67 76 54 h. Compute the linear address.
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Text Book References
The topics are covered in
 Stallings
chapter 8
 Parhami
chapter 20
 Tanenbaum
section 6.1
 Intel® 64 and IA-32 Architectures Software Developer’s
Manual Volume 3A available at
http://www.intel.com/Assets/PDF/manual/253668.pdf
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Operating System Support
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