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Transcript
NOTE: Originally written by Prof. J. McNeill
Modified 2/16/05 by S. J. Bitar
ECE 2201
LAB 5 - BJT Fundamentals PRELAB
P1.  Meter
The circuit of Figure P5-1 can be used to measure the current gain  of the BJT. Determine
values for resistors R1 and R2 to meet the following conditions:
 The base current IB ≈ 10µA (choose R1 as the closest standard value from your lab kit)
 The voltage drop across R2, expressed in mV, gives the BJT current gain . That is,
VDVM  (1mV) 
Note that R2 will not be a standard value; we'll worry about that in lab...
+
+10V
R2
R1
IC
C
IB
Q1
2N3904
Figure P5-1.
1
E
+
VDVM
-
EE2201 - LAB 5
BJT Fundamentals and Applications:
iC-vBE Characteristic
Analog Amplifier Applications
PURPOSE:
The purpose of this laboratory assignment is to investigate the NPN bipolar junction transistor
(BJT). Upon completion of this lab you should be able to:
 Measure the current gain  of the BJT.
 Extract BJT parameter IS from vBE-iC measurements.
 Apply the BJT in a linear amplifier application in moderate gain configuration (common
emitter with emitter degeneration resistor RE)
 Use a large-value capacitor to short the emitter to ground at signal frequencies to use the BJT
in a linear amplifier application with a high gain configuration (common emitter)
 Use a large-value capacitor to couple an AC signal to the input of the common emitter
amplifier
MATERIALS:





ECE Lab Kit
DC Power Supply
DVM
Function Generator
Oscilloscope
NOTE: Be sure to record ALL results in your laboratory notebook.
2N3904 BJT terminal designation reminder:
COLLECTOR
BASE
EMITTER
(TOP VIEW)
2
BIPOLAR JUNCTION TRANSISTOR (BJT): iC-vBE CHARACTERISTIC
L1. Build the BJT circuit shown in Fig. 5-1, using the 2N3904 NPN BJT. By using different
values for resistors RB and RC, you will measure the base current iB, collector current iC, and
base-emitter voltage vBE over a range of DC collector currents.
Note: Be sure to measure the actual voltage of the +10V power supply for VCC.
Note: Capacitors CBP1 and CBP2 are open at DC, and don’t affect your measurements of DC
current or voltage. Their purpose is to filter out high frequency noise that can be coupled
into this (high gain) circuit when measurements are being made.
VCC = +10V
+
+10V
IR
CBP1
0.1µF
RC
IL
RB
IC
IB
B
+
VBE
-
CBP2
0.1µF
+
VRC
-
C
Q1
2N3904
E
Figure 5-1.
L2. Vary RB and RC using the range of values shown in the table below. For each set of values,
measure VBE and VRC. Calculate IB and IC , and  using:
(1) IC=VRC/RC
(2) IB=(VCC-VBE)/RB
(3)  = IC/IB
Note that Eq. (2) assumes IL is negligible, so that IC≈IR.
Nominal
RB
Actual (Measured)
RC
43 kΩ
* 25 Ω
100 kΩ
51 Ω
200 kΩ
100 Ω
430 kΩ
200 Ω
RB
RC
Measured
VRC
1 MΩ
510 Ω
* for 25Ω, use two 51Ω in parallel.
3
VBE
Calculated
IC
IB

 Meter
L3. Modify the circuit of Figure 5-1 by changing the values of RB and RC to implement your 
meter design from the prelab.
TRIMMING
For the resistor value that is not standard, you will need to trim to an exact value by using
series and parallel combination of resistors in your kit. Since you know from your results in
part L2 what the correct value of  is, you can start calibration of your meter circuit by
making the collector resistor a few percent higher than the “exact” value. This will give a 
reading on the DVM higher than the correct . Then you can adjust (trim) by adding
resistance in parallel to reduce the total collector resistance until the correct  is displayed.
Trimming hint: it can be shown that (for large x), if a resistor of value R needs to be reduced
to a value (1 - 1/x)R, this can be achieved by adding a resistor of value xR in parallel. For
example, to reduce a resistor value R by 5%, add a resistor of value 20R in parallel. You
can do the same thing with a series trim, but inserting resistors in series requires you to
break connections – not easy to do on a printed circuit board in a production environment!
An additional advantage to trimming from the output is that you will also take into account
the effect of tolerance errors on the value of RB, as well as variations in VBE away from the
0.7V value assumed in the prelab.
L4. Compare the performance of your trimmed circuit to the measurements from part L2. How
do the resistor values you used in lab compare to the design values from prelab?
4
COMMON EMITTER AMPLIFIER WITH DEGENERATION RESISTOR RE
L5. Build the amplifier circuit shown in Fig. 5-2. Note that the supply voltage is increased to
+15V (measure the exact value to use in IC calculations).
VCC = +15V
RC
20kΩ
+
+15V
VOUT
C BP1
0.1µF
IC
Vin
(0.1V)sin2 (10kHz)t
+
+
VB
E
-
-
+
Q1
2N3904
VE
RE
1k
Ω
+1.0V
FUNCTION
GENERATOR
Figure 5-2
L6. For the input signal source (a 10kHz, 0.1V peak sine wave riding on a 1.0V DC level) use
the function generator with the DC offset enabled (pull out the DC OFFSET knob). Display
vIN on oscilloscope channel 1; set the horizontal time scale to show a few cycles of the sine
wave. To set the DC offset level, set the scope to DC coupling; view the signal at 0.5V/div,
and adjust the function generator offset until the DC level of the signal is 1.0V. To set the
peak amplitude, go to AC coupling on the scope and “zoom in” to a vertical resolution of
50mV/div, and adjust the function generator amplitude until the peak level of the signal is
0.1V (peak-to-peak level of 200mV).
DC BIAS LEVEL
L7. Display vOUT on oscilloscope channel 2. Set both channels to 1V/div and adjust the vertical
position so that 0V (ground) is at the bottom of the screen.
L8. Measure the average DC level of the input and output voltages (either using the DVM or the
MEAN function of the scope MEASURE function). Determine the DC operating point (bias
current) IC for the BJT.
5
BASE-EMITTER JUNCTION OPERATION (0.7V VBE)
L9. Change scope channel 2 to show the emitter voltage VE. You should see it “follow” the base
voltage vIN, offset by the 0.7V drop of the base-emitter junction. We’ll take advantage of
this property in the “emitter follower” configuration, a unity-voltage-gain buffer that
provides current gain so that a high-impedance source can drive a low-impedance load.
SMALL SIGNAL GAIN
L9. Change scope channel 2 back to show vOUT. Verify the 180° phase shift (inversion of the
sine wave) from input to output.
L10. Measure the input and output signal peak-to-peak signal amplitudes vin(p-p) and vout(p-p). To
get an accurate measurement, you may want to go to AC coupling and “zoom in” to a finer
vertical scale. Note the shape of the output waveform – is it a clean sinusoid, or is there
distortion?
Measurement note: The peak-to-peak measurement function will give a slightly larger value
than the true peak-to-peak amplitude, due to noise (“fuzz”) on the waveforms. Instead, use
the cursors and eyeball the cursor locations to the “middle” of the fuzz.
L11. Determine the measured small-signal voltage gain av (calculated as av = vout(p-p)/vin(p-p).
Compare to the theoretically predicted value RC/RE.
USE OF CAPACITOR TO SHORT EMITTER TO SIGNAL GROUND
L12. Go back to DC coupling of both channels for vIN and vOUT. Set both channels to 2V/div and
adjust the vertical position on each so that 0V (ground) is at the bottom of the screen.
VCC = +15V
RC
20kΩ
+
+15V
VOUT
C BP1
0.1µF
IC
Vin
(0.1V)sin2 (10kHz)t
+
+
VB
E
-
-
+
Q1
2N3904
VE
RE
1k
Ω
+1.0V
FUNCTION
GENERATOR
+
ADD
Figure 5-3
6
CE
100µF
L13. Add a 100µF capacitor in parallel with RE as shown in Figure 5-3. Be sure to observe
correct polarity! You should see the output waveform amplitude increase significantly, due
to the increase in signal gain. The output amplitude should exceed the linear range of the
amplifier, causing the output “sine wave” to be severely distorted (“clipped”). Measure the
maximum and minimum voltage levels at the output, and (in your writeup) identify the
transistor operating regions corresponding to each limit.
AMPLIFIER APPLICATION: COMMON EMITTER
L14. Build the amplifier circuit shown in Fig. 5-4.
VCC =
+15V
RB2
43k
Ω
+
+15V
CBP
0.1µF
1
RC
20k
Ω
VOUT
IC
CB
100µF
RS1
1k
Ω
Vs +
(0.5V)sin2(10kHz)t
-
Vin
Q1
2N3904
+
RS2
10
Ω
FUNCTION
GENERATOR
VE
RB1
3k Ω
RE
1k
Ω
+
CE
100µF
Figure 5-4
INPUT ATTENUATOR
L15. Since the gain of this amplifier is over 100, it is necessary to make a very small input
voltage (a few millivolts peak-to-peak) to avoid clipping at the output. Resistors RS1 and
RS2 form a 100:1 attenuator, so a 0.5V peak sine wave at the function generator produces a
5mV peak sine wave at Vin. Since the 10mV peak-to-peak signal amplitude at the amplifier
input Vin may be too small to measure directly on the oscilloscope, you’ll measure it
indirectly by measuring the amplitude of Vs at the function generator output, and dividing by
the attenuation ratio of the voltage divider network (measure RS1 and RS2 to get the correct
actual values for the voltage divider expression).
7
DC BIAS NETWORK
L16. Resistors RB1 and RB2 form a voltage divider network that sets the DC bias level (operating
point) at VIN equal to approximately 1.0V (the same as the amplifier circuit from the
previous section). The small signal input is coupled to Vin using capacitor CB (be sure to
observe correct polarity!). Since the capacitor is open at DC, coupling the input signal in
this way allows the designer to treat the DC bias and AC signal amplification problems
separately, thus simplifying the design process.
DC BIAS LEVEL
L17. Display vIN and vOUT on oscilloscope channels 1 and 2. Set both channels to 1V/div and
adjust the vertical position so that 0V (ground) is at the bottom of the screen.
L18. Measure the average DC level of the input and output voltages (either using the DVM or the
MEAN function of the scope MEASURE function). Determine the DC operating point (bias
current) IC for the BJT.
EMITTER “SHORTED” TO SIGNAL GROUND BY CE
L19. Change scope channel 1 to show the emitter voltage VE. Even as the output voltage varies
significantly, you should see a constant voltage (no signal activity) at VE. This indicates that
the presence of capacitor CE has “shorted” the emitter voltage to signal ground.
SMALL SIGNAL GAIN
L20. Change scope channel 1 to show the function generator output vS. Verify the 180° phase
shift (inversion of the sine wave) from input to output.
L21. Measure the input and output signal peak-to-peak signal amplitudes vin(p-p) and vout(p-p). To
get an accurate measurement, you may want to go to AC coupling and “zoom in” to a finer
vertical scale. Note the shape of the output waveform – is it a clean sinusoid, or is there
distortion?
Measurement note: you will have to determine the input amplitude vin(p-p) indirectly as
described in L15.
L22. Determine the measured small-signal voltage gain av (calculated as av = vout(p-p)/vin(p-p).
Compare to the theoretically predicted value RC/re.
8
EXCEEDING “SMALL SIGNAL” LINEAR RANGE
L23. Go back to DC coupling of both channels for vIN and vOUT. Set both channels to 2V/div and
adjust the vertical position on each so that 0V (ground) is at the bottom of the screen.
L24. Change the input waveform from a sine wave to a triangle wave. This should allow you to
see nonlinear distortion more clearly. Increase the input amplitude and note how the
nonlinearity (distortion) of the output waveform gets worse as amplitude increases. Even
before the severe distortion of clipping, you should see significant nonlinearity for large
output waveforms. In your writeup, explain this behavior in light of the small-signal linear
approximation.
L25. Increase the input amplitude until the output exceeds the linear range of the amplifier,
causing clipping. Measure the maximum and minimum voltage levels at the output, and (in
your writeup) identify the transistor operating regions corresponding to each limit.
NOTE: If possible, save yourself some time next week and DO NOT DISASSEMBLE THIS
CIRCUIT! WE WILL BE MEASURING ITS LIMITATIONS IN THE FREQUENCY
DOMAIN (BANDWIDTH) IN LAB 6
9
LAB WRITEUP
W1. Plot IC as a function of vBE on a semilog scale. Determine the scale current parameter IS
(assume n=1), and plot the prediction of the IC=ISeVBE/Vt model on the same axes as your
data. How well does the model agree with your data?
W2. Plot your calculated  as a function of IC. How constant is the “constant” ? Over the
current range for which you took measured data, what (constant) value for  would you use,
and how much error would you make in assuming  constant?
 Meter
W3. Compare the performance of your trimmed circuit to the measurements from part L2. How
do the resistor values you used in lab compare to the design values from prelab?
COMMON EMITTER WITH EMITTER DEGENERATION RESISTOR RE
W4. Analysis - From a large signal analysis of the circuit in Figure 5-2, determine the
theoretically predicted DC operating point for collector current and the average DC level of
the input and output voltages.
W5. Compare your measured results from L8 to the theoretical prediction of W4.
BASE-EMITTER JUNCTION OPERATION (0.7V VBE)
W6. Plot (as a function of time) the base voltage vIN and the emitter voltage VE from your
oscilloscope observation in lab part L8. Did you observe VE “following” the base voltage
vIN, offset by the 0.7V drop of the base-emitter junction?.
SMALL SIGNAL GAIN
W7. Plot vIN and vOUT (as a function of time) from your oscilloscope observation in lab part L9.
Verify the 180° phase shift (inversion of the sine wave) from input to output.
W9. Analysis - From a small signal analysis of the circuit in Figure 5-2, determine the
theoretically predicted output peak-to-peak signal amplitude vout(p-p) (given your measured
input peak-to-peak signal amplitude vin(p-p)) and the small signal gain av.
W10. Compare your measured results for output peak-to-peak signal amplitudes vout(p-p) and
small-signal voltage gain av Compare to your theoretically predicted values from W9.
W11. Comment on the shape of the output waveform – was it a clean sinusoid, or was there
distortion?
10
USE OF CAPACITOR TO SHORT EMITTER TO SIGNAL GROUND
W12. When the 10µF capacitor was added in parallel with RE (as shown in Figure 5-3), how did
circuit operation change? Describe qualitatively and quantitatively.
W13. Plot the output waveform, identifying the measured maximum and minimum voltage
clipping levels. Identify the transistor operating regions corresponding to each limit.
AMPLIFIER APPLICATION: COMMON EMITTER
DC BIAS LEVEL
W14. Analysis - From a large signal analysis of the circuit in Figure 5-4, determine the
theoretically predicted DC operating point for collector current and the average DC level of
the input and output voltages.
W15. Compare your measured results from L18 to the theoretical prediction of W14.
SMALL SIGNAL GAIN
W16. Plot vIN and vOUT (as a function of time) from your oscilloscope observation in lab part
L20. Verify the 180° phase shift (inversion of the sine wave) from input to output.
W17. Analysis - From a small signal analysis of the circuit in Figure 5-4, determine the
theoretically predicted output peak-to-peak signal amplitude vout(p-p) (given your measured
input peak-to-peak signal amplitude vin(p-p)) and the small signal gain av. Remember that
you will have to determine the input amplitude vin(p-p) indirectly as described in L15.
W18. Compare your measured results for output peak-to-peak signal amplitudes vout(p-p) and
small-signal voltage gain av Compare to your theoretically predicted values from W17.
W19. Comment on the shape of the output waveform – was it a clean sinusoid, or was there
distortion? How did the distortion compare to the output of the circuit with degeneration
resistor RE in part W11?
EXCEEDING “SMALL SIGNAL” LINEAR RANGE
W20. Plot a representative waveform showing distortion of the output triangle wave for large
waveform amplitudes.
Explain this behavior in light of the small-signal linear
approximation.
W21. Plot the output waveform, identifying the measured maximum and minimum voltage
clipping levels. Identify the transistor operating regions corresponding to each limit.
11