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LT Adjustable.
A Single Resistor Low Dropout Regulator FEATURES
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DESCRIPTION
The LT is a .A low dropout linear regulator that can be paralleled to increase output current
or spread heat in surface mounted boards. Architected as a precision current source and
voltage follower allows this new regulator to be used in many applications requiring high
current, adjustability to zero, and no heat sink. Also the device brings out the collector of the
pass transistor to allow low dropout operation down to millivolts when used with multiple
supplies. A key feature of the LT is the capability to supply a wide output voltage range. By
using a reference current through a single resistor, the output voltage is programmed to any
level between zero and V. The LT is stable with .F of capacitance on the output, and the IC
uses small ceramic capacitors that do not require additional ESR as is common with other
regulators. Internal protection circuitry includes current limiting and thermal limiting. The LT
regulator is offered in the lead MSOP with an exposed pad for better thermal characteristics,
a mm mm DFN, lead DDPak, TO and a simpletouse lead SOT version.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
VLDO and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
Outputs May be Paralleled for Higher Current and Heat Spreading Output Current .A Single
Resistor Programs Output Voltage Initial Accuracy of SET Pin Current Output Adjustable to V
Low Output Noise VRMS Hz to kHz Wide Input Voltage Range .V to V Low Dropout Voltage
mV Except SOT Package ltmV Load Regulation lt./V Line Regulation Minimum Load Current
.mA Stable with .F Minimum Ceramic Output Capacitor Current Limit with Foldback and
Overtemperature Protected Available in Lead MSOP , mm mm DFN, Lead DDPak, TO and
Lead SOT
APPLICATIONS
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High Current All Surface Mount Supply High Efciency Linear Regulator Post Regulator for
Switching Supplies Low Parts Count Variable Voltage Supply Low Output Voltage Power
Supplies
TYPICAL APPLICATION
Variable Output Voltage .A Supply
VIN .V TO V IN VCONTROL LT
Set Pin Current Distribution
N
F SET
OUT VOUT .F . . . . . SET PIN CURRENT DISTRIBUTION A
G
RSET VOUT RSET A
TAa
fb
LT ABSOLUTE MAXIMUM RATINGS Note All Voltages Relative to VOUT
VCONTROL Pin Voltage ..................................... V, .V IN Pin Voltage
................................................ V, .V SET Pin Current Note .....................................mA SET
Pin Voltage Relative to OUT ..........................V Output ShortCircuit Duration ..........................
Indenite Operating Junction Temperature Range Notes , .......................................... C to C
Storage Temperature Range.................. C to C Lead Temperature Soldering, sec MSE, Q, T
and ST Packages Only.................... C
PIN CONFIGURATION
TOP VIEW FRONT VIEW OUT OUT OUT SET IN IN NC VCONTROL TOP VIEW OUT OUT
OUT SET IN IN NC VCONTROL TAB IS OUT Q PACKAGE LEAD PLASTIC DDPAK TJMAX
C, JA C/W, JC C/W IN VCONTROL OUT SET NC
MSE PACKAGE LEAD PLASTIC MSOP TJMAX C, JA C/W, JC C/W EXPOSED PAD PIN IS
OUT, MUST BE SOLDERED TO PCB
DD PACKAGE LEAD mm mm PLASTIC DFN TJMAX C, JA C/W, JC C/W EXPOSED PAD
PIN IS OUT, MUST BE SOLDERED TO PCB FRONT VIEW TAB IS OUT T PACKAGE
LEAD PLASTIC TO
FRONT VIEW IN VCONTROL OUT SET NC ST PACKAGE LEAD PLASTIC SOT IN IS
VCONTROL AND IN TIED TOGETHER TJMAX C, JA C/W, JC C/W TAB IS OUT IN OUT
SET
TJMAX C, JA C/W, JC C/W
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING LTEDDPBF LTEDDTRPBF LCBN
LTEMSEPBF LTEMSETRPBF LTCBM LTEQPBF LTEQTRPBF LTEQ LTETPBF
LTETTRPBF LTET LTESTPBF LTESTTRPBF LEAD BASED FINISH TAPE AND REEL
PART MARKING LTEDD LTEDDTR LCBN LTEMSE LTEMSETR LTCBM LTEQ LTEQTR
LTEQ LTET LTETTR LTET LTEST LTESTTR Consult LTC Marketing for parts specied with
wider operating temperature ranges. PACKAGE DESCRIPTION Lead mm mm Plastic DFN
Lead Plastic MSOP Lead Plastic DDPak Lead Plastic TO Lead Plastic SOT PACKAGE
DESCRIPTION Lead mm mm Plastic DFN Lead Plastic MSOP Lead Plastic DDPak Lead
Plastic TO Lead Plastic SOT TEMPERATURE RANGE C to C C to C C to C C to C C to C
TEMPERATURE RANGE C to C C to C C to C C to C C to C
For more information on lead free part marking, go to http//www.linear.com/leadfree/ For
more information on tape and reel specications, go to http//www.linear.com/tapeandreel/
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CSET . TYP MAX . VCONTROL V to V. VCONTROL V. ILOAD mA VOS VIN V to V. COUT
F. The LT EGrade is tested at TA C. Both parameters are specied with respect to the output
voltage. ILOAD mA VOS VIN V to V. VSET V. .V. . The specications represent the minimum
inputtooutput differential voltage required to maintain regulation.F. ISET ILOAD mA to . . The
LT is tested and specied under pulse load conditions such that TJ TA. . .VPP. dropout is
caused by either minimum control voltage VCONTROL or minimum input voltage VIN.A.F Hz
f kHz f Hz. DDPak and T Package Minimum Load Current Notes . . VCONTROL V to V.A
VOS ILOAD mA to . DDPak and T Package Load Regulation Line Regulation Note DFN and
MSOP Package Line Regulation Note SOT. Hz f kHz.A Note VOS DFN and MSOP Package
SOT. TJ C VIN V. . . Note Minimum load current is equivalent to the quiescent current of the
part. .A Note ISET VIN V to V.A ILOAD mA ILOAD . DDPak and T Package ILOAD mA
ILOAD . fb . Therefore. . . Continuous operation above the specied maximum operating
junction temperature may impair device reliability. VCONTROL V to V.A. VCONTROL . Note
Unless otherwise specied. CSET . Note Load regulation is Kelvin sensed at the package.
ILOAD mA VIN VCONTROL V VIN VCONTROL V DFN and MSOP Package VIN
VCONTROL V SOT. Note Output noise is lowered by adding a small capacitor across the
voltage setting resistor. all voltages are with respect to VOUT. mA ILOAD .A VIN V. .V
ILOAD . Thermal Regulation. Note For the LT. characterization and correlation with statistical
process controls. output noise is then equal to error amplier noise see Applications
Information section. Note The SOT package connects the IN and VCONTROL pins together
internally. COUT . . ILOAD mA ISET VIN V to V. This current will track output current with
roughly a ratio. Exposure to any Absolute Maximum Rating condition for extended periods
may affect device reliability and lifetime. otherwise specications are at TA C. . DDPak and T
Package. VRIPPLE . Junction temperature will exceed the maximum operating junction
temperature when overtemperature protection is active. Line and load regulation
specications are not applicable when the device is in current limit. . Operation at voltages for
both IN and VCONTROL is allowed up to a maximum of V as long as the difference between
input and output voltage is below the specied differential VINVOUT voltage. IOUT mA
CONDITIONS ISET VIN V. These diodes only carry current under transient overloads.
VCONTROL . test conditions for this pin follow the VCONTROL conditions listed in the
Electrical Characteristics Table. Since all quiescent and drive current is delivered to the
output of the part. Note This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Note The VCONTROL pin current
is the drive current required for the output transistor. ILOAD mA. Note Current limit may
decrease to zero at inputtooutput differential voltages VINVOUT greater than V DFN and
MSOP package or V SOT.LT ELECTRICAL CHARACTERISTICS PARAMETER SET Pin
Current Output Offset Voltage VOUT VSET VIN V. VCONTROL V. The minimum value is
equal to the quiescent current of the device. ILOAD . Note MIN . Performance at C and C is
assured by design.A ILOAD mA ILOAD . . Note SET pin is clamped to the output with diodes.
VOUT . the minimum load current is the minimum current required to maintain regulation.
UNITS A A mV mV mV mV nA mV nA/V mV/V nA/V mV/V A mA mA V V mV mV mA mA A
VRMS nARMS dB dB dB /W VCONTROL Dropout Voltage Note VIN Dropout Voltage Note
VCONTROL Pin Current Current Limit Error Amplier RMS Output Noise Note Reference
Current RMS Output Noise Note Ripple Rejection . .F f kHz f MHz ms Pulse l l l l l l l l l l l l l l l
The l denotes the specications which apply over the full operating temperature range.V. .
ISET Note Stresses beyond those listed under Absolute Maximum Ratings may cause
permanent damage to the device. Adding this capacitor bypasses the voltage setting resistor
shot noise and reference current noise. VCONTROL V to V.
. . . . . TEMPERATURE C G Offset Voltage Distribution . . VOS DISTRIBUTION mV G
INPUTTOOUTPUT VOLTAGE V SEE NOTE IN ELECTRICAL CHARACTERISTICS TABLE
G . . . . VIN. . . . . TEMPERATURE C G Dropout Voltage Minimum IN Voltage TJ C . .
OFFSET VOLTAGE mV . . Offset Voltage TJ C TJ C . . . . . SET PIN CURRENT
DISTRIBUTION A G Offset Voltage VOUT VSET IL mA . . . . SET PIN CURRENT A . N
OFFSET VOLTAGE mV . . . . . . OUTPUT CURRENT A . . . . MINIMUM IN VOLTAGE VIN
VOUT mV MINIMUM LOAD CURRENT mA . . G CHANGE IN REFERENCE CURRENT
WITH LOAD nA VIN. . G Load Regulation CHANGE IN OFFSET VOLTAGE WITH LOAD mV
. CONTROL VOUT . . .LT TYPICAL PERFORMANCE CHARACTERISTICS Set Pin Current
. . . CONTROL VOUT V TJ C SEE NOTE IN ELECTRICAL CHARACTERISTICS TABLE fb .
. Offset Voltage ILOAD mA . N OFFSET VOLTAGE mV .V . TEMPERATURE C G Set Pin
Current Distribution . . . . . . . . .A VIN VOUT V CHANGE IN REFERENCE CURRENT
TEMPERATURE C G Minimum Load Current . . CHANGE IN OFFSET VOLTAGE VOUT
VSET ILOAD mA TO . . LOAD CURRENT A . .
LOAD CURRENT mA . .V ILOAD mA COUT . .A ILOAD . G MINIMUM CONTROL
VOLTAGE VCONTROL VOUT V Dropout Voltage Minimum IN Voltage Dropout Voltage
Minimum VCONTROL Pin Voltage Dropout Voltage Minimum VCONTROL Pin Voltage . . . .F
IN/CONTROL VOLTAGE V VOUT .F CERAMIC TIME s G SEE NOTE IN ELECTRICAL
CHARACTERISTICS TABLE G Load Transient Response OUTPUT VOLTAGE DEVIATION
mV OUTPUT VOLTAGE DEVIATION mV Line Transient Response INPUT VOLTAGE V
OUTPUT VOLTAGE V .F CERAMIC CSET . . . . . VIN V VOUT V TEMPERATURE C G
Current Limit . . OUTPUT CURRENT A . . . .F CERAMIC RSET k CSET RLOAD COUT . . .V
CSET .A ILOAD mA TJ C ILOAD mA ILOAD mA Current Limit . . TJ C . TurnOn Response
LOAD CURRENT A . CURRENT LIMIT A CURRENT LIMIT A .F CERAMIC TIME s G TIME
s G TIME s G fb . TEMPERATURE C G ILOAD . . . .LT TYPICAL PERFORMANCE
CHARACTERISTICS MINIMUM CONTROL VOLTAGE VCONTROL VOUT V MINIMUM IN
VOLTAGE VIN VOUT mV TEMPERATURE C G . VIN VCONTROL V VOUT . . . . . . . . .V
COUT F CERAMIC CSET . TJ C . . . INPUTTOOUTPUT DIFFERENTIAL V MSOP AND DFN
SOT. . . . .F VIN VCONTROL V COUT F CERAMIC COUT . . . DDPAK AND TO OUTPUT
VOLTAGE DEVIATION mV TJ C Load Transient Response VOUT .
F TEMPERATURE C G k . Dual Supply. .LT TYPICAL PERFORMANCE
CHARACTERISTICS VCONTROL Pin Current TJ C TJ C VCONTROL VOUT V VIN VOUT V
OUTPUT VOLTAGE V VCONTROL Pin Current . . COUT .F CERAMIC RIPPLE mVPP k k k
FREQUENCY Hz VIN VOUT NOMINAL V VCONTROL VOUT NOMINAL V RIPPLE mVPP
COUT . k k FREQUENCY Hz . LOAD CURRENT A . . . Dual Supply. .A DEVICE IN
CURRENT LIMIT CONTROL PIN CURRENT mA TJ C VIN V VIN V VIN V .A M G Ripple
Rejection. Single Supply RIPPLE REJECTION dB RIPPLE REJECTION dB V V IN
CONTROL VOUT NOMINAL V RIPPLE mVPP COUT .A Ripple Rejection. k G fb .F
CERAMIC ILOAD . . .A CSET . .F CERAMIC k k k FREQUENCY Hz ILOAD mA ILOAD .A k
k FREQUENCY Hz k M G Ripple Rejection Hz k Noise Spectral Density k REFERENCE
CURRENT NOISE SPECTRAL DENSITY pA/ Hz ERROR AMPLIFIER NOISE SPECTRAL
DENSITY nV/Hz RIPPLE REJECTION dB SINGLE SUPPLY OPERATION VIN
VOUTNOMINAL V RIPPLE mVPP. f Hz ILOAD . k RTEST k G ILOAD mA
INPUTTOOUTPUT DIFFERENTIAL V . IN Pin M G VIN VOUT NOMINAL V V CONTROL
VOUT NOMINAL V COUT . VCONTROL Pin RIPPLE REJECTION dB ILOAD mA ILOAD .
Residual Output Voltage with Less Than Minimum Load SET PIN V VIN VOUT RTEST
CONTROL PIN CURRENT mA ILOAD .F. G SEE NOTE IN ELECTRICAL
CHARACTERISTICS TABLE G Ripple Rejection. . .
Exposed Pad Pin /Pin /NA/NA/NA OUT on MSE and DFN packages. /Pin /Pin /Pin This is
the collector to the power device of the LT. /Pins .A TIME ms/DIV G PIN FUNCTIONS
DD/MSE/Q/T/ST VCONTROL Pin /Pin /Pin /Pin /NA This pin is the supply pin for the control
circuitry of the device.LT TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage
Noise VOUT V/DIV GAIN dB k k FREQUENCY Hz k IL mA IL .A IL mA IL . No connect pins
have no connection to internal circuitry and may be tied to VIN. this voltage must be more
than . fb . of the output current. For the device to regulate. Output voltage range is zero to the
absolute maximum rated output voltage. The current ow into this pin is about .F COUT F
ILOAD . For the device to regulate. VOUT. IN Pins . The output load current is supplied
through this pin. GND or oated. Transient performance can be improved by adding a small
capacitor from the SET pin to ground. There must be a minimum load current of mA or the
output may not regulate. SET Pin /Pin /Pin /Pin /Pin This pin is the input to the error amplier
and the regulation set point for the device. TO and SOT packages. which programs the
output voltage of the device.V to .V greater than the output voltage see dropout specications.
NC Pin /Pin /Pin /Pin /NA No Connection. VCONTROL. the voltage at this pin must be more
than . OUT Pins /Pins /Pin /Pin /Pin This is the power output of the device. A xed current of A
ows out of this pin through a single external resistor.V to .A Error Amplier Gain and Phase M
G PHASE DEGREES VOUT V RSET k CSET O.V greater than the output voltage see
dropout specications. TAB OUT on DDPak.
A supply regulating from . Threeterminal mode has the control pin connected to the power
input pin which gives a limitation of . the loop gain is unchanged by changing the output
voltage or bypassing. fb . This allows for a . For the LT. Use of a true current source allows
all the gain in the buffer amplier to provide regulation and none of that gain is needed to
amplify up the reference to a higher output voltage.VOUT or . As can be seen.VOUT with low
dissipation. The power operational amplier provides a low impedance buffered output to the
voltage on the noninverting input. To further spread the heat. This increases efciency and
reduces dissipation.LT BLOCK DIAGRAM IN VCONTROL A BD SET OUT APPLICATIONS
INFORMATION The LT regulator is easy to use and has all the protection features expected
in high performance regulators. Output regulation is not xed at a percentage of the output
voltage but is a xed fraction of millivolts.V input supply external resistors can help spread the
heat. as well as thermal shutdown. What is not so obvious from this architecture are the
benets of using a true internal current source as the reference as opposed to a bootstrapped
reference in older regulators.VIN to . Included are shortcircuit protection and safe operating
area protection. The LT is especially well suited to applications needing multiple rails.V
dropout. zero output results. such as the LT have a change in loop gain with output voltage
as well as bandwidth changes when the adjustment pin is bypassed to ground. a resistor can
be inserted in series with the collector to move some of the heat out of the IC and spread it
on the PC board. Alternatively.VIN to . The new architecture adjusts down to zero with a
single resistor handling modern low voltage digital ICs as well as allowing easy parallel
operation and thermal management without heat sinks. two supplies can be used to power
the LT to reduce dissipation a higher voltage supply for the control circuitry and a lower
voltage supply for the collector. The LT has the collector of the output transistor connected to
a separate pin from the control input. Adjusting to zero output allows shutting off the powered
circuitry and when the input is preregulatedsuch as a V or . Older adjustable regulators. A
single resistor from the noninverting input to ground sets the output voltage and if this
resistor is set to zero. A true current source allows the regulator to have gain and frequency
response independent of the impedance on the positive input. The LT can be operated in two
modes. A precision TC A internal current source is connected to the noninverting input of a
power operational amplier. Since the dropout on the collector IN pin is only mV. any output
voltage can be obtained from zero up to the maximum dened by the input power supply. the
control pin can be tied to a higher voltage and the power IN pin to a lower voltage giving mV
dropout on the IN pin and minimizing the power dissipation.
. It is designed to be stable with most low ESR capacitors typically ceramic. the guard ring
should be tied to the OUT pin. . error in the reference voltage. place a capacitor across the
voltage setting resistor. Ten nanoamperes of leakage into or out of the SET pin and
associated circuitry creates a . A minimum output capacitor of . The most common dielectrics
used are specied with EIA temperature characteristic codes of ZU. Teon. a V F YV capacitor
can exhibit an effective value as low as F to F for the DC bias voltage applied and over the
operating temperature range. can cause signicant offset voltage and reference drift. For true
zero voltage output operation. Bulk leakage reduction depends on the guard ring width. Any
voltage can be generated and there is no minimum output voltage for the regulator.
Leakages of this magnitude. The XR and XR dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor. but they tend to have strong voltage
and temperature coefcients as shown in Figures and .LT APPLICATIONS INFORMATION IN
VCONTROL LT VIN VCONTROL OUT SET COUT RSET CSET F VOUT If guardring
techniques are used. especially over the possible operating temperature range. When used
with a V regulator. while the XR is less expensive and is fb Figure . YV. Bypass capacitors.
XR and XR. each with different behavior across temperature and applied voltage. Surface
coating may be necessary to provide a moisture barrier in high humidity environments. or
less is recommended to prevent oscillations. A minimum load current of mA is required to
maintain regulation regardless of output voltage. Extra consideration must be given to the
use of ceramic capacitors. For improvement in transient performance. High quality insulation
should be used e. The XR type has better stability across temperature. this mA load current
must be returned to a negative supply voltage. this bootstraps any stray capacitance at the
SET pin. Connecting a resistor from SET to ground generates a voltage that becomes the
reference point for the error amplier see Figure . tantalum or low ESR electrolytic. cleaning of
all insulating surfaces to remove uxes and other residues will probably be required. but
startup time is proportional to the time constant of the voltage setting resistor RSET in Figure
and SET pin bypass capacitor. The reference voltage is a straight multiplication of the SET
pin current and the value of the resistor.g. With the low level current used to generate the
reference voltage. Since the SET pin is a high impedance node. Larger values of output
capacitance decrease peak deviations and provide improved transient response for larger
load current changes. leakage paths to or from the SET pin can create errors in the
reference and output voltages. increase the effective output capacitor value. pF to pF is
sufcient. Basic Adjustable Regulator Output Voltage The LT generates a A reference current
that ows out of the SET pin. Stability and Output Capacitance The LT requires an output
capacitor for stability. Board leakage can be minimized by encircling the SET pin and circuitry
with a guard ring operated at a potential close to itself. Guarding both sides of the circuit
board is required. KelF. This bypass capacitor reduces system noise as well. Ceramic
capacitors are manufactured with a variety of dielectrics. This will be most noticeable when
operating with minimum output capacitors at full load current. Capacitors up to F can be
used. unwanted signals may couple into the SET pin and cause erratic behavior.F with an
ESR of . The ZU and YV dielectrics are good for providing high capacitances in a small
package. coupled with other sources of leakage. used to decouple individual components
powered by the LT. The easiest way to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground.
which at full output current gives better than percent equalized sharing of the current. XR DC
BIAS VOLTAGE V F Figure . Ceramic Capacitor DC Bias Characteristics CHANGE IN
VALUE BOTH CAPACITORS ARE V. Voltage and temperature coefcients are not the only
sources of problems. Capacitance change due to DC bias with XR and XR capacitors is
better than YV and ZU capacitors. Parallel Devices fb . CASE SIZE. . For a SET OUT m VIN
. Table . As shown in Figure . Paralleling Devices LTs may be paralleled to obtain higher
output current. CASE SIZE. The SET pins are tied together and the IN pins are tied
together.LT APPLICATIONS INFORMATION CHANGE IN VALUE XR YV BOTH
CAPACITORS ARE V.V TO V VIN VCONTROL LT F SET k OUT m VOUT . F
TEMPERATURE C YV Trace resistance is measured in mOhms/in The worse case offset
between the set pin and the output of only millivolts allows very small ballast resistors to be
used. but can still be signicant enough to drop capacitor values below appropriate levels. mil
WIDTH .V A F F Figure . Ceramic Capacitor Temperature Characteristics available in higher
values. the two devices have a small milliohm ballast resistor. F ceramic capacitor the stress
can be induced by vibrations in the system or thermal transients. the XR and XR codes only
specify operating temperature range and maximum capacitance change over temperature.
This is the same whether its in three terminal mode or has separate input supplies. The
outputs are connected in common using a small piece of PC trace as a ballast resistor to
equalize the currents. Capacitor DC bias characteristics tend to improve as component case
size increases. Only a tiny area is needed for ballasting. but expected capacitance at
operating voltage should be veried. Some ceramic capacitors have a piezoelectric response.
Care still must be exercised when using XR and XR capacitors. PC Board Trace Resistance
WEIGHT oz mil WIDTH . similar to the way a piezoelectric microphone works. A piezoelectric
device generates voltage across its terminals due to mechanical stress. . The external
resistance of milliohms VIN VCONTROL LT F Figure . PC trace resistance in milliohms/inch
is shown in Table .
This gives . Even with an output voltage as low as V.LT APPLICATIONS INFORMATION
milliohms for the two devices in parallel only adds about millivolts of output regulation drop at
an output of A. Temperature Rise at mW Dissipation Figure . This gave a milliwatt dissipation
in each device and a A output current. Both the thermal and electrical sharing of these
devices is excellent.W Dissipation fb . inches apart and the board is mounted vertically for
convection cooling. Temperature Rise at . The power is then increased with . more than two
LTs can be paralleled for even higher output current. showing that acceptable operation can
be had while keeping the peak temperatures below excessive operating temperatures on a
board. This technique allows higher operating current linear regulation to be used in systems
where it could never be used before. The board temperature has reached approximately C
within about . about C above ambient as shown in Figure . Of course. two LT mm mm DFN
devices are mounted on a oz copper layer PC board. inches of each device. spreading the
heat. While C is an acceptable operating temperature for these devices. temperature of
about C. watts dissipation in each device and a device Quieting the Noise The LT offers
numerous advantages when it comes to dealing with noise. the temperature matching
between the devices is within C. They are spread out on the PC board. For higher ambients.
Input resistors can further spread the heat if the inputtooutput difference is high. Again.
showing excellent tracking between the devices. the temperature must be controlled to
prevent device temperature from exceeding C. this is in C ambient. Current sharing and
thermal sharing is excellent.V across each device. the noise contribution Figure . There are
several sources of noise in a linear regulator. A meterpersecond airow across the devices
will decrease the device temperature about C providing a margin for higher operating
ambient temperatures. The most critical noise source for any LDO is the reference. from
there. Both at low power and relatively high power levels devices can be paralleled for higher
output current. Two tests were set up to measure the cooling performance and current
sharing of these devices. They are placed approximately . The temperature rise above
ambient is approximately C and both devices were within plus or minus C.V inputtooutput
and A per device. The thermograph in Figure shows the temperature distribution between
these devices and the PC board reaches ambient temperature within about a half an inch
from the devices. The rst test was done with approximately . Thermal Performance In this
example. this only adds to the regulation.
it is not possible to provide true remote load sensing. Common situations are immediately
after the removal of a short circuit. That current operates with typical noise current levels of .
The problem occurs with a heavy output load when the input voltage is high and the output
voltage is low. all quiescent and drive current is delivered to the load. the inputtooutput
voltage differential is small. Curves in the Typical Performance Characteristics show noise
spectral density and peaktopeak noise characteristics for both the reference current and
error amplier over the Hz to kHz bandwidth. Active driving of the SET pin is acceptable.
allowing the regulator to supply large output currents. a problem can occur wherein removal
of an output short will not allow the output voltage to recover. this is another factor that is
RMS summed in to give a nal noise gure for the regulator. The LT does not use a traditional
voltage reference like other linear regulators. the unitygain follower presents no gain
whatsoever from the SET pin to the output. . allowing the regulator to start into very heavy
loads.LT APPLICATIONS INFORMATION from the error amplier must be considered. J/K.
Traditional low noise regulators bring the voltage reference out to an external pin usually
through a large value resistor to allow for bypassing and noise reduction of reference noise.
Error amplier noise is typically nV/Hz VRMS over the Hz to kHz bandwidth. such as the LT
and LTA. and the gain created by using a resistor divider cannot be forgotten. also exhibit
this phenomenon so it is not unique to the LT. Load regulation will be limited by the
resistance IN VCONTROL LT OUT SET RSET PARASITIC RESISTANCE RP RP RP F
LOAD Figure . and there is no requirement to use a resistor to set the output voltage. but
instead uses a reference current. With this double intersection. so noise gures do not
increase accordingly. there are two stable operating points for the regulator. If this happens.
and T is absolute temperature which is RMS summed with the reference current noise.
Overload Recovery Like many IC power regulators. Other regulators. When power is rst
turned on. Load Regulation Because the LT is a oating device there is no ground pin on the
part. Use a high accuracy voltage reference placed at the SET pin to remove the errors in
output voltage due to reference current tolerance and resistor tolerance. as the input voltage
is rising. The voltage noise of this is equal to the noise current multiplied by the resistor
value. During startup. See the Current Limit curve in the Typical Performance
Characteristics. The LT uses a unitygain follower from the SET pin to drive the output. The
load line for such a load may intersect the output current curve at two points. The resistor
generates spot noise equal to kTR k Boltzmanns constant.pA/Hz nARMS over the Hz to kHz
bandwidth. With a high input voltage. The LT provides some output current at all values of
inputtooutput voltage up to the device breakdown. though this causes startup time to
increase as a factor of the RC time constant. One problem that a normal linear regulator
sees with reference voltage noise is that noise is gained up along with the output when using
a resistor divider to operate at levels higher than the normal reference voltage. Connections
for Best Load Regulation fb . the voltage setting resistor may be bypassed with a capacitor.
With the LT. the LT has safe operating area SOA protection. the limitations are the creativity
and ingenuity of the circuit designer. the input power supply may need to be cycled down to
zero and brought up again to make the output recover. The SOA protection decreases
current limit as the inputtooutput voltage increases and keeps the power dissipation at safe
levels for all values of inputtooutput voltage. To lower reference noise. the input voltage rises
and the output follows the input.
All measurements were taken in still air on twosided / FR board with one ounce copper.
Proper mounting is required to ensure the best possible thermal ow from this area of the
package to the heat sinking material. casetoheat sink interface. It is important to keep the
positive connection between the regulator and load as short as possible and use large wire
or PC board traces. Thermal Considerations The LT has internal power and thermal limiting
circuitry designed to protect it under overload conditions.LT APPLICATIONS INFORMATION
of the connections between the regulator and the load. Negative side sensing is a true Kelvin
connection. It is important to give consideration to all sources of thermal resistance from
junction to ambient.V. MSE Package. Additional heat sources nearby must also be
considered. an IN voltage of . Lead DFN COPPER AREA TOPSIDE mm mm mm mm
BACKSIDE mm mm mm mm BOARD AREA mm mm mm mm THERMAL RESISTANCE
JUNCTIONTOAMBIENT C/W C/W C/W C/W Device is mounted on topside Table . For
continuous normal load conditions. Lead SOT COPPER AREA TOPSIDE mm mm mm mm
BACKSIDE mm mm mm mm BOARD AREA mm mm mm mm THERMAL RESISTANCE
JUNCTIONTOAMBIENT C/W C/W C/W C/W Device is mounted on topside Table .
Junctiontocase thermal resistance is specied from the IC junction to the bottom of the case
directly below the die. This includes junctiontocase. The data sheet specication for load
regulation is Kelvin sensed at the pins of the package. output current range from mA to A
and a maximum ambient temperature of C. DD Package. with the bottom of the voltage
setting resistor returned to the negative side of the load see Figure . A thermally conductive
spacer can be used for electrical isolation as long as the added contribution to thermal
resistance is considered.V . This is the lowest resistance path for heat ow. Connected as
shown. maximum junction temperature must not be exceeded. Lead DDPak COPPER AREA
TOPSIDE mm mm mm BACKSIDE mm mm mm BOARD AREA mm mm mm THERMAL
RESISTANCE JUNCTIONTOAMBIENT C/W C/W C/W Device is mounted on topside T
Package. Q Package. The following tables list thermal resistance for several different copper
areas given a xed board size. Surface mount heat sinks and plated throughholes can also be
used to spread the heat generated by power devices. For the TO package. heat sink
resistance or circuit boardtoambient as the application dictates.V . For surface mount
devices. thermal compound is strongly recommended for mechanical connections to a heat
sink. what will the maximum junction temperature be for the DFN package on a mm board
with topside copper area of mm fb . system load regulation will be the sum of the LT load
regulation and the parasitic line resistance multiplied by the output current. ST Package.
Note that the Tab or Exposed Pad depending on package is electrically connected to the
output. a VCONTROL voltage of . Lead MSOP COPPER AREA TOPSIDE mm mm mm mm
BACKSIDE mm mm mm mm BOARD AREA mm mm mm mm THERMAL RESISTANCE
JUNCTIONTOAMBIENT C/W C/W C/W C/W Device is mounted on topside Table . Table .
Lead TO Thermal Resistance JunctiontoCase C/W Calculating Junction Temperature
Example Given an output voltage of . heat sinking is accomplished by using the heat
spreading capabilities of the PC board and its copper traces.
V. Choose appropriate wattage resistors to handle and dissipate the power properly.
VCONTROLMAX CONTINUOUS .V .VmA mW POUTPUT VIN VOUTIOUT POUTPUT . RS
dissipates . Without series resistor RS. Use the formulas from the Calculating Junction
Temperature section previously discussed. Reducing Power Dissipation Using a Series
Resistor fb . The voltage drop across RS decreases the LTs INtoOUT differential voltage and
correspondingly decreases the LTs power dissipation.V . power dissipation in the LT equals
PTOTAL V . assume VIN VCONTROL V. VOUT . IOUT A.V .W of power.V A V .V . illustrated
in Figure .LT APPLICATIONS INFORMATION The power in the drive circuit equals PDRIVE
VCONTROL VOUTICONTROL where ICONTROL is equal to IOUT/.V VOUT . A curve of
ICONTROL vs IOUT can be found in the Typical Performance Characteristics curves. then
RS equals RS VIN C VCONTROL LT IN RS VIN Junction Temperature will be equal to TJ
TA PTOTAL JA approximated using tables TJ C mW C/W C In this case. The power in the
output transistor equals POUTPUT VIN VOUTIOUT The total power equals PTOTAL
PDRIVE POUTPUT The current delivered to the SET pin is negligible and can be ignored.
TA C Power dissipation under these conditions is equal to PDRIVE VCONTROL
VOUTICONTROL ICONTROL IOUT A mA Reducing Power Dissipation In some applications
it may be necessary to reduce the power dissipation in the LT package without sacricing
output current capability. As an example. ICONTROL is a function of output current. employs
a resistor in series with the regulators input.V A .V A . The rst technique.VA mW Total Power
Dissipation mW A V .W OUT SET RSET C F VOUT The LTs power dissipation is now only
compared to no series resistor.V and IOUTMAX A.V . Two techniques are available. Figure .
ensuring reliable operation.V VINMAX CONTINUOUS .V .V . A Power dissipation in the LT
now equals PTOTAL V . PDRIVE . the junction temperature is below the maximum
rating.V.W If the voltage differential VDIFF across the NPN pass transistor is chosen as .
V. reducing the current owing through the LT.V A .V . However the LT supplies only A . the
LT supplies only .W of power.A Standard value .V.V. assume VIN VCONTROL V.A. OUT
SET RSET RP VOUT C F Figure . This technique works well if input voltage is reasonably
constant and output load current changes are small.V .A. Also.A to . . shown in Figure .W.A
while keeping the LT in its normal operating range. As with the rst technique. IOUTMAX A
and IOUTMIN . VOUT . This technique also increases the maximum available output current
at the expense of minimum load requirements. Therefore.LT APPLICATIONS
INFORMATION The second technique for reducing power dissipation. Therefore.V . As an
example.W RP dissipates .A . This resistor provides a parallel path for current ow. VOUTMIN
. With this conguration.V . the LTs power dissipation is only PDIS .V .V . Reducing Power
Dissipation Using a Parallel Resistor fb . Calculating RP yields .A . uses a resistor in parallel
with the LT. VINMAX .V . RP VIN C VCONTROL LT IN The maximum total power dissipation
is . load current can increase by . assuming that RP carries no more than of IOUTMIN mA.
choose appropriate wattage resistors to handle and dissipate the power properly.
Current Source VIN V IN VCONTROL LT Low Dropout Voltage LED Driver VIN C
VCONTROL LT IN D mA F SET k OUT IOUT A TO A . TA Using a Lower Value SET
Resistor VIN V IN VCONTROL LT C F OUT SET R .V A F SHUTDOWN TA OUT VOUT SET
ON OFF Q VNLL R N Q VNLL TA .LT TYPICAL APPLICATIONS Higher Output Current VIN
V MJ VIN IN LT Adding Shutdown IN LT VCONTROL F VCONTROL F SET OUT VOUT .k
RSET k TA VOUT .k TA R .V TO V R VOUT .F mA fb .F k Q INSURES ZERO OUTPUT IN
THE ABSENCE OF ANY OUTPUT LOAD.F OUT SET R .V mA RSET COUT .
V A COUT .F OUT SET R k VOUT .V to V IN VCONTROL C F D N LT OUT SET VOUT .F C
.k C .F R k TA Lab Supply IN VCONTROL LT IN VCONTROL LT VIN V TO V F SET OUT
OUT VOUT V TO V k A TO A F SET R MEG .V A Adding SoftStart VIN .V C .F F TA fb .F TA
SET R .LT TYPICAL APPLICATIONS Coincident Tracking IN VCONTROL IN VCONTROL
VIN V TO V IN VCONTROL LT LT LT OUT SET k OUT VOUT .F C .F VOUT V .
F OUT INPUT LT GND TA OUTPUT SET C F VOUT C .F TA Ramp Generator IN
VCONTROL F LT IN VCONTROL Reference Buffer LT VIN V VIN SET VNLL F N OUT
VOUT .VOUT .A .F k TA F k mV DROP ENSURES LT IS OFF WITH NO LOAD MULTIPLE
LTS CAN BE USED fb .LT TYPICAL APPLICATIONS High Voltage Regulator VIN V k N IN
BUZ VCONTROL .mA Ground Clamp Boosting Fixed Output Regulators LT VIN IN
VCONTROL LT VEXT F N OUT OUT SET VOUT V LT. F TA m m .F TA VNLL MIN LOAD .V
LT F OUT VOUT A VOUT V VOUT A RSET F SET RSET MEG .
V SET BY THE VBE OF THE N PNP .V SET OUT m BELOW INPUT VOLTAGE V TO V A
IN VCONTROL LT SET OUT m IN VCONTROL LT SET k TA OUT m F fb .MEG k LTC
PGOOD RUN/SS pF VFB .V SVIN . MAXIMUM OUTPUT VOLTAGE IS .k k pF F N IN
VCONTROL LT F SET IN VCONTROL LT OUT m DIFFERENTIAL VOLTAGE ON LT IS .k
SYNC/MODE SGND PGND k SW ITH RT k .LT TYPICAL APPLICATIONS Low Voltage.V
TO . High Current Adjustable High Efciency Regulator .H PVIN .
F IN TPL VCONTROL LT GND FB k SET OUT TA V TO V A .V SET BY THE TPOL
PCHANNEL THRESHOLD.V TO V F F k VIN BOOST LT .F MEG DIFFERENTIAL
VOLTAGE ON LT .F IOUT V R fb . MAXIMUM OUTPUT VOLTAGE IS V k BELOW INPUT
VOLTAGE Terminal Current Source CCOMP IN VCONTROL LT SET k R TA CCOMP R F R
.F H SW MBRM F k SHDN .LT TYPICAL APPLICATIONS Adjustable High Efciency
Regulator CMDSHE .
p . DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. p . p. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M
VARIATION OF WEED . SIDES PACKAGE OUTLINE . . p.mm ON ANY SIDE . BSC . . REF
. p. p. . p. SIDES DD DFN REV C . IF PRESENT. p. BOTTOM VIEWEXPOSED PAD NOTE .
SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON TOP AND BOTTOM
OF PACKAGE fb . .LT PACKAGE DESCRIPTION DD Package Lead Plastic DFN mm mm
Reference LTC DWG Rev C . MOLD FLASH. . p. ALL DIMENSIONS ARE IN MILLIMETERS
. DRAWING NOT TO SCALE . . EXPOSED PAD SHALL BE SOLDER PLATED . SHALL
NOT EXCEED . . p . . SIDES PIN TOP MARK NOTE . RECOMMENDED SOLDER PAD
PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT
SOLDERED R . p . BSC . . p. TYP .
. .mm . p . DIMENSION DOES NOT INCLUDE MOLD FLASH. . BSC . MOLD FLASH. p . p .
.mm . BSC . MAX . . p . LEAD COPLANARITY BOTTOM OF LEADS AFTER FORMING
SHALL BE .quot PER SIDE. . p . . . . . REF . .quot PER SIDE . SEATING PLANE . . . NOTE
RECOMMENDED SOLDER PAD LAYOUT DETAIL A o o TYP . PROTRUSIONS OR GATE
BURRS. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. p .
DETAIL A . MIN . . . FOR REFERENCE ONLY NO MEASUREMENT PURPOSE . GAUGE
PLANE . . DIMENSIONS IN MILLIMETER/INCH . REF . NOTE . . . . p . .quot PER SIDE .
TYP . . DETAIL B CORNER TAIL IS PART OF DETAIL B THE LEADFRAME FEATURE. p .
p . EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. REF NOTE .LT
PACKAGE DESCRIPTION MSE Package Lead Plastic MSOP . REF . PROTRUSIONS OR
GATE BURRS SHALL NOT EXCEED . . . MSOP MSE REV F fb . . p . INTERLEAD FLASH
OR PROTRUSIONS SHALL NOT EXCEED . . p . DRAWING NOT TO SCALE . p . . . .mm .
p . p . p . p . TYP . p .quot MAX . . . . Exposed Die Pad Reference LTC DWG Rev F
BOTTOM VIEW OF EXPOSED PAD OPTION . MOLD FLASH ON EPAD SHALL NOT
EXCEED . . p .mm .
. . . . . . . . . . . TYP . . . . . . . . . . . . .LT PACKAGE DESCRIPTION Q Package Lead Plastic
DDPak Reference LTC DWG . . . TYP . . . . . . . BSC . . . . . . . . . . . . . . . BOTTOM VIEW OF
DDPAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK . . .
RECOMMENDED SOLDER PAD LAYOUT NOTE . o TYP . . . . . . TYP . QDD . . . . . p . . .
DIMENSIONS IN INCH/MILLIMETER . . . . p . . DRAWING NOT TO SCALE
RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PASTE
APPLICATIONS fb . . . . . . .
. BSC . . . . . . . . . . . BSC . . . BSC . . . . . . . . . . . MAX o MAX . . . BSC . . . . . . . . . .
RECOMMENDED SOLDER PAD LAYOUT o o . . ST SOT fb . . BSC . SEATING PLANE .
MAX . DIA . . . . . . . . . . MEASURED AT THE SEATING PLANE T TO ST Package Lead
Plastic SOT Reference LTC DWG . . MIN . . . . . . . . MAX . .LT PACKAGE DESCRIPTION T
Package Lead Plastic TO Standard Reference LTC DWG . . . . . . . TYP . . . . . . o o . MAX . . .
. . . . . . . MAX . . . MAX . . . . . . . . . . . . . . . . . . . . .
fb Information furnished by Linear Technology Corporation is believed to be accurate and
reliable. Linear Technology Corporation makes no representation that the interconnection of
its circuits as described herein will not infringe on existing patent rights.LT REVISION
HISTORY REV B DATE / DESCRIPTION Made minor updates to Features and Description
sections Revised Line Regulation Conditions and Note Made minor text edits in Applications
Information section Added k resistor to drawing TA in Typical Applications section Updated
Package Description drawings Revision history begins at Rev B PAGE NUMBER . . no
responsibility is assumed for its use. However.
V to V. . VOUTMIN . VIN . VIN . Stable with Ceramic Caps TO. Fast Transient Response
LDO .V.A IOUT.V A F TA RELATED PARTS PART NUMBER LDOs LT LT LT LTA LT . MHz
Synchronous StepDown DC/DC Converter fb Linear Technology Corporation McCarthy Blvd.
. S and SOT Packages mV Dropout Voltage. SOT and SO Packages mV Dropout
Voltage.V.V. Adjustable or Fixed Output. IQ A. VDO .V to . Low Noise VRMS.com LINEAR
TECHNOLOGY CORPORATION .LT TYPICAL APPLICATION Paralleling Regulators IN
VCONTROL LT SET OUT m VIN . IQ A.V. MSOP and mm mm DFN packages. VIN . TSSOP
Package Efciency. Lead MS or DFN Packages DESCRIPTION COMMENTS LTC . CA FAX
LT REV B PRINTED IN USA www.V. DDPak.MHz Synchronous StepDown DC/DC
Converter .V to .A StepDown Switching Regulator A IOUT.V to .V to . Stable with F Ceramic
Capacitors.linear.V.V.. Low Noise VRMS.A Low Dropout Regulator mA Low Dropout
Regulator mA Low Dropout Regulator .A Low Input Voltage VLDOTM Regulator Switching
Regulators LT LTC LTC/LTCB LTC High Voltage. Milpitas.V to V.V to .V to . DDPak. SOT
Packages OK for Sinking and Sourcing. VOUTMIN . .V Boost Enabled. . ThinSOTTM
Package Efciency.A Low Noise. TO. DDPak.V with External V. IQ A.V. MHz Synchronous
StepDown DC/DC Converter mA IOUT. .V. VOUTMIN . Lead MSOP and DFN Packages f
kHz. VIN . VOUT . V and V Output V Dropout. VIN . TSSOPE Package Efciency. ISD lt A. IQ
A. ISD lt A.A Low Noise LDO Fixed .V.V.V TO V IN VCONTROL LT F SET k OUT m VOUT .
VIN .