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Leakage Power Minimization in Ultra-wideband (UWB) Communications Circuits Edgar Wangolo Presentation Plan UWB: concept and applications Leakage power in sub-micron CMOS Leakage minimization techniques Application to PLL’s Prescaler Project time table References UWB - Concept FCC: bandwidth is more than 25% of a center frequency or more than 1.5 GHz Typically implemented in a carrierless fashion Directly modulate an “impulse” with a very sharp rise and fall time => a waveform that occupies several GHz Historically started with radar applications for military use UWB Vs. Narrowband Communications Narrowband Communication Ultrawideband Communication Time-domain behavior 1 1 0 Impulse Modulation Frequency-domain behavior time 3 frequency 10 GHz (FCC Min=500Mhz) 0 1 0 1 Frequency Modulation 2.4 GHz Operation Principles (“Spectrum Underlay“) Narrowband (e.g GSM: +35 dBm/MHz) Transmit Power Spectral Density WCDMA (typ. +15 dBm/MHz) [dBm/MHz] UWB (e.g – 41 dBm/MHz) 1 Frequency/GHz 10 Bandwidth (GSM : WCDMA : UWB) ~ 1 : 10 : 10000 UWB Spectrum FCC ruling permits UWB spectrum overlay Bluetooth, 802.11b Cordless Phones Microwave Ovens PCS Emitted Signal Power GPS 802.11a “Part 15 Limit” -41 dBm/Mhz UWB Spectrum 1.6 1.9 2.4 3.1 5 Frequency (Ghz) 10.6 UWB Vs. Narrowband UWB Transceiver ADC CLK DIGITAL GAIN TX ANALOG: LNA A/D MIXER Q A/D F SYNTH D/A PA I MIXER D/A DIGITAL: Narrowband Transceiver UWB: Advantages High Bandwidth, high data rate Low power spectral densities Simple, low cost Immunity to interference Challenges: Low/Medium Range Signal to noise ratio is still an issue UWB: Applications Accurate positioning (through wall radar, tracking) High quality wireless video Satellite communications Air traffic control Medical imaging Etc. PLL Block Diagram 30 – 40% of total power input PFD up down Charge Pump Loop Filter %N VCO output 40% of total power Today’s monolithic PLL’s use Phase Frequency Detectors (PFD), charge pumps, and an optional frequency divider in the feedback path. Fin N-digit Fractional-N Prescaler Fout 2/3 2/3 2/3 2/3 P0 P1 P2 Pn N=2n+2n-1Pn-1+2n-2Pn-2+…+2P1+P0 Circuit Power Dynamic Power: determined by circuit performance requirement. Short_Circuit Power: Both PU and PD circuit partially conduct. Small percentage. (<10%) Leakage Power: Increasingly important, and many issues dependent, such as device geometry, temperature, doping, processing and data pattern dependent, etc. It is very complicated and worthy to study more to improve it. Leakage Power Sources W I d eff Cox (m 1)VT e Leff Vgs Vth mVT (1 e Vds VT ) Sub-threshold 2 V Tox / V I ox K 2W e Tox I pn J leakage, p n (e qV kT 1) A Gate oxide PN Leakage control: MTCMOS Smart Switch Series (Triple-S) RCSFF: Reduced-Clock Swing Flip-Flop Timetable Literatures: Circuit Design: Simulations: Presentation: Report: March 10 March 16 March 28 April 6 April 20 References Hiroshi Kawagushi and Takayasu Sakurai, “A Reduced Clock-Swing Flip-Flop (RCSFF) for 63% Power reduction”, IEEE Journal of Solid State Circuits, Vol. 33, N05, May 1998 Tschanz et. Al, “Dynamic Sleep Transistor and body bias for active leakage power control of microprocessor”, IJSSC, Nov 2003 J. T. Kao and A. Chandrakasan, “ Dual Threshold Voltage Techniques for Low-Power Digital Circuits”, IEEE Journal of Solid-State Circuits, July 2000