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Interface Design Connections Omid Fatemi University of Tehran 1 Typical Interface Design Connect Sense Reality Touch Reality Connect Transform Compute Embedded Systems Micros Assembler, C Real-Time Memory Peripherals Timers DMA Convey PC interfaces HCI Cooperate Busses Protocols Standards PCI IEEE488 SCSI USB & FireWire CAN University of Tehran 2 Transducer Signal • • • • varying current or voltage for analog signals varying duty cycle or pulse widths micro or milli values to large values sensor signal will also contain some element of noise • at some resolution of the signal, the amount of noise becomes relevant • the signal to noise ratio is often noted as S/N University of Tehran 3 Problems • Signals have low values. (low level milli volt signals) • Sensors are remote to DAQ board long cable • Electromagnetic interference (EMI) • Non ideal grounding • Thermal noise University of Tehran 4 Transportation Costs • If sensor is integrated with the computing system (on-chip), then there is less chance of noise from the signal being transported through the real world over connecting wires. • External sensors must connect to the computing elements through some sort of wiring arrangement which can create noise. University of Tehran 5 Noise Source in Resistive Devices • above absolute zero, all materials have random thermal motion which gives rise to uncertainty in a material’s thermal energy. • This leads to uncertainty in the dissipated electrical power of a resistor or noise in a signal University of Tehran 6 Resistor Noise • findings of J.B. Johnson in 1928 • white noise is a combination of all frequencies like white light • amount of noise increases with resistance and bandwidth University of Tehran 7 Other Sources • Electric fields – Capacitive coupling • Magnetic fields – Inductive coupling (close range) • Electromagnetic wave – Proportional to loop area and frequency • Conducted interference – Ground noise University of Tehran 8 Review of Capacitive Coupling A IA IA B + VA - 1) The creation of a voltage difference from A to B produces an electric field in the volume between A and B. The energy in this field is proportional to VA . 2) As VA increases, a current IA flows into plate 1. An equal current flows out of plate 2. Thus plates 1 and 2 accumulate electric charges of equal magnitude but opposite sign. The quantity of accumulated (stored) charge depends on several factors: University of Tehran 9 Review of Inductive Coupling A IA VA IB B + - VB + - 1) The creation of current IA through loop A produces a a magnetic field in the volume surrounding loop A. The energy stored in this field is proportional to IA . 2) The area of loop B intersects magnetic flux from the magnetic field surrounding loop A. The quantity of flux intersected depends on several factors: University of Tehran 10 Digital to Analog Coupling • fast changing digital signals can capacitively couple noise into neighboring analog signals University of Tehran 14 Ground Noise • different ground resistances (milli-ohms) can cause different voltages on ground loops • separate ground wire is better but costlier University of Tehran 15 Ignore Noise for Large Signals • if signal is much larger than the noise and it is a digital signal (resolution is 2), the noise can be ignored • around a building you can get noise from 1-100 mv in the signal cable University of Tehran 16 Signal Loss • voltage from transducer is divided between internal resistance and resistance of the amplifier • the error increases with small Rdiff and large Verr • this is why high input impedance on an amplifier is important to get most of the signal University of Tehran 17 Differential Signals (Balanced Input) • a signal that is the difference between two signals is known as a differential signal • normal mode is when the signals differ; common mode is when they both change the same • common mode rejection ratio is the the ratio of an amplifiers response to normal / common mode signals • For signals below 1 MHz University of Tehran 18 Differential Amplification • Common Mode: Two signals change input levels together. GCM RC rejection 2R1 RE rE • Normal Mode: Two signals have a differential change Gdiff RC Vout gain V1 V2 2( RE rE ) • A differential amplifier has a high “Common Mode Rejection Ratio”CMRR R1 RE rE University of Tehran 19 Twisted Pairs and Shielding Shielded twisted pair cabling makes noise signals as common mode A good example of long cabling: Telephone company University of Tehran 20 Common Mode Interference Rejection University of Tehran 21 Single Ended Inputs • Shield and negative lead are grounded University of Tehran 23 Floating Signal Shield Grounding • A shield on a cable should be grounded at the amplifier end only. • Grounding at both ends generated ground loops • Grounding at amplifier side prevents signal floating near threshold voltages University of Tehran 24 The Correct Grounding University of Tehran 25 Grounded Small Signal Shielding University of Tehran 26 High Frequency Bypass • high frequency noise can be bypassed on an amplification stage by using a bypass capacitor University of Tehran 27 Amplify at the Transducer • If we put a preamplifier to boost the sensor signal and reduce the source impedance we can improve the S/N ratio University of Tehran 28 Current Loop • small current run to detect open circuits • signal changes current from 4 to 20 milliamps • can use 250 ohm resistor to change to 1-5V University of Tehran 30 Analog Multiplexor for Multiple Inputs University of Tehran 31 Propagation Delay Vout Vin Vin 50% time Vout t pd0 t pd1 50% time t1 t2 t3 t4 Note: typically, t pd0 = t pd1 due to variations in carrier storage times in the transistors, differences in output drive impedances to L and H, etc. Propagation delay, t pd = 1 2 ( t pd0 + t pd1 ) University of Tehran 32 Slow Digital Circuits 1) Conventional Logic (low to medium speed) propagation delays through logic elements >> propagation delays through wiring --- relatively slow signal rise and fall times t r , t f > 10 ns --- circuit size is much less than the wavelength of the highest frequency signals --- can safely neglect the parasitic R, L, and C of wiring when modeling signal propagation --- can safely use lumped models of circuit elements University of Tehran 33 High Speed Logic 2) High-Speed Logic propagation delays through logic elements ~ = propagation delays through wiring --- fast signal rise and fall times t r , t f < 5 ns --- circuit size is greater than or equal to the wavelength of the highest frequency signals --- must consider parasitic R, L, and C of wiring when modeling signal propagation --- must use combination of distributed and lumped models of circuit elements University of Tehran 34 Noise Margins --- a noise margin is a parameter that represents the maximum noise voltage that can be present on the input of a logic gate without affecting the logical level of the gate’s output --- separate noise margins are usually defined for the L and H voltage levels VCC VOHmin VOLmax NMH NML VIHmin VILmax GND VOHmin = minimum high voltage output by a gate VOLmax = maximum low voltage output by a gate VIHmin = minimum input voltage interpreted as a H VILmax = maximum input voltage interpreted as a L Low noise margin, NM L = VILmax - VOLmax High noise margin, NM H = VOHmin - VIHmin University of Tehran 35 Summary University of Tehran 37