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Transcript
2005 International Linear Collider Workshop – Stanford, U.S.A.
FLC_SIPM : front-end chip for SIPM readout for ILC analog HCAL
C. de La Taille, G. Martin-Chassard, L. Raux
IN2P3/ LAL, Orsay, 91898, FRANCE
An integrated front-end chip has been developed to readout the Silicon PM for the ILC analog hadronic calorimeter. It is built
around a variable gain low-noise preamplifier followed by a variable peaking-time shaper (20-200 ns), track and hold and
multiplexed output. This structure allows to produce single photo electron spectrum with well separated peaks for absolute
calibration at fast shaping (40ns) as well as physics signals from the scintillating fibbers (up to 2000 photo-electrons) with a
slower shaping (150ns) compatible with the W-Si Electromagnetic Calorimeter DAQ. Besides, an input DAC allows to tune the
detector gain by varying the operating voltage by up to 5V. The chip accommodates 18 channels and 1000 circuits have been
produced in 2004, the design and the measurement results of which will be presented.
1. INTRODUCTION
A hadronic calorimeter prototype is now designing for ILC with scintillator tiles read by silicon photo-multipliers
(fig.1), developed by MEPhI and PULSAR 1. Dimension of that prototype is around 1m3 with scintillator tiles from 3 by
3 cm to 12 by 12 cm over 36 layers for high granularity. The silicon PM (SiPM) is a matrix of pixels directly coupled to
the tile (fig.2) and the tiles are grouped to form a mini HCAL with around 10000 readout channels.
SiPM
Figure 1 : silicon photo-multiplier schematic
A front-end chip has been developed to read out 18 SiPM. This
paper describe that chip (fig.3) called “flc_sipm”. Its general
architecture will be explained and measurements will be shown.
Figure 3 : “flc_sipm” chip layout
1
M. Danilov, these proceedings
916
Figure 2 : tile with SiPM
2. PHYSIC CONTEXT
In the CALICE collaboration, the HCAL prototype 2 has to be added to the ECAL physic prototype for test beam in
DESY mid 2005 and going on in higher energy beam in 2006. The chip has been designed in a very tight schedule in
order to be ready in time with the HCAL prototype.
2.1. SiPM electronic characterisation
When the PM works with a gain of 106, the photo-electron is a signal of 160 fc and the MIP taken at 20 p.e. gives a
signal of 3.3 pc. The maximum signal is around 120 MIPs so the input dynamic range of the circuit should be 400 pc.
The SiPM pulse shape is set by the wavelength shifter fibber : it is a very fast signal with a rise time of few ns.
The noise rate is around 2MHz so a calibration 3 is necessary on single photo-electron and must be done at fast shaping
to avoid pile up.
The SiPM gain varies a lot with high voltage value (It can go up to 7% for 100mV of high voltage variation). To have
quite the same gain for each SiPM, we need to adjust the high voltage from 63 to 67 V, so a DAC (digital to analog
converter) is added on each channel of the chip to compensate for SiPM gain variation.
2.2. SiPM connection to the chip
The SiPM is directly connected to the chip as shown in fig. 4. The high voltage is provided by the cable shielding.
There is no external circuitry except high voltage decoupling and cable matching components. The DAC comes
directly at the chip input and it is necessary to filter its noise.
+HV
100k
100n
8-bit DAC
SiPM
Preamp input
50
100n
ASIC
Figure 4 : SiPM connection to the readout
2
3
F. Sefkow, these proceedings
E. Garutti, these proceedings
916
3. CHIP DESCRIPTION
3.1. General description
The flc_sipm is an 18 channel charge input front-end circuit. It provides a shaped signal proportional to the input
charge. The chip houses 18 channels made of a low noise variable-gain charge preamplifier followed by a CRRC2
shaper with a variable shaping time. Each of the shaper output comes into a track and hold system giving a single
multiplexed output. The bias of each stage is common for 18 channels. An 8-bit DAC is in parallel to the preamplifier
input.
The total power consumption of the chip is around 200mW with 5V supply voltage.
The chip is designed in a 0.8μm CMOS technology of AMS4 and has an area of 10 mm2 (fig. 3). Around 1000
circuits have been produced at the end of 2004 and are packaged in a QFP100 case.
3.2. One channel description
The channel architecture is shown in fig. 5.
100M
0.1pF
0.2pF
8-bit
DAC
0-5V
40k
ASIC
1.2pF
0.4pF
0.6pF
0.3pF
0.8pF
in
12k
4k
50
10pF
24pF
Rin
10k
8pF
4pF
2pF
12pF
1pF
6pF
100nF
3pF
Charge Preamp
Figure 5 : Channel architecture
4
www.austriamicrosystems.com
916
2.4pF
CR-RC² Shaper
At the input of each channel, there is an 8-bit DAC to provide 5V of DC voltage change, it is coupling with a
capacitor at the input of the preamplifier. This capacitance is also used for high voltage decoupling and it is followed by
a resistor in order to make a first derivative constant time. For speed and noise reasons, this resistor could be shorted.
A low noise charge preamplifier follows : it gives 1300 electrons of noise at fast shaping compared to the 10 6
electrons given by a single photo-electron. The gain of this preamplifier (feedback capacitance) can be externally
chosen on 4 bits : it varies from 0.7 to 10 V/pc.
The filtering is done by a CRRC2 shaper with variable time constant which can be externally chosen on 4 bits from
12 to 180 ns. The fast shaping (called calibration mode) is used for SiPM calibration on single photo-electron and the
long shaping (called physics mode) is necessary to be compatible with the ECAL readout.
3.3.
DAC description
The DAC used is an 18 channel 8-bit DAC, its structure is based on scaled current mirrors. It provide 5V of
excursion in order to adjust the high voltage value and then the SiPM gain. Its output comes at the preamplifier input so
we had a 5K series resistor (fig. 4) in order to filter the DAC noise : with the DAC on the RMS noise go up from 1.2mV
to 1.25mV at fast shaping (12ns).
4. MEASURED PERFORMANCES
4.1. Preamplifier noise
The fig. 6 shows the preamplifier noise measurement in electron versus shaping time constant. In calibration mode,
the RMS noise is around 1.25 mV with the input resistor shorted. In physics mode, this input resistor is used to obtain a
long shaping time but the RMS noise remains less than 1 mV.
Figure 6 : preamp noise
916
4.2. DAC linearity
The linearity of the 18 channels of the DAC is shown in fig.7 : the non-linearity, around 2 %, is essentially due to
mismatch in current mirrors and is enough to adjust correctly the high voltage for SiPM gain .
5,5
0,10
5,0
0,08
4,5
ch1
0,06
ch2
4,0
ch3
0,04
ch4
ch5
3,5
0,02
ch6
ch7
3,0
ch8
0,00
0
ch9
2,5
ch10
50
100
150
200
250
-0,02
ch11
ch12
2,0
-0,04
ch13
ch14
1,5
ch15
-0,06
ch16
ch17
1,0
-0,08
ch18
-0,10
0,5
0,0
0
10
20
30
40
50
60
70
80
90
100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
Figure 7 : 18 channel DAC linearity and residuals
4.3. Calibration mode
The figure 8 shows the response of the circuit for a single photo-electron at the input (0.6mV injected thru 270pF)
with various fast shaping time. The gain of the preamplifier is taken at 5V/pc (the feedback capacitance is 0.2pF) and
the input resistor is shorted. At 12ns of shaping, a single photo-electron gives a signal of 11mV with a peak at 35ns.
Figure 8 : SPE response at various shaping time
916
4.4. Physics mode
In physics mode, we take a long time constant (180 ns), a gain preamplifier of 2.5 V/pc (the feedback capacitance is
0.4pF) and the input resistor is used. In these conditions, a MIP electronically injected (without detector and with
9.5mV in 270pF) gives at the output a signal of 23mV with a peak at 160ns as shown in fig. 9.
Figure 9 : MIP response in physics mode conditions
The linearity was measured in physics mode conditions. The fig. 10 shows output voltage versus MIP injection for
various preamplifier gains. The chip saturation appears at around 2V so for a preamplifier gain of 2.5V/pc, used in
physics mode, we obtain a dynamic range of 80 MIPs with a non-linearity less than 1%.
Linearity Rin ON
=180ns
2500
Linearity Residuals for physics mode (%)
0.5%
0,6
Cf=0,1p
F
2000
0,4
Cf=0,2p
F
0,2
Cf=0,4p
F
1500
0
Linearity residuals (%)
Vout (mV)
Cf=0,8p
F
Cf=1,5p
F
-0,2
1000
-0,4
-0,6
-0.5%
500
-0,8
-1
0
10
20
30
40
50
60
Injected charge (MIP=16p.e.)
0
0
50
100
150
200
250
300
350
Qinj (MIP)
Figure 10 : linearity versus MIP injection for various preamplifier gains and residuals for gain 0.4pF
916
70
80
90
4.5. Cross-talk considerations
The cross-talk between channels was measured and it is negligible (less than 0.2%). Fig. 11 shows output of one
channel with signal at input compared to neighbour and non-neighbour outputs without signal at input and
multiplied by 100.
The neighbour channel shows the capacitive coupling contribution and the non- neighbour channel shows the long
distance cross-talk due to common reference voltage on chip.
Non-Direct
neighbouring
channel x100
Direct neighbouring
channel x100
Figure 11 : Cross-talk measurement in physics mode conditions
4.6. Spectrum measurements
Connecting the SiPM to our chip we can clearly observe peaks for 1 photo-electron, 2 p.e., 3 p.e. and so on as shown
in fig. 12.
pedestal
Figure 12 : SPE spectrum measurement in physics mode conditions
916
5. SCHEDULE AND COST
The development of this chip was very short. The first prototype was submitted in June 2004. After test and
validation of this prototype, a production of 1000 chips stated in November 2004. The production was delivered in
January 2005, all chip are now under tested and will be available for the CALICE collaboration in April 2005.
The overall cost of this production is around 25 K€ (or 20 K$), the biggest part is for silicon dies and 4 K€ for
packages.
6. CONCLUSION
A series of 1000 chips with 18 channels each has been produced in less than one year.
It is a very versatile chip with variable gain preamplifier (from 0.7 to 10 V/pc) and with variable shaping time shaper
(from 12 to 180 ns).
In calibration mode, the fast shaping clearly separates single photo-electron peaks. In physics mode, the dynamic
range of 11bits (1mV to 2V) fulfils the SiPM requirements and remains compatible with the ECAL readout.
An 8-bit DAC provides 5V excursion of change in high voltage value and allows to adjust the SiPM gain.
916