Download modular honours degree course

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EO212 1 /10
SCHOOL OF ENGINEERING
MODULAR HONOURS DEGREE COURSE
LEVEL 2
SEMESTER 2
2003/2004
ANALOGUE ELECTRONICS
Examiners: Dr C Garrett, Dr SS Singh
Answer 4 questions only
Time allowed: 2 hours
Total number of questions = 6
All questions carry equal marks.
The figures in brackets indicate the relative weightings
of parts of a questions.
Special requirements:
BC 337 Data sheet
(3 sides)
PIC PORT characteristics (1 side)
EO212 2 / 10
1)
a) Using the example circuit shown in figure 1.1, explain what is thermal runaway, what
causes it and how the circuit tries to eliminate its effect.
(7)
+ 25 V
100 
100 
5V
0V
Figure 1.1
b) If the Bipolar Junction Transistor (BJT) in figure 1.1 is modelled by the equations
I C  I B  10 9 e

VBE
0.026
 1 and

I C  100 I B ,
use iteration to estimate the base
current.
(9)
c) If the base-collector junction of the BJT in figure 1.1 has a thermal resistance to case
of 50 C /W determine a suitable heat sink thermal resistance to ensure reliable
operation of the BJT. Assume ambient temperatures lie between 25 C and 50 C and
TJmax is 150 C.
(5)
d) Bearing in mind that the number “0.026” used in part b) is a function of temperature
how would you improve your iteration method to incorporate the extra information
contained in part c)?
(4)
EO212 3 / 10
2)
a) Figure 2.1 shows a simplified push-pull amplifier output stage. Explain the meaning
of the terms “push” and “pull” in this context and describe how the characteristics of
this amplifier change as the voltage of the two sources (Vs) are varied. Assume both
sources change by the same amount.
(8)
+V
+
Vs
VIN
RL
0V
+
Vs
-V
Figure 2.1 Push-Pull output stage
QUESTION 2 CONTINUES ON PAGE 4/10
EO212 4 / 10
b) Figure 2.2 shows a single transistor amplifier. If the transistor hFE is known to be
about 200 calculate, using a simplified hybrid- model, the approximate rms voltage
across, and hence power delivered to, the load RL. Assume the input voltage
V = 3 + 0.05sin(t) volts and that the frequency is high enough to make the
capacitor reactance negligible. Show all working.
(10)
+12 V
3k9 
27 k 
Cin
+
V
18 k 
2k2 
RL =
2k7 
0V
Figure 2.2 Single Transistor Amplifier
c) Assume that the high-pass frequency breakpoint of the amplifier in figure 2.2 is
dominated by the input decoupling capacitor ( Cin ) which is in series with the input
source V. If this capacitor has the value 10 nF, determine the frequency at which the
amplifier gain has fallen by 3 dB.
(7)
EO212 5 / 10
3)
a) Explain why it is more efficient to use a transistor in switched-mode rather than linear
mode. Illustrate your answer by sketching the maximum power limit on a BJT output
voltage/current characteristic. Include the effects of cut-off and saturation in your
answer.
(7)
b) Figure 3.1 shows an interface to enable a microcontroller to switch power to a
resistive load on and off at slow speed. The transistor base is connected to an output
port pin of the PIC microcontroller through a resistor RB. Determine if the transistor
will operate reliably at an ambient temperature of 30C if RB = 300 . Show all
working and state any assumptions. The microcontroller port output characteristics
and BC337 data sheets are supplied.
(11)
+5V
RL = 10 
PIC
Microcontroller
RB
BC337
without
heatsink
0V
Figure 3.1 – Microcontroller Interface
c) Four common-anode seven-segment displays are to be driven from a simple
microcontroller which have an 8-bit port and a 4-bit port. The display is to be
multiplexed by means of emitter followers using bipolar junction transistors. Sketch
the circuit and explain briefly how a four-digit number would be displayed. You are
not required to calculate any component values.
(7)
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4) An ideal operational amplifier has zero input offset voltage compared to an real
operational amplifier. This can be viewed as a limitation of a real operational amplifier.
a) Defined three other common limitations of a real operational amplifier compared
to an ideal operational amplifier and briefly explain what they are.
(3)
The non-inverting amplifier circuit of figure Q4 is constructed using an operational
amplifier with finite input offset voltage Vos. All other parameters are ideal and
assume Vin=0.
b) what is the value of the current I1 into the positive input of the operational amplifier?
Give reasons for your choice of value.
(2)
c) what is the voltage across the resistor R1? What is the current through the resistor
R1? Give reasons for your answers.
(2)
d) Prove that the output voltage of such a circuit with zero input voltage is determined
by the size of the input offset voltage and related to the resistor ratio R2/R1 by the
equation -(1+R2/R1)xVos. Show all mathematical steps.
(6)
e) If, with zero input voltage the output voltage from the circuit in figure Q4
is -(1+R2/R1)xVos . Derive an equation for the output voltage from the same
circuit if the input voltage is not zero. If the input offset voltage of the
operational amplifier is Vos =1 mV and the resistor ratio R2/R1 = 9. What will the
output percentage error voltage be if the input voltage Vin = 0.5V?
Show all mathematical steps.
Question 4 continued on page 7/10
(12)
EO212 7 / 10
R2
I2
I1
Vin
input voltage
Vout
output voltage
Vos
input offset voltage
I1, I2 currents
R, R1, R2 resistors
Z
input impedance
R
Z
Vos
Vin
Vout
R1
Figure Q4
EO212 8 / 10
5) The circuit in figure Q5 shows a simple transistor circuit, which is forward biased. The
transistor has a minimum current gain hFE of 200. The supply voltage to the circuit is
+12.0 V and the transistor base and collector resistors are 100 K and 1.0 K
respectively.
a) Calculate for the circuit the minimum input voltage that will guarantee to bias the
transistor into saturation. Take into account the finite base-emitter voltage drop of

0.6 V as well the finite collector-emitter voltage drop of 0.4 V when the transistor is
saturated. Show all mathematical steps in your derivation.
(8)
b) Evaluate the input voltage to the circuit that will cause the output voltage to
be 6.0 V at minimum hFE. Take into account the finite base-emitter voltage
drop of 0.6 V and show all mathematical steps in you calculations.
(7)
c) Sketch a graph of input voltage verses output voltage for the circuit,
indicating at which input voltage value, transistor saturation occurs. Indicate
on the graph the input voltage at which the transistor begins to turn on.
(3)
d) If a resistive load of value 2.2 K is connected across the circuit output, by
how much must the circuit input voltage be reduced by in order that the
output voltage remains at 6.0 V?
(7)
+12.0V
1.0K
Vin
Vout
T
I
I
100K
T
Vin
Figure Q5
Vout
input voltage
output voltage
Transistor
transistor collector current
EO212 9 / 10
6) Figure Q6 shows an inverting amplifier circuit. Assume that the Op Amp has
infinite input impedance, a finite input error voltage  and that the open loop gain
may be approximated by a multi-pole open loop gain bode plot. The open loop
bode plot has a gain of Ap1 dBs from low frequencies to frequency fp1 and a
gain of Ap2 at the pole frequency fp2. Above the pole frequency fp1 the open
loop gain falls at –20 dBs for every decade change in frequency. Above the pole
frequency fp2 the open loop gain of the op amp falls at –40 dBs/decade.
a) The inverting amplifier circuit in figure Q6 has an input difference voltage . Give
a detailed explanation of what the relationship is between the current I1 in the
resistor R1 in terms of the input voltage Vin, difference voltage  and resistor
value R1?
(2)
b) What is the relationship between the current I2 in the feedback resistor R2 and
the current I1 in the resistor R1? Explain why they have the relationship you
have proposed.
(2)
c) Derive an expression for the voltage relationship between the input voltage
Vin and output voltage Vout for the inverting amplifier circuit in figure Q6,
taking account of the input difference voltage . Show all mathematical steps
in your derivation.
d)
(6)
Sketch the open loop multi-pole gain magnitude Bode approximation for the
Op Amp. Indicate the frequencies fp1 and fp2 and gains Ap1 and Ap2,
together with significant gradients. If the closed loop gain for the circuit in
figure Q6 is ‘–A’, indicate on your sketch the bandwidth at this frequency f
of the circuit if A<Ap2.
QUESTION 6 CONTINUED ON PAGE 10/10
(6)
EO212 10 / 10
e) Develop an equation for the closed loop gain A dB in terms of the open loop
gain Ap1 dB the frequency f and pole frequency fp1, Assume the frequency
fp2 is 100 times higher than the pole frequency fp1.
(7)
f) If the numerical closed loop circuit gain at the frequency f is 1000 what is the
numerical closed loop gain at the higher frequency 10f?
(2)
Inverting amplifier circuit
I2
I1
R2
Vin
input voltage
Vout
output voltage
R, R1,R2 resistors
input difference voltage
I1
current in resistor R1
I2
feedback current



R1

Vin
Vout
R
Figure Q 6