Download circuits and devices lab

EDAYATHANGUDI G.S.PILLAY ENGINEERING COLLEGE
NAGAPATTINAM
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
LAB MANUAL
Subject Code
: EC6211
Subject Name
: CIRCUITS AND DEVICES LAB
Year/Semester : I/II ECE
Name:_____________________________________
Reg no:____________________________________
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
LIST OF EXPERIMENTS
CYCLE I
1. Verification of KVL and KCL
2. Verification of superposition Theorem.
3. Verification of Thevenin and Norton Theorems.
4. Characteristics of PN junction diode.
5. Characteristics of Zener diode and regulator using Zener diode.
6. Characteristics of Clipper, Clamper & FWR
7. Characteristics of CE configuration
CYCLE II
8. Characteristics of CB configuration
9. Characteristics of SCR
10. Characteristics of JFET and MOSFET
11. Verification of Maximum power transfer and reciprocity theorems.
12. Frequency response of series and parallel RLC resonance circuits.
13. Transient analysis of RL and RC circuits..
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-KIRCHOFF’S VOLTAGE LAW
TABULATION
VOLTMETER READING
SUPPLY
VOLTAGE
IN VOLTS
V in volts
THEORITICAL
VALUE
PRACTICAL
VALUE
V1 in volts
THEORITICAL
VALUE
PRACTICAL
VALUE
V2 in volts
THEORITICAL
VALUE
PRACTICAL
VALUE
5V
10 V
15 V
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
01
VERIFICATION OF KIRCHOFF’S LAWS
A.KIRCHOFF’S VOLTAGE LAW
AIM:
To verify the Kirchhoff’s Voltage law for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
2.
APPARATUS
RPS
Resistors
3.
4.
5.
Voltmeter
Bread Board
Connecting wires
RANGE
(0-30) V
5.6 kΩ
4.7 kΩ
(0-30)V
-
QUANTITY
1
1
1
2
1
few
THEORY:
KIRCHOFF’S VOLTAGE LAW:
In a closed circuit, the sum of potential drops is equal to the sum of the potential
rises.
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Supply voltage from the RPS is varied and the corresponding voltmeter
readings are noted down.
3. The same procedure is repeated for various values of supply voltage.
4. Compare the theoretical value with the practical value.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
Supply voltage given V = ______________ Volts.
Total Resistance of the circuit, Req  R1  R2 =_____________Ω.
Total Current in the circuit, I

Where, V = ________ Volts &
V
( A)
Req
Req = ______Ω.
I = _____________A
Voltage drop across the resistor
R1  V1  I * R1 =
V1 =_____________V
Voltage drop across the resistor
R2  V2  I * R2 =
V2  _____________V
The Total Voltage V  V1  V2 =
V  _____________V
RESULT:
Thus, the Kirchhoff’s voltage law was verified.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-KIRCHOFF’S CURRENT LAW
TABULATION
AMMETER READING
SUPPLY
VOLTAGE
IN VOLTS
I (A)
THEORITICAL
VALUE
I1 (mA)
PRACTICAL
VALUE
THEORITICAL
VALUE
PRACTICAL
VALUE
I 2 (mA)
THEORITICAL
VALUE
PRACTICAL
VALUE
5V
10 V
15 V
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
B.KIRCHOFF’S CURRENT LAW
AIM:
To verify the Kirchhoff’s current law for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
2.
APPARATUS
RPS
Resistors
3.
4.
5.
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
1.5 kΩ
1 kΩ
2.2 kΩ
(0-30) mA
-
QUANTITY
1
1
1
1
3
1
few
THEORY:
KIRCHOFF’S CURRENT LAW:
In any electrical network, the sum of the currents flowing towards a junction is
equal to the sum of the currents flowing away from it.
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Supply voltage from the RPS is varied and the corresponding reading is noted.
3. The corresponding ammeter readings are noted down and the values are
tabulated.
4. The same procedure is repeated for various values of supply voltage.
5. Compare the theoretical value with the practical value.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
Total resistance of the Req  R1 
Total Current in the circuit, I

R2 R3
R2  R3
V
( A)
Req
Where, V = ________ Volts &
Req = ______Ω.
I = _____________A
Current flowing through R2 resistor, I1 
I * R3

R2  R3
I1 = ____________A
Current flowing through
R3 resistor, I 2  I * R2 
R2  R3
I 2 = ___________A
Total current in the circuit, I
 I1  I 2
RESULT:
Thus, the Kirchhoff’s current law was verified.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-THEVENIN’S THEOREM:
TO FIND VTH :
TO FIND RTH :
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
VERIFICATION OF THEVENIN’S THEOREM
AIM:
To verify the Thevenin’s theorem for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
APPARATUS
RPS
2.
Resistors
3.
4.
5.
6.
7.
8.
Variable resistance box
Voltmeter
Ammeter
Bread Board
Connecting wires
Multimeter
RANGE
(0-30) V
470 Ω
100 Ω
220 Ω
(0-30)V
(0-30) mA
-
QUANTITY
1
1
2
1
1
1
1
1
few
1
THEORY:
THEVENIN’S THEOREM:
Any two-terminal network containing resistances and voltage sources or current
sources may be replaced by a single voltage source in series with a single
resistance.
FORMULA:
Load current, I L 
VTH
RTH  RL
I L   Load current in amperes.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TO FIND I L :
TABULATION:
SUPPLY
VOLTAGE
(Volts)
OPEN CIRCUIT VOLTAGE
( VTH in Volts)
THEVENIN’S
RESISTANCE( RTH in Ohms)
THEORITICAL
VALUE
THEORITICAL
VALUE
PRACTICAL
VALUE
PRACTICAL
VALUE
I
LOAD CURRENT L (mA)
THEORITICAL
VALUE
PRACTICAL
VALUE
10 V
15 V
20 V
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
VTH   Thevenin’s voltage (or) open circuit voltage in volts.
RTH   Thevenin’s resistance in ohms.
RL   Load resistance in ohms.
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Remove the load resistance across the terminals AB and measure open circuit
voltage across it. This voltage is called thevenin’s voltage represented as Vth .
3. Remove the voltmeter from the terminals.
4. The voltage source is removed and short circuit the terminal and by using the
multimeter measure the looking back resistance (or) thevenin’s resistance.
5. Then calculate the current flowing through the removed load resistance
using the formula, I L 
RL by
VTH
.
RTH  RL
6. Repeat the same procedure for various value of supply voltage and tabulate
the readings.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
Theoretical value of
VTH in Volts:
To find VTH :
Total Resistance of the circuit, Req  R1  R2 =_____________Ω.
Total Current in the circuit, I

Where, V = ________ Volts &
V
( A) =
Req
Req = ______Ω.
I = _____________A
The open circuit voltage (or) thevenin’s voltage VTH = I * R2 =
VTH
Theoretical value of
RTH
= _____________Volts
in Ohms:
To find RTH :
Thevenin’s resistance, RTH 
R1 * R2
 R3 =
R1  R2
RTH = _____________Ω
Theoretical value of
I L in Amps:
To find I L :
Load current, I L 
VTH
=
RTH  RL
I L = _____________mA
RESULT:
Thus, the thevenin’s theorem for the given circuit was verified. The theoretical
and the practical values are found to be approximately equal.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-NORTON’S THEOREM:
TO FIND I SC :
TO FIND Rn :
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
VERIFICATION OF NORTON’S THEOREM
AIM:
To verify the Norton’s theorem for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
APPARATUS
RPS
2.
Resistors
3.
4.
5.
6.
7.
Variable resistance box
Ammeter
Bread Board
Connecting wires
Multimeter
RANGE
(0-30) V
470 Ω
100 Ω
220 Ω
(0-30) mA
-
QUANTITY
1
1
2
1
1
1
1
few
1
THEORY:
NORTON’S THEOREM:
Any two-terminal network containing resistances and voltage sources or current
sources may be replaced by a single current source in parallel with a single
resistance.
Load current, I L 
I SC
X Rn
Rn  RL
I L   Load current in amperes.
I SC   Short circuit current in Amps.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TO FIND I L :
TABULATION:
SUPPLY
VOLTAGE
(Volts)
SHORT CIRCUIT
NORTON’SRESISTANCE
I
( Rn in Ohms)
CURRENT( SC in Amps)
THEORITICAL
VALUE
PRACTICAL
VALUE
THEORITICAL
VALUE
PRACTICAL
VALUE
I
LOAD CURRENT L (mA)
THEORITICAL
VALUE
PRACTICAL
VALUE
10 V
15 V
20 V
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Rn   Norton’s resistance in ohms.
RL   Load resistance in ohms.
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Remove the load resistance and short circuit the output terminals.
3. Measure the current flowing through the short circuited path using an
ammeter, for a particular value of the supply voltage. Let this current be short
circuit current ( I SC ).
4. To find the Norton’s equivalent resistance, remove the load resistance and
replace all the sources by its internal resistance and measure the equivalent
resistance between the open output terminals by using a multimeter.
5. Then calculate the current flowing through the removed load resistance
using the formula, I L 
RL by
I SC
X Rn .
Rn  RL
6. Repeat the same procedure for various value of supply voltage and tabulate
the readings.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
I SC
Theoretical value of
in Amps:
To find I SC :
Total Resistance of the circuit, Req  R1 
V
( A) =
Req
Total Current in the circuit, I 
Where, V = ________ Volts &
R2 * R3
 _____________Ω.
R2  R3
Req = ______Ω.
I = _____________A
The short circuit current,
I SC
Theoretical value of
I SC 
I * R3

R2  R3
= _____________mA
Rn in Ohms:
To find Rn :
Norton’s resistance, Rn  R2 
R1 * R3

R1  R3
Rn = _____________Ω
Theoretical value of
I L in Amps:
To find I L :
Load current, I L 
I SC
X Rn =
Rn  RL
I L = _____________mA
RESULT:
Thus, the Norton’s theorem for the given circuit was verified. The theoretical and
practical values are found to be approximately equal.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-SUPERPOSITION THEOREM:
TO FIND I L :
When both the sources
22
V1 & V2 are acting together:
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
VERIFICATION OF SUPERPOSITION THEOREM
AIM:
To verify the Superposition theorem for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
APPARATUS
Dual RPS
2.
Resistors
3.
4.
5.
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
330 Ω
100 Ω
220 Ω
(0-100)mA
-
QUANTITY
1
1
1
1
1
1
few
THEORY:
SUPERPOSITION THEOREM:
In a network containing more than one source of voltage (or) current, the current
through any branch is the algebraic sum of the currents produced by each source acting
independently.
While one source is applied, the other sources are replaced by their respective
internal resistances. To replace other sources by their respective internal resistances, the
voltage sources are short circuited and the current sources are open circuited.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TO FIND I L1 :
When V1 is acting alone:
TO FIND I L 2 :
When
24
V2 is acting alone:
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE:
Step 1: [When both the sources
V1 & V2 are acting]
1. The connections are given per the circuit diagram.
2.
V1
Voltage and
V2
Voltage are given to the circuit from both the
regulated power supplies.
3. Note down the current flowing through 100 Ω resistor by using an
ammeter.
Step 2: [When supply voltage V1 is acting alone]
1. The connections are given per the circuit diagram.
2. Remove the supply voltage
3. Supply voltage
V1
V2
and replace it by its internal resistance.
is given to the circuit and the current flowing through
100 Ω resistor is noted down using the ammeter.
Step 3: [When supply voltage V2 is acting alone]
1. The connections are given per the circuit diagram.
2. Remove the supply voltage
3. Supply voltage
V2
V1
and replace it by its internal resistance.
is given to the circuit and the current flowing through
100 Ω resistor is noted down using the ammeter.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TO FIND I L :
When both the sources
V1 & V2 are acting together:
I
SUPPLY VOLTAGE(Volts)
V1 in Volts
V2 in volts
10 V
10 V
LOAD CURRENT L (mA)
THEORITICAL VALUE
PRACTICAL VALUE
I L (mA)
I L (mA)
TO FIND I L1 :
When V1 is acting alone:
I
LOAD CURRENT L1 (mA)
SUPPLY VOLTAGE
V1 (Volts)
THEORITICAL VALUE
PRACTICAL VALUE
I L1 (mA)
I L1 (mA)
10 V
TO FIND I L 2 :
When
V2 is acting alone:
SUPPLY VOLTAGE
V2 (Volts)
LOAD CURRENT
THEORITICAL VALUE
IL2
(mA)
IL2
(mA)
PRACTICAL VALUE
IL2
(mA)
10 V
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
Theoretical value of
I L in Amps: [When both the sources V1 & V2 are acting]
To find I L :
Apply KVL to the circuit (2):
Loop ABEFA
10  330I1  100I 2  0
330 I1  100 I 2  10
-------> (1)
Loop BCDEB
220( I1  I 2 )  10  100I 2  0
220I1  220I 2  10  100I 2  0
220 I1  320 I 2  10
--------> (2)
Apply Cramer’s rule,
 I I   330 100 
D   11 12   

 I 21 I 22   220 320 
D  127600
 I V   330 10 
D2   11 1   

 I 21 V2   220 10 
D2  5500
IL  I2 
D2
5500

 43.1mA
D 127600
I L  43.1 mA
I L  I 2  43.1mA  43.1X 103 A
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Theoretical value of I L1 in Amps: [When supply voltage V1 is acting alone]
To find I L1 :
By Ohm’s law,
I 
Here I 
V
R
R2 * R3
V
( A) ----> Req  R1 
R2  R3
Req
Req  330 
I
100 X 220
 398.75
100  220
10
 25mA
398.75
By using current division rule,
I * R3 (25 X 103 ) X 220
I L1 

R2  R3
100  220
I L1  17mA
Theoretical value of
IL2
in Amps: [When supply voltage V2 is acting alone]
To find I L 2 :
By Ohm’s law,
I 
V
R
R1 * R2
V
R

R

( A) ----> eq
3
Here I 
R1  R2
Req
Req  220 
29
330 X 100
 296.75
330  100
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
I
10
 33mA
296.75
By using current division rule,
I * R1 (33 X 103 ) X 330
I L2 

R1  R2
330  100
I L 2  25mA
By the statement of superposition theorem,
I L  I L1  I L 2
43.1mA  17mA  25mA
43.1mA  42mA
43.1mA  42mA
OBSERVATION:
OUTPUT
I L (mA)
I L1 (mA)
I L 2 (mA)
THEORITICAL
VALUE
PRACTICAL
VALUE
RESULT:
Thus, the superposition theorem was verified. The theoretical and practical values
are found to be approximately equal.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-MAXIMUM POWER TRANSFER THEOREM:
TO FIND VTH :
TO FIND RTH :
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
VERIFICATION OF MAXIMUM POWER TRANSFER THEOREM
AIM:
To verify the Maximum power transfer theorem for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
APPARATUS
RPS
2.
Resistors
3.
4.
5.
6.
7.
8.
Variable resistance box
Voltmeter
Ammeter
Bread Board
Connecting wires
Multimeter
RANGE
(0-30) V
470 Ω
330 Ω
390 Ω
(0-30)V
(0-10)mA
-
QUANTITY
1
1
1
1
1
1
1
1
few
1
THEORY:
MAXIMUM POWER TRANSFER THEOREM:
In a linear lumped bilateral electric circuit, maximum power is transferred from
source to load, when the load resistance ( RL ) is equal to the thevenin’s resistance ( RTH ).
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Remove the load resistance ( RL ) across the terminals AB and measure open
circuit voltage across it by using the voltmeter. This voltage is called
thevenin’s voltage represented as Vth .
3. Remove the voltmeter from the terminals.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TO FIND I L :
TABULATION:
LOAD
RL (Ω)
OPEN CIRCUIT
VOLTAGE
( VTH in Volts)
THEORI
TICAL
VALUE
PRACTIC
AL
VALUE
THEVENIN’S
RESISTANCE
( RTH in Ohms)
THEORITIC
AL VALUE
PRACTICAL
VALUE
I
LOAD CURRENT L
(mA)
THEORITIC
AL VALUE
PRACTICA
L VALUE
LOAD POWER
P(mW)
THEORITIC
AL VALUE
200 Ω
400 Ω
583 Ω
600 Ω
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PRACTICAL
VALUE
4. The voltage source is removed and short circuit the terminal and by using the
multimeter measure the looking back resistance (or) thevenin’s resistance.
5. Then calculate the current flowing through the removed load resistance
RL by
using the formula,
IL 
VTH
.
RTH  RL
For maximum power transfer theorem, RTH
 RL
6. To calculate the power through RL by using the formula,
RL  RTH
P  I L 2 * RL
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH:
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
To find VTH :
For voltage V =_________Volts.
Total Resistance of the circuit, Req  R1  R2 =_____________Ω.
Total Current in the circuit, I

V
( A) =
Req
I = _____________A
The open circuit voltage (or) thevenin’s voltage VTH = I * R2 =
VTH
= _____________Volts
To find RTH :
Thevenin’s resistance, RTH 
R1 * R2
 R3 =
R1  R2
RTH = _____________Ω
To find I L :
RL  RTH
Load current, I L 
VTH
=
RTH  RL
I L = _____________mA
To find P:
Load power,
P  I L 2 * RL
P = _____________mW.
RESULT:
Thus, the maximum power transfer theorem for the given circuit is verified. The
maximum power _________ is occurred at _______ Ω resistance.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-RECIPROCITY THEOREM:
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
VERIFICATION OF RECIPROCITY THEOREM
AIM:
To verify the Reciprocity theorem for the given circuit.
APPARATUS REQUIRED:
S.NO
1.
APPARATUS
RPS
2.
Resistors
3.
4.
5.
6.
Voltmeter
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
470 Ω
220 Ω
330 Ω
(0-30)V
(0-10)mA
-
QUANTITY
1
1
1
1
1
1
1
few
THEORY:
RECIPROCITY THEOREM:
Reciprocity theorem states that “In a linear, bilateral network a voltage source V
volts in a branch gives rise to a current I in another branch, the ratio V/I is constant when
the positions of V and I are interchanged.
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Supply from the RPS is varied and the corresponding values in the voltmeter
and ammeter are noted down.
3. Tabulation is made by these readings.
4. The same procedure is repeated for various values of supply voltage.
39
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION:
STEP 1
SUPPLY
VOLTA
GE IN
VOLTS
AMMETER READING
(mA)
THEORITIC
AL VALUE
PRACTICA
L VALUE
STEP 2
R1  V1 / I1 (kΩ)
THEORITIC
AL VALUE
PRACTICAL
VALUE
SUPPLY
VOLTA
GE IN
VOLTS
3V
3V
5V
5V
7V
7V
40
AMMETER READING (mA)
THEORITIC
AL VALUE
PRACTICAL
VALUE
R2  V2 / I 2 (kΩ)
THEORITIC
AL VALUE
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PRACTICAL
VALUE
5. Then the reciprocity theorem should be verified both theoretically and
practically.
6. By changing excitation and response, the value must be equal and should be
verified.
MODEL CALCULATION:
To find I1 :
For voltage
V1 =_________Volts.
Total Resistance of the circuit, Req  R1 
Total Current in the circuit, I1

R2 R3
=_____________Ω.
R2  R3
V1
( A) =
Req
I1 = _____________mA
To find I L1 :
I L1 
I1 * R2

R2  R3
I L1 = _____________mA
To find I 2 :
For voltage
V2 =_________Volts.
Total Resistance of the circuit, Req  R3 
Total Current in the circuit, I 2 
I2
41
R1 * R2
=_____________Ω.
R1  R2
V2
( A) =
Req
= _____________mA
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
42
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
To find I L 2 :
I L2 
I 2 * R2

R2  R3
I L 2 = _____________mA
To find R1 :
By Ohm’s law, V=I*R ---->
V
V
------> R 
R
I
V1
=
I1
Here, R1 
R1
I
= _____________kΩ
To find R2 :
By Ohm’s law, V=I*R ---->
Here, R2 
R2
I
V
V
------> R 
R
I
V2
=
I2
= _____________kΩ
OBSERVATION:
OUTPUT
R1
(kΩ)
R2
(kΩ)
THEORITICAL
VALUE
PRACTICAL
VALUE
RESULT:
Thus, the reciprocity theorem was verified.
43
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-SERIES RESONANCE CIRCUIT:
44
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
FREQUENCY RESPONSE OF SERIES RESONANCE CIRCUIT
AIM:
To verify the series resonance condition for a series RLC circuit.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
5.
6.
7.
APPARATUS
Function generator (or)
Signal generator
Resistor
Decade inductance box
Capacitor
CRO
Bread Board
Connecting wires
RANGE
-
QUANTITY
1
1 kΩ
1 µF
-
1
1
1
1
1
few
THEORY:
It is an important phenomenon in electric circuit containing both capacitor and
inductor. Resonance is defined as a phenomenon which occurs in any physical system,
when a fixed amplitude forcing function is applied. It produces a response of minimum
amplitude. Following is the list of few system in which resonance occurs.
45

Electrical.

Mechanical.

Hydraulic.

Acoustic.
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION:
46
S.NO
FREQUENCY (Hz)
1
300 Hz
2
400 Hz
3
500 Hz
4
600 Hz
5
700 Hz
6
800 Hz
7
900 Hz
8
1000 Hz
9
1100 Hz
10
1200 Hz
11
1300 Hz
12
1400 Hz
13
1500 Hz
14
1600 Hz
15
1700 Hz
VOLTAGE (V)
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Following are the characteristics of series resonant circuit.

Input impedance is purely resistive.

Applied voltage and current are in phase.

Circuit current is maximum.

Power factor is unity.

Voltage across the inductor and capacitor are equal in
magnitude and opposite in phase.
PROCEDURE:
1. Connect the various elements R, L, C as shown in the circuit diagram. Set
the decade boxes to obtain the required values of R, L and C as given in
the circuit diagram.
2. Switch on the supply and set function generator to a low frequency of say
300 Hz and note the corresponding voltage in the CRO.
3. Repeat the same procedure for different values of frequency.
4. Tabulate the observations.
5. Note down the resonance frequency from the table.
6. Draw the graph of frequency in Hz Vs voltage in volts.
47
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH:
48
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
The resonant frequency of a series RLC circuit is given by,
fs 
1
2 L * C
Where, L  50mH
 50 X 103
C  1 f  1X 106
fs 
1
2 (50 X 103 )*(1X 106 )
f s  712.12Hz
OBSERVATION:
OUTPUT
fs
(Hz)
THEORITICAL
VALUE
PRACTICAL
VALUE
RESULT:
Thus, the frequency response of series resonance circuit was verified.
49
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-PARALLEL RESONANCE CIRCUIT:
50
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
FREQUENCY RESPONSE OF PARALLEL RESONANCE CIRCUIT
AIM:
To verify the series resonance condition for a parallel RLC circuit.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
5.
6.
7.
APPARATUS
Function generator (or)
Signal generator
Resistor
Decade inductance box
Capacitor
CRO
Bread Board
Connecting wires
RANGE
-
QUANTITY
1
1 kΩ
1 µF
-
1
1
1
1
1
few
THEORY:
A parallel circuit is said to be in resonance when applied voltage and resulting
current are in phase that gives unity power factor condition.
The resonant frequency of a parallel RLC circuit is given by,
fp 
51
1
2 L * C
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION:
52
S.NO
FREQUENCY (Hz)
1
300 Hz
2
400 Hz
3
500 Hz
4
600 Hz
5
700 Hz
6
800 Hz
7
900 Hz
8
1000 Hz
9
1100 Hz
10
1200 Hz
11
1300 Hz
12
1400 Hz
13
1500 Hz
14
1600 Hz
15
1700 Hz
VOLTAGE (V)
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE:
1. Connect the various elements R, L, C as shown in the circuit diagram. Set
the decade boxes to obtain the required values of R, L and C as given in
the circuit diagram.
2. Switch on the supply and set function generator to a low frequency of say
300 Hz and note the corresponding voltage in the CRO.
3. Repeat the same procedure for different values of frequency.
4. Tabulate the observations.
5. Note down the resonance frequency from the table.
6. Draw the graph of frequency in Hz Vs voltage in volts.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH:
54
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL CALCULATION:
The resonant frequency of a series RLC circuit is given by,
fp 
1
2 L * C
Where, L  50mH
 50 X 103
C  1 f  1X 106
fp 
1
2 (50 X 103 )*(1X 106 )
f p  712.12 Hz
OBSERVATION:
OUTPUT
fp
(Hz)
THEORITICAL
VALUE
PRACTICAL
VALUE
RESULT:
Thus, the frequency response of parallel resonance circuit was verified.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
56
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
ELECTRONIC DEVICES EXPERIMENTS
57
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-FORWARD BIAS:
PN JUNCTION DIODE-SYMBOL
PN JUNCTION DIODE (IN 4007) -PIN CONFIGURATION
P
58
N
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF PN JUNCTION DIODE
AIM:
(i)
To plot the forward and reverse V-I characteristics of given PN-junction
diode.
(ii)
To find the dynamic forward and reverse resistance offered by the PNdiode.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
APPARATUS
RPS
PN junction diode
Resistor
Voltmeter
5.
Ammeter
7.
8.
Bread Board
Connecting wires
RANGE
(0-30) V
IN 4007
1 kΩ
(0-1) V
(0-10) V
(0-10) mA
(0-500) µA
-
QUANTITY
1
1
1
1
1
1
1
1
few
THEORY:
The V-I characteristics is a graph drawn between the voltage applied across the
terminals of a device and the current that flows through it.
The characteristics of PN junction diode are classified as,
59

Forward V-I characteristics (Forward bias).

Reverse V-I characteristics (Reverse bias)
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION:
S.NO
FORWARD VOLTAGE
VF (V )
FORWARD CURRENT I F (mA)
1
2
3
4
5
6
7
8
9
10
60
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
FORWARD BIAS:

In forward bias, the positive terminal of the battery is connected with P side
(anode) of the diode and the negative terminal of the battery is connected with the
N side (cathode) of the diode.

When a diode is connected in the forward bias, the electrons of the N material and
holes of the P material are repelled by the negative and positive terminals of the
battery respectively towards the junction. Some of the electrons and holes enter
into the depletion region and they are recombines with each other. This reduces
the width as well as height of the potential barriers.

As a result of this, more majority carriers diffuse across the junction. Therefore it
causes a large current to flow through the PN junction. The forward voltage at
which the diode starts to conduct is called cut-in voltage, knee voltage (or)
threshold voltage.

Normally the cut-in voltage for silicon diode is 0.7V and the germanium diode
is 0.3V.so we can say the diode conducts the signal only in forward bias. In other
words, the diode is ON in forward bias.
REVERSE BIAS:

In reverse bias, the negative terminal of the battery is connected with P side
(anode) of the diode and the positive terminal of the battery is connected with the
N side (cathode) of the diode.

When a diode is connected in reverse bias, the electrons of the N material and
holes of the P materials are attracted by the positive terminal and negative
terminal of the battery respectively.

If we increase the reverse voltage, the depletion region width and the height of the
potential barrier is increased. Therefore there is no possibility of majority charge
carrier current can flow across a reverse-biased junction.

The minority carriers generated on each side can still cross the junction. Electrons
in the p-side are attracted across the junction to the positive voltage on the n-side.
Holes on the n-side may flow across to the negative voltage on the p-side. Since
only a very small reverse current can flows through the junction.
61
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-REVERSE BIAS:
TABULATION:
S.NO
REVERSE VOLTAGE
VR (V )
REVERSE CURRENT
I R ( A)
1
2
3
4
5
6
7
8
9
10
62
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)

The reverse voltage at which the diode starts to conduct is called breakdown
voltage. So, we can say the diode won’t conduct the signal in its reverse bias. In
other words the diode is OFF in reverse bias.
PROCEDURE:
PN-JUNCTION DIODE FORWARD BIAS
1. The connections are given as per the circuit diagram.
2. Vary the supply voltage from RPS in steps and note down the
voltmeter readings.
3. The corresponding current is noted from Ammeter and tabulated.
4. Plot the graph between forward voltage
VF (V ) and forward current
I F (mA) .
5. From the graph calculate the Forward dynamic resistance using the
formula,
Dynamic resistance, ri

1
Slope of the forward characteristics
Slope 
ri 
63
I F
VF
V
Change in voltage
 F
Resulting change in current I F
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH:
V-I CHARACTERISTICS OF PN JUNCTION DIODE
64
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE:
PN-JUNCTION DIODE REVERSE BIAS
1. The connections are given as per the circuit diagram.
2. Vary the supply voltage from RPS in steps and note down the
voltmeter readings.
3. The corresponding current is noted from Ammeter and tabulated.
4. In reverse bias only limted current flows through the diode.
5. Plot the graph between reverse voltage
VR (V ) and reverse current
I R (  A) .
6. From the graph calculate the Reverse dynamic resistance using the
formula,
Dynamic resistance, ri 
Slope 
ri 
65
1
Slope of the reverse characteristics
I R
VR
V
Change in voltage
 R
Resulting change in current I R
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
66
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
RESULT:
Thus the V-I characteristics of PN-junction diode were drawn for both forward
and reverse bias.
1. Dynamic forward resistance was found to be_____________Ω.
2. Dynamic reverse resistance was found to be_____________Ω.
67
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-ZENER DIODE-FORWARD BIAS:
ZENER DIODE -SYMBOL
ZENER DIODE (IN 2646C) -PIN CONFIGURATION
P
68
N
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF ZENER DIODE
AIM:
(i)
To plot the forward and reverse V-I characteristics of the given Zener
diode.
(ii)
To find the dynamic forward resistance offered by the Zener diode.
(iii)
To find the reverse breakdown voltage of the given Zener diode.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
APPARATUS
RPS
Zener diode
Resistor
Voltmeter
5.
7.
8.
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
IN 4007
1 kΩ
(0-1) V
(0-10) V
(0-10) mA
-
QUANTITY
1
1
1
1
1
2
1
few
THEORY:

A Zener diode is a properly doped crystal diode which has a sharp breakdown
voltage. When the reverse bias on a crystal diode is increased, a critical voltage
called breakdown voltage is reached where the reverse current increases sharply
to a high value.

When the doping is heavy, even the reverse voltage is low, the electric field at
barrier will be so strong thus the electrons in the covalent bonds can break away
from the bonds. This effect is called Zener effect.

Zener diode is available with breakdown voltages 0f 4.7 V, 6.2 V, 8.2 V, 12 V.
69
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION:
S.NO
FORWARD VOLTAGE
VF (V )
FORWARD CURRENT I F (mA)
1
2
3
4
5
6
7
8
9
10
70
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)

Breakdown occurs due to the avalanche multiplication between the thermally
generated ions as a chain of collisions are called Avalanche breakdown. The
Zener diode with breakdown voltages of less than 6V operates predominantly in
Zener breakdown. The Zener diode with breakdown voltages greater than 6V
operates predominantly in Avalanche breakdown.
PROCEDURE:
ZENER DIODE FORWARD BIASED:
1. The connections are given as per the circuit diagram.
2. Vary the supply voltage from RPS in steps and note down the voltmeter
readings.
3. The corresponding current is noted from Ammeter and tabulated.
4. Plot the graph between forward voltage
VF (V ) and forward current
I F (mA) .
5. From the graph calculate the Forward dynamic resistance using the
formula,
Dynamic resistance, ri 
Slope 
ri 
71
1
Slope of the forward characteristics
I F
VF
V
Change in voltage
 F
Resulting change in current I F
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-REVERSE BIAS:
TABULATION:
S.NO
REVERSE VOLTAGE
VR (V )
REVERSE CURRENT
I R ( A)
1
2
3
4
5
6
7
8
9
10
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE:
ZENER DIODE REVERSE BIASED:
1.
The connections are given as per the circuit diagram.
2.
Vary the supply voltage from RPS in steps and note down the voltmeter
readings.
3.
The corresponding current is noted from Ammeter and tabulated.
4.
Plot the graph between reverse voltage
5.
From the graph calculate the Reverse dynamic resistance using the formula,
Dynamic resistance, ri

1
Slope of the reverse characteristics
Slope 
ri 
VR (V ) and reverse current I R (  A) .
I R
VR
V
Change in voltage
 R
Resulting change in current I R
6.
From the graph also find the reverse breakdown voltage.
73
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH:
V-I CHARACTERISTICS OF ZENER DIODE
74
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
RESULT:
Thus the V-I characteristics of Zener diode were drawn for both forward and
reverse bias.
1. Dynamic forward resistance was found to be_____________Ω.
2. Dynamic reverse resistance was found to be_____________Ω.
3. The reverse breakdown voltage was found to be____________V.
75
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-CE CONFIGURATION:
BJT –NPN TRANSISTOR -SYMBOL
BJT (BC 107)-PIN CONFIGURATION
76
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF BJT IN CE CONFIGURATION
AIM:
To plot the input and output characteristics of BJT in CE configuration.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
APPARATUS
Dual RPS
NPN Transistor
Resistor
4.
Voltmeter
5.
Ammeter
7.
8.
Bread Board
Connecting wires
RANGE
(0-30) V
BC 107
1 kΩ
10 kΩ
(0-1) V
(0-10) V
(0-10) mA
(0-500) µA
-
QUANTITY
1
1
1
1
1
1
1
1
1
few
THEORY:

A transistor consists of two PN junctions. They are formed by sandwiching P type
(or) N type semiconductor layer with a pair of PN junction. It has three junctions
called Emitter, Base, Collector labeled as E, B, C respectively.

There are two types of transistors called NPN and PNP. When transistor is
connected in a circuit one terminal is considered to be common for input and
output. According to the common terminal the transistor is configured as common
emitter, common base, and common collector.

The configuration in which emitter is common to the input and output is known as
common emitter configuration.
77
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR INPUT CHARACTERISTICS OF BJT IN CE CONFIGURATION
VCE
VCE
= 2V
= 4V
S.NO
VBE (V)
I B (µA)
VBE (V)
I B (µA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-INPUT CHARACTERISTICS OF CE CONFIGURATION
78
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
There are two types of transistor characteristics namely,
(i)
Input characteristics.
(ii)
Output characteristics.
INPUT CHARACTERISTICS:

Input characteristics gives the relation between input current and input voltage
at constant output voltage .In CE configuration this curve is drawn between
base current ( I B ) and the base-emitter voltage (VBE ) at constant collector
emitter voltage (VCE ) .

When
I B increases VBE increase. When VCE
increases the width of the base
region increase and reduces the base current. This phenomenon is known as
early effect.
OUTPUT CHARACTERISTICS:

Output characteristics give the relation between output current and output
voltage at constant input current. In CE configuration this curve is drawn
between collector current
( I C ) and
the collector - emitter voltage (VCE ) at
constant base current ( I B ) .

The output characteristics are divided as active region, cut-off region and
saturation region. The characteristic obtained when the collector current ( I C )
is nearly zero is known as cut-off region.

It is obtained when both the PN junctions are reverse biased. The saturation
region characteristic is obtained when both the junctions are forward biased.
The collector current ( I C ) in this region is independent of base current ( I B ) .

In the active region the collector current ( I C ) increases linearly with the
increase in collector - emitter voltage (VCE ) .
79
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR OUTPUT CHARACTERISTICS OF BJT IN CE CONFIGURATION
I B =15µA
I B =20µA
S.NO
VCE (V)
IC
(mA)
VCE (V)
IC
(mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-OUTPUT CHARACTERISTICS OF CE CONFIGURATION
80
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE
1. The connections are given as per the circuit diagram.
2. For input characteristics VCE voltage is kept at a fixed value.
increased gradually and the changes in
3. This process is repeated for various
4. For output characteristics
I B is
gradually and the changes in
VBE Voltage is
I B are noted down and tabulated.
VCE values.
kept at a fixed value.
VCE Voltage is increased
I C are noted down and tabulated.
5. This process is repeated for various
I B values.
6. Graphs are drawn.
RESULT:
Thus, the input and output characteristics of given transistor was done under
common emitter configuration.
81
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-CB CONFIGURATION:
BJT –NPN TRANSISTOR -SYMBOL
BJT (BC 107)-PIN CONFIGURATION
82
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF BJT IN CB CONFIGURATION
AIM:
To plot the input and output characteristics of BJT in CB configuration.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
APPARATUS
Dual RPS
NPN Transistor
Resistor
4.
Voltmeter
5.
7.
8.
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
BC 107
1 kΩ
10 kΩ
(0-1) V
(0-10) V
(0-10) mA
-
QUANTITY
1
1
1
1
1
1
2
1
few
THEORY:

A transistor consists of two PN junctions. They are formed by sandwiching P type
(or) N type semiconductor layer with a pair of PN junction. It has three junctions
called Emitter, Base, Collector labeled as E, B, C respectively.

There are two types of transistors called NPN and PNP. When transistor is
connected in a circuit one terminal is considered to be common for input and
output.

According to the common terminal the transistor is configured as common
emitter, common base, and common collector. The configuration in which base is
common to the input and output is known as common base configuration.

There are two types of transistor characteristics namely,
(i) Input characteristics.
(ii) Output characteristics.
83
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR INPUT CHARACTERISTICS OF BJT IN CB CONFIGURATION
VCB
VCB
= 2V
= 4V
S.NO
VEB (V)
I E (mA)
VEB (V)
I E (mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-INPUT CHARACTERISTICS OF CB CONFIGURATION
84
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
INPUT CHARACTERISTICS:

Input characteristics gives the relation between input current and input voltage
at constant output voltage .In CB configuration this curve is drawn between
emitter current ( I E ) and the emitter-base voltage (VEB ) at constant collectorbase voltage (VCB ) .

When
I B increases VEB increase.
When VCB increases the value of
IE
decrease for a particular VEB .
OUTPUT CHARACTERISTICS:

Output characteristics give the relation between output current and output
voltage at constant input current. In CB configuration this curve is drawn
between collector current
( I C ) and
the collector – base voltage (VCB ) at
constant emitter current ( I E ) .

The output characteristics are divided as active region, cut-off region and
saturation region. The characteristic obtained when the collector current ( I C )
is nearly zero is known as cut-off region.

It is obtained when both the PN junctions are reverse biased. The saturation
region characteristic is obtained when both the junctions are forward biased.
The collector current ( I C ) in this region is independent of emitter current
(IE ) .

In the active region the collector current ( I C ) increases linearly with the
increase in collector-base voltage (VCB ) .
85
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR OUTPUT CHARACTERISTICS OF BJT IN CB CONFIGURATION
I E =1.5 mA
I E =2 mA
S.NO
VCB (V)
IC
(mA)
VCB (V)
IC
(mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-OUTPUT CHARACTERISTICS OF CB CONFIGURATION
86
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE
1. The connections are given as per the circuit diagram.
2. For input characteristics VCB voltage is kept at a fixed value.
increased gradually and the changes in
3. This process is repeated for various
4. For output characteristics
I E is
gradually and the changes in
VBE Voltage is
I E are noted down and tabulated.
VCB values.
kept at a fixed value.
VCB Voltage is increased
I C are noted down and tabulated.
5. This process is repeated for various
I E values.
6. Graphs are drawn.
RESULT:
Thus, the input and output characteristics of given transistor was done under
common base configuration.
87
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-JFET:
N- CHANNELJFET SYMBOL
D
G
S
JFET (BFW 10)-PIN CONFIGURATION
88
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF JFET
AIM:
To plot the drain and transfer characteristics of JFET.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
5.
7.
8.
APPARATUS
Dual RPS
FET
Resistor
Voltmeter
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
BFW10
470 Ω
(0-10) V
(0-10) mA
-
QUANTITY
1
1
2
2
1
1
few
THEORY:

Field effect transistor is one type of transistor having three terminals namely gate,
source and drain.

The current conduction in this device is only due to majority carriers. In the
normal operation of FET, gate source junction is always reverse biased.
DRAIN CHARACTERISTICS:

Drain characteristics is the curve between drain current ( I D ) and drain to source
voltage
(VDS ) at constant gate to source voltage (VGS ) .

The current increases linearly with voltage and remains constant at its maximum
voltage.

When the voltage is further increased rapidly leading to the breakdown of the
device. This characteristic is used to find drain resistance of FET.
89
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR DRAIN CHARACTERISTICS OF JFET
VGS
VGS
= - 2V
= - 3V
S.NO
VDS
(V)
I D (mA)
VDS
(V)
I D (mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-DRAIN CHARACTERISTICS OF JFET
90
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TRANSFER CHARACTERISTICS:

Transfer characteristics are the curve between drain current and gate to source
voltage at constant drain to source voltage.

When gate to source voltage is zero, the depletion regions are small and the drain
current will be maximum. When the voltage is increased, the depletion region
increases and reduces the current.

This voltage is called pinch-off voltage. From this characteristic, we can find the
transconductance of FET.
DC DRAIN RESISTANCE

It is also called the static or ohmic resistance of the channel and is given by the
ratio of voltage to drain current.
AC DRAIN RESISTANCE

It is also called dynamic drain resistance and is the ac resistance between the drain
and source terminal, when the JFET is operating in the pinch-off voltage of
saturation region.

It is given by the ratio of small change in drain to source voltage to the
corresponding change in drain current for a constant gate to source voltage.

It is the resistance from drain to source terminals. Since drain voltage is the output
resistance of JFET. It may also be expressed as output admittance.
91
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR TRANSFER CHARACTERISTICS OF JFET
VDS =1 V
VDS =2V
S.NO
VGS (V)
ID
(mA)
VGS (V)
ID
(mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-TRANSFER CHARACTERISTICS OF JFET
92
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE
DRAIN CHARACTERISTICS
1. The connections are given as per the circuit diagram.
2. For drain characteristics set
VGS to a constant value.
3. The drain to source voltage
VDS
is varied from “0” volt, in steps of 1 V
and in each step the corresponding drain current is noted by using the
ammeter.
VDS
is also noted by using voltmeter. This is conducted till the
drain current becomes constant.
4. This process is repeated for various
VGS values.
5. Plot the drain characteristics.
PROCEDURE
TRANSFER CHARACTERISTICS
1. The connections are given as per the circuit diagram.
2. For transfer characteristics set
VDS to a constant value.
3. The gate to source voltage is varied in steps of 1 V and in each steps
VGS and
drain current is noted down. This is continued till the drain
current becomes zero.
4. This process is repeated for various
VDS values.
5. Plot the transfer characteristics.
RESULT:
Thus, the drain and transfer characteristics of given JFET was obtained.
93
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-MOSFET:
N- CHANNEL MOSFET SYMBOL
MOSFET (IR 740)-PIN CONFIGURATION
94
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF MOSFET
AIM:
To plot the drain and transfer characteristics of MOSFET.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
5.
7.
8.
APPARATUS
Dual RPS
MOSFET
Resistor
Voltmeter
Ammeter
Bread Board
Connecting wires
RANGE
(0-30) V
IR 740
470 Ω
(0-10) V
(0-10) mA
-
QUANTITY
1
1
2
2
1
1
few
THEORY:

MOSFET is an improved version of JFET and is widely used in many circuit
applications. The input impedance of MOSFET is much more than that of JFET
because of very small gate leakage current.

It has 3 terminals namely source, gate and drain.

The output characteristic of MOSFET is the plot of drain to source voltage (VDS )
against the drain current

The threshold voltage
( I D ) at constant gate to source voltage (VGS ) .
(VT ) is the minimum voltage for forming virtual channel
between drain and source. If
VGS is increased beyond VT , the drain current (drain
to source current) begins to flow. There are three regions in the V-I characteristic
of MOSFET namely
95
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR DRAIN CHARACTERISTICS OF MOSFET
VGS
VGS
= - 2V
= - 3V
S.NO
VDS
(V)
I D (mA)
VDS
(V)
I D (mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-DRAIN CHARACTERISTICS OF MOSFET
96
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
(i)
Cut-off region, where
VGS <= VT .there will not be any drain current
flow due to the absence of virtual channel. The MOSFET is said to be in
OFF state.
(ii)
Pinch-off (or) saturation region, Where
off occurs when
VDS = VGS  VT .the
VDS >= VGS  VT .The
Pinch-
drain current remains almost
constant for any increase in the value of VDS .
(iii)
Linear region, Where
VDS <= VGS  VT .The
drain current
I D varies
proportion to the VDS .
DRAIN CHARACTERISTICS

Drain characteristics is the plot of drain to source voltage
current ( I D ) at constant gate to source voltage

Until the threshold voltage
(VDS ) against
drain
(VGS ) .
(VT ) is reached there won’t be any drain current and
the device is in OFF state.
TRANSFER CHARACTERISTICS:

Transfer characteristics are the plot of gate to source voltage
(VGS ) against drain
current ( I D ) at constant drain to source voltage (VDS ) .
97
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR TRANSFER CHARACTERISTICS OF MOSFET
VDS =1 V
VDS =2V
S.NO
VGS (V)
ID
(mA)
VGS (V)
ID
(mA)
1
2
3
4
5
6
7
8
9
10
MODEL GRAPH-TRANSFER CHARACTERISTICS OF MOSFET
98
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE
DRAIN CHARACTERISTICS
1.
The connections are given as per the circuit diagram.
2.
Keep the gate to source voltage
(VGS ) at a particular voltage and vary the
drain to source voltage (VDS ) till the MOSFET gets turn on and note
down the voltmeter, ammeter readings and tabulate.
3.
Further increase the drain to source voltage (VDS ) and note the drain
current ( I D ) .
4.
The above process is repeated for different values of gate to source voltage
(VGS ) .
5.
Plot the drain characteristics.
TRANSFER CHARACTERISTICS
1.
The connections are given as per the circuit diagram.
2.
Keep the drain to source voltage
the gate to source voltage
(VDS ) at a particular voltage and vary
(VGS ) till the MOSFET gets turn on and note
down voltmeter, ammeter readings and tabulate.
3.
Further increase the gate to source voltage
(VGS ) and
note the drain
current ( I D ) .
4.
The above process is repeated for different values of drain to source
voltage (VDS ) .
5.
Plot the transfer characteristics.
RESULT:
Thus, the drain and transfer characteristics of given MOSFET was obtained.
99
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-SILICON CONTROLLED RECTIFIER(SCR)
SCR SYMBOL
100
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
CHARACTERISTICS OF SCR
AIM:
To plot anode
(VAK  I A ) forward
conduction characteristics including the
measurement of holding and latching currents.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
APPARATUS
Dual RPS
SCR
Resistor
4.
5.
Voltmeter
Ammeter
7.
8.
Bread Board
Connecting wires
RANGE
(0-30) V
TYN 1006
1 kΩ
10 kΩ
(0-10) V
(0-10) mA
(0-500) µA
-
QUANTITY
1
1
1
1
1
1
1
1
few
THEORY:

A silicon controlled rectifier is a semiconductor device that acts as a true
electronic switch. It can change ac into dc and at the same time can control the
amount of power fed to the load.

It combines the features of a rectifier and transistor. It is sometimes called as
thyristor.

It contains three terminals namely anode, cathode and gate. It is a unidirectional
device.SCR conducts only where the anode is positive with respect to cathode
with proper gate current.SCR can turn ON and OFF by two methods.
101
i.
TURN ON METHODS
ii.
TURN OFF METHODS
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION FOR CHARACTERISTICS OF SCR
IG 
IG 
S.NO
VAK
(V)
I A (mA)
VAK
(V)
I A (mA)
1
2
3
4
5
102
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
APPLICATIONS OF SCR:
 Power control.
 Over light detector.
 Static contactor.
PROCEDURE:
1. The connections are given as per the circuit diagram.
2. Keep the gate current
( I G ) at a certain value (5mA).
3. Now slowly increase the anode-cathode voltage (VAK ) till the thyristor
gets turned on.
4. Note down ammeter current ( I A ) , voltmeter (VAK ) readings.
5. Now find out the break over voltage (VBR ) and latching current ( I A ) .
6. Increase the anode-cathode voltage (VAK ) till the thyristor turns off
and measure the holding current ( I H ) .
7. For various gate currents take the readings and tabulate them.
103
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH
Forward current in mA
IA
IH
VBO
Forward voltage in Volts
104
VAK
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
RESULT:
Thus the forward conduction characteristic was obtained along with the
measurement of holding and latching currents. The break down voltage of the
SCR is also obtained.
105
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
106
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
Clippers,Clampers and Full wave rectifier
A. Clippers
AIM:
To obtain the output and transfer characteristics of diode clippers.
APPARATUS REQUIRED:
THEORY
Clippers
107
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION:
Output characteristics:
Sl.no
Input voltage
Output voltage
Amplitude
Time
Transfer characteristics:
108
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
109
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Thus the output and transfer characteristics of diode clippers are obtained.
110
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM-CLAMPERS
POSITIVE CLAMPER
111
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
Clampers
AIM
To obtain the output characteristics of diode clampers.
APPARATUS REQUIRED
S.NO
1.
2.
3.
4.
5.
6.
7.
8.
APPARATUS
RPS
PN junction diode
Resistor
Capacitor
Voltmeter
CRO
Bread Board
Connecting wires
RANGE
(0-30) V
IN 4007
1 kΩ
10 µF
(0-10)V
-
QUANTITY
1
1
1
1
1
1
1
Few
THEORY



A circuit that places either the positive or negative peak of a signal at a
desired D.C level is known as a clamping circuit.
A clamping circuit introduces (or restores) a D.C level to an A.C signal. Thus
a clamping circuit is also known as D.C restorer, or D.C reinserted or a
baseline stabilizer.
The following are two general types of clamping.
1. Positive clamping occurs when negative peaks raised or clamped to
ground or on the zero level In other words, it pushes the signal
upwards so that negative peaks fall on the zero level.
2. Negative clamping occurs when positive peaks raised or clamped to
ground or on the zero level In other words, it pushes the signal
downwards so that the positive peaks fall on the zero level.
112
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION
Sl
No
Input Voltage(v)
Amplitude(v)
113
Time(ms)
Output voltage(v)
Positive clamping
Negative clamping
Amp(v)
Time(ms)
Amp(v)
Time(ms)
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
In both cases the shape of the original signal has not changed, only there is
vertical shift in the signal wave form.
POSITIVE CLAMPER



During the negative half cycle of the input voltage, the diode conducts heavily
and behaves as a closed switch
At the negative peak, the capacitor is charged to maximum voltage V slightly
beyond the negative peak, the diode is shunt off and the capacitor charged to Vm
behaves as a battery during the positive half cycle of the input signal.
The diode is reversed biased and the output voltage will be equal to Vm + V this
gives positive clamped voltage and is called positive clamper circuit.
NEGATIVE CLAMPER
If we change the polarity of the diode and the capacitor then the circuit become
negative clamper.
PROCEDURE
1. Connect the circuit as per circuit diagram shown in figure.
2. Obtain a sine wave of constant amplitude 8 V p-p from function generator
and apply as input to the circuit.
3. Observe the output wave form and note down the amplitude at which
clamping occurs.
4. Draw the observed output waveforms.
RESULT:
Thus the output characteristics of diode clampers are obtained.
114
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
CIRCUIT DIAGRAM- FULL WAVE RECTIFIER
WITH FILTER
WITHOUT FILTER
115
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
FULL WAVE RECTIFIER
AIM:
To determine the output characteristics of full wave rectifier with and without
filter.
APPARATUS REQUIRED
S.NO
1.
2.
3.
4.
5
7.
8.
APPARATUS
Step down transformer
PN junction diode
Resistor
Capacitor
CRO
Bread Board
Connecting wires
RANGE
230/9 Volts
IN 4001
10 kΩ
4.7µF
-
QUANTITY
1
2
1
1
1
1
few
THEORY
 It converts an a.c voltage into a pulsating d.c voltage using both half cycles of the
applied a.c voltge.
 It uses two diodes of which one conducts during one half cycle while the other
diode conducts during the other half cycle of the applied a.c voltage.
 There are two types of full wave rectifies viz(i) Full wave rectifier with center
tapped transformer and (ii) Full wave rectifier without transformer(Bridge
rectifier)
 During positive half of the input signal,anode of diode D1 becomes positive and
at the same time the anode of diode D2 becomes negative. Hence,D1 conducts
and D2 does not conduct. The load current flows through D1 and the voltage drop
across RL will be equal to the input voltage.
 During the negative half cycle of the input signal,anode of diode D1 becomes
negative and at the same time the anode of diode D2 becomes positive. Hence,D1
does not conduct and D2 conducts. The load current flows through D2 and the
voltage drop across RL will be equal to the input voltage.
116
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
MODEL GRAPH
TABULATION
INPUT
OUTPUT(WITHOUT
FILTER)
OUTPUT(WITHOUT
FILTER)
AMPLITUDE(V)
TIME(MS)
117
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
PROCEDURE
1. Connect the circuit as per circuit diagram shown in figure.
2. Observe the output wave form and note down the amplitude.
3. Draw the observed output waveforms.
MODEL CALCULATION
Rectification efficiency:
𝑃𝑑𝑐
Ƞ=
𝑃𝑎𝑐
(𝑉𝑑𝑐)2
𝑅𝑙
= (𝑉𝑟𝑚𝑠)2
𝑅𝑙
=
(𝑉𝑑𝑐)2
(𝑉𝑟𝑚𝑠)^2
2𝑉𝑚
[ 𝜋 ]^2
= 𝑉𝑚
[ ]^2
=
√2
8
𝜋^2
= 0.812 = 81.2%.
Ripple factor:
𝛤 = √[[
Vrms =
𝑉𝑟𝑚𝑠 2
𝑉𝑚
√2
𝛤 = √[[
118
𝑉𝑑𝑐
] − 1]
; Vdc=
𝑉𝑚
√2
2𝑉𝑚
𝜋
2𝑉𝑚
𝜋
2
] − 1 = √[
𝜋2
8
− 1]= 0.482.
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
RESULT
Thus the output characteristics of full wave rectifier with and without filter is
determined.
119
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
R-L SERIES CIRCUIT
CIRCUIT DIAGRAM
MODEL GRAPH
120
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
R-C SERIES CIRCUIT:
CIRCUIT DIAGRAM
MODEL GRAPH
121
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
TABULATION
R-L SERIES CIRCUIT
S.NO
T(ms)
I(t)Amps
R-C SERIES CIRCUIT:
S.NO
122
T(ms)
V(t)volts
DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
Ex. No:
Date:
TRANSIENT CIRCUITS
AIM:
To find the transient response of R-C and R-L source free and source driven
network.
APPARATUS REQUIRED:
S.No
1
2
3
4
5
6
Components
Regulated power supply
SP-ST(single pole-single throw
single throw switch)
Resistor
capacitor
Stop watch
DPST
Type/Range
(0-15)V
Quantity
2 Nos
1 Nos
100Ω
0.01µF
2 Nos
1 Nos
1 Nos
1 Nos
THEORY:



If a network contains energy storage elements, with change in excitation, the
current and voltages change from one state to other state.
The behaviour of the voltage (or) current when it is changed from one state to
another state is called transient state.
Whenever a circuit is switched from one condition to another either by a change
in the applied source (or) change in the circuit elements there is a transitional
period during which the branch currents and voltage change from their values to
new ones, this period is called transient.
PROCEDURE:
1. Charge on capacitor is ‘0’ initially.
2. If there is a charge in it, short circuit the terminal then the charge will be
dissipated.
3. Close the switch at t=0
4. Simultaneously switch on the stop watch.
5. For every 2 seconds note down the voltage across capacitor until voltmeter
reaches 5 V.
123
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6. After reaching 15 V allow 10 sec for it.
THEORETICAL VERIFICATION
R-L CIRCUIT
𝑑𝑖
V= Ri+L𝑑𝑡
15/S=R I(s)+L S I(s)
I(s)=
15
(100+500𝑥10−3 𝑠)
15
=
50𝑥10^−3(𝑠+2000)𝑠
300
𝐴
𝐵
= +
𝑠(𝑠+2000) 𝑆
𝑆+200
0.15
0.15
=
−
𝑆
𝑠+2000
I(t)=0.15-0.15e^-2000t.
=0.15(1-e ^-2000t)
R-C CIRCUIT
1
V=Ri+𝐶 ∫ 𝑖𝑑𝑡
15
A=0.15,B=0.15
108
=I(s)((100 + 𝑠 )
𝑆
15⁄
15
𝑆
I(s) =
=
8
(100𝑆 +|10 )/𝑠 100𝑗+108
0.15
I(s)=𝑠+106
I(t)=0.15e^ − 106𝑡
6𝑡
V(t)=i(t)R1=0.15𝑒 −10 x100=0.15𝑒−106𝑡.
RESULT:
Thus ,the transient response of RC-RL obtained for source free and source drive
methods.
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CIRCUITS AND DEVICES LAB
Viva questions & Answers
(Electrical)
1. What is charge?
The charge is an electrical property of the atomic particles of which matter
consists. The unit of charge is the coulomb.
2. Define current.
The flow of free electrons in a metal is called electric current. The unit of
current is the ampere.
Current (I) = Q/t, Where Q is total charge transferred
& T is time required for transfer of charge.
3. What is voltage?
The potential difference between two points in an electric circuit called
voltage. The unit of voltage is volt. It is represented by V OR v.
Voltage = W/Q = work done/Charge
4. Define power.
The rate of doing work of electrical energy or energy supplied per unit time is
called the power. The power denoted by either P of p. It is measured in
Watts(W).
Power = work done in electric circuit/Time
P
dw dw dq

dt dq dt
P = V*I
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5. What is network?
Interconnection of two or more simple circuit elements is called an electric
network.
6. Distinguish between a branch and a node of a circuit.
A part of the network which connects the various points of the network with
one another is called a branch. A point at which two or more elements are
jointed together is called node.
7. Define active and passive elements.
The element which delivers energy is called active elements.
Example: voltage source, current source.
The element which stores or dissipates energy is called passive element.
Example: Resistor, Inductor, Capacitor.
8. Define unilateral and bilateral elements.
In unilateral element, voltage – current relation is not same for both the
direction.
Example: Diode, Transistors.
In bilateral element, voltage – current relation is same for both the
direction.
Example: Resistor
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9. Define linear and non-linear elements.
If the element obeys superposition principle, then it is said to be linear
elements.
Example: Resistor.
If the given network is not obeying superposition principle then it is said
to be non linear elements.
Example: Transistor, Diode.
10. Define Lumped and distributed elements.
Physically separable elements are called Lumped element.
Example: Resistor, Capacitor, Inductor.
A distributed element is one which is not separable for electrical purpose.
Example: Transmission line has distributor resistance, capacitance
and inductance.
11. Distinguish between a mesh and a Loop of a circuit.
A mesh is a loop that does not contain other loops. All meshed are loops. But
all loops are not meshes. A loop is any closed path of branches.
12. How the electrical energy sources are classified?
The electrical energy sources are classified into:
1. Ideal voltage source
2. Ideal current source.
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13. Define an ideal voltage source.
The voltage generated by the source does not vary with any circuit quantity.
It is only a function of time. Such a source is called an ideal voltage source.
14. Define an ideal current source.
The current generated by the source does not vary with any circuit quantity.
It is only a function of time. Such a source is called as an ideal current source.
15. What are independent source?
Independent sources are those in which, voltage and current are independent
and are not affected by other part of the circuit.
16. What are dependent sources?
Dependent sources are those in which source voltage or current is not fixed,
but is dependent on the voltage or current existing at some other location in
the circuit.
17. What are the different types of dependent or controlled sources?
i. Voltage Controlled Voltage Sources (VCVS)
ii. Current Controlled Voltage Sources (CCVS)
iii. Voltage Controlled Current Sources (VCCS)
iv. Current Controlled Current Sources (CCCS)
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18. What is resistance?
It is the property of a substance which opposes the flow of current through it.
The resistance of element is denoted by the symbol “R”. It is measured in
Ohms.
R
V

I
19. Define Ohm’s law.
The current flowing through the electric circuit is directly proportional to the
potential difference across the circuit and inversely proportional to the
resistance of the circuit, provided the temperature remains constant.
20. Define Kirchoff’s current law.
Kirchhoff’s current law states that in a node, sum of entering current is equal
sum of leaving current.
∑ I at junction point = 0
(Total current around a closed loop = 0)
21. Define Kirchoff’s voltage law.
Kirchhoff’s Voltage Law (KVL) states that the algebraic sum of the voltages
around any closed path is zero.
Around a closed path ∑ V = 0.
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22. Distinguish between a cycle, time periods and frequency.

One complete set of positive and negative instantaneous values of the
Voltage or current is called cycle

The time taken by an alternating quantity to complete one cycle is
called time period (T).

The number of cycle that an alternating quantity completed per second
is known as frequency. It is measured in Hz.
23. What are peak value and peak to peak value?

The peak value of the sine wave during positive or negative half only.

The sum of positive and negative value is called a peak to peak value.
The peak to peak value of a sinusoidal alternating voltage is equal to
two times the peak value.
24. What is mesh analysis?

Mesh analysis is one of the basic techniques used for finding current
flowing through the loop in a network.

Mesh analysis is applicable if the given network contains voltage
sources. If there exists current sources in a circuit, then it should be
converted into equivalent voltage sources.
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25. What is nodal analysis?

Nodal analysis is one of the basic techniques used to finding solution
for voltage drop across the nodes in a given circuit.

Nodal analysis is applicable if the given network contains current
sources. If there exists voltage sources in the given circuit, then it can
to be converted into equivalent current sources.
26. State superposition theorem.
Any electric circuit (linear, lumped, bilateral), is energized by two or more
sources, the response in any element in the network is equal to the algebraic
sum of the responses caused by individual sources acting separately.
27. State Thevenin’s Theorem.
A complex network having linear, bilateral, lumped elements with open
circuited output terminals can be reduced by a simple circuit consisting of a
single voltage source in series with a impedance.
28. State Norton’s theorem.
Any electrical network (linear, lumped, bilateral) with short circuited
terminals can be reduced by a simple circuit consisting of a single current
source in parallel with a Thevenin’s equivalent resistance.
29. State Maximum power transfer theorem.
Power transferred from source to load will be maximum, when source
resistance is equal to load resistance looking back from its load terminals.
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30. Define duality.
Two electrical networks which are governed by the same type of equations are
called duality.
31. What is transient state?
If a network contains energy storage elements, with change in excitation, the
current and voltages change from one state to other state. The behavior of the
voltage or current when it is changed from one state to another state is called
transient state.
32. What is transient time?
The time taken for the circuit to change from one steady state to another
steady state is called transient time.
33. What is natural response?
If we consider a circuit containing storage elements which are independent of
sources, the response depends upon the nature of the circuit, it is called natural
response.
34. What is transient response?
The storage elements deliver their energy to the resistances, hence the response
changes with time, gets saturated after sometime, and is referred to the transient
response.
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35. Define resonant circuit.
The circuit that treat a narrow range of frequencies very differently than all other
frequencies. These are referred to as resonant circuit. The gain of a highly
resonant circuit attains a sharp maximum or minimum as its resonant frequency.
36. When the circuit is said to be in resonance?
1. A network is in resonance when the voltage and current at the network input
terminals are in phase.
2. If inductive reactance of a network equals capacitive reactance then the
network is said to be resonance
37. What is resonant frequency ?
The frequency at which resonance occurs is called resonance frequency.
fr 
1
1
2 LC
38. Define bandwidth.
The bandwidth (BW) is defined as the frequency difference between upper
cut-off frequency (f2) and lower cut-off frequency (f1)
Bandwidth
133
=
f 2  f1
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
39. Define selectivity.
Selectivity is defined as the ratio of bandwidth to the resonant frequency of
resonant circuit.
Selectivity
=
Bandwidth
Resonant frequency
40. Define quality factor.
The quality factor is defined as the ratio of maximum energy stored to the energy
dissipated per cycle.
 Maximum energy stored per cycle 
Q

2

*


Quality factor,
 Energy dissipated per cycle 
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Viva questions & Answers
(Electronics)
1. Give the value of Charge, Mass of an electron.
Charge of an electron – 1.6 x 10 -19 coloumbs & Mass of an electron –
9.11 10 -31 Kgs.
2.
Define Potential.
A potential of V volts at point B with respect to point A, is defined as the
work done in taking unit positive charge from A to B , against the electric
field.
3.
Define Current density.
It is defined as the current per unit area of the conducting medium.
J=I/A
4.
Define Electron volts.
If an electron falls through a potential of one volt then its energy is 1
electron volt.
1 eV
5.
 1.6 X 1019 Joules
What is the relation for the maximum number of electrons in each shell?
Ans: 2𝑛2
6.
What are valence electrons?
Electron in the outermost shell of an atom is called valence electron.
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7.
What is forbidden energy gap?
The space between the valence and conduction band is said to be
forbidden energy gap.
8.
What are conductors? Give examples?
Conductors are materials in which the valence and conduction band
overlap each other so there is a swift movement of electrons which leads
to conduction.
Ex: Copper, silver.
9.
What are insulators? Give examples?
Insulators are materials in which the valence and conduction band are far
away from each other. So no movement of free electrons and thus no
conduction.
Ex: glass, plastic.
10. What are Semiconductors? Give examples?
The materials whose electrical property lies between those of conductors
and insulators are known as Semiconductors.
Ex: germanium, silicon.
11. What are the types of Semiconductor?
1. Intrinsic semiconductor
2. Extrinsic semiconductor.
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12. What is Intrinsic Semiconductor?
Pure form of semiconductors are said to be intrinsic semiconductor.
Ex: germanium, silicon.
13. Define Mass – action law.
Under thermal equilibrium the product of free electron concentration (n)
and hole concentration (p) is constant regardless of the individual
magnitude.
14. What is Extrinsic Semiconductor?
If certain amount of impurity atom is added to intrinsic semiconductor the
resulting semiconductor is Extrinsic or impure Semiconductor.
Ex: Arsenic.
15. What are the types of Extrinsic Semiconductor?
1. P-type Semiconductor
2. N- Type Semiconductor.
16. What is P-type Semiconductor?
The Semiconductor which are obtained by introducing pentavalent impurity
atom (phosphorous, antimony) are known as P-type Semiconductor.
Ex: Boron, aluminum.
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17. What is N-type Semiconductor?
The Semiconductor which is obtained by introducing trivalent impurity
atom (gallium, indium) is known as N-type Semiconductor.
Ex: Antimony, Phosphorous.
18. What is doping?
Process of adding impurity to an intrinsic semiconductor atom is doping.
The impurity added is called dopant.
19. Define drift current?
When an electric field is applied across the semiconductor, the holes move
towards the negative terminal of the battery and electron move towards the
positive terminal of the battery. This drift movement of charge carriers
will result in a current termed as drift current.
20. Give the expression for drift current density due to electron.
J n  qnn E
Where,
J n --> drift current density due to electron.
q- Charge of electron,  n - Mobility of electron.
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21. Give the expression for drift current density due to holes.
J p  qp  p E
Where,
J p --> drift current density due to holes.
q- Charge of holes.
p
- Mobility of holes.
22. Define the term diffusion current?

A concentration gradient exists, if the number of either electrons or
holes is greater in one region of a semiconductor as compared to
the rest of the region.

The holes and electron tend to move from region of higher
concentration to the region of lower concentration.

This process is called diffusion and the current produced due this
movement is diffusion current.
23. Define mean life time of a hole or an electron.
The electron hole pair created due to thermal agitation will disappear as a
result of recombination. Thus an average time for which a hole or an
electron exists before recombination can be said as the mean life time of a
hole or electron.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)
24. Define the term transition capacitance?
When a PN junction is reverse biased, the depletion layer acts like a
dielectric material while P and N –type regions on either side which has
low resistance act as the plates. In this way a reverse biased PN junction
may be regarded as parallel plate capacitor and thus the capacitance across
this set up is called as the transition capacitance.
CT 
A
W
Where
CT
- Transition capacitance.
 A - Cross section area of the junction.
W – Width of the depletion region.
25. What are break down diodes?
Diodes which are designed with adequate power dissipation capabilities to
operate in the break down region are called as break down or zener diodes.
26. What is break down? What are its types?
When the reverse voltage across the pn junction is increased rapidly at a
voltage the junction breaks down leading to a current flow across the
device. This phenomenon is called as break down and the voltage is break
down voltage. The types of break down are
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1.
Zener break down
2. Avalanche breakdown
27. What is Zener breakdown?

Zener break down takes place when both sides of the junction are very
heavily doped and consequently the depletion layer is thin and
consequently the depletion layer is tin. When a small value of reverse bias
voltage is applied, a very strong electric field is set up across the thin
depletion layer.

This electric field is enough to break the covalent bonds. Now extremely
large number of free charge carriers are produced which constitute the
zener current. This process is known as zener break down.
28. What is avalanche break down?

When bias is applied, thermally generated carriers which are already
present in the diode acquire sufficient energy from the applied potential to
produce new carriers by removing valence electron from their bonds.

These newly generated additional carriers acquire more energy from the
potential and they strike the lattice and create more number of free
electrons and holes. This process goes on as long as bias is increased and
the number of free carriers gets multiplied.
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DEPARTMENT OF ECE /EGSPEC / I YEAR- CIRCUITS AND DEVICES LAB MANUAL (2013 reg)

This process is termed as avalanche multiplication. Thus the break down
which occurs in the junction resulting in heavy flow of current is termed
as avalanche break down.
29. How does the avalanche breakdown voltage vary with temperature?

In lightly doped diode an increase in temperature increases the probability
of collision of electrons and thus increases the depletion width.

Thus the electrons and holes need a high voltage to cross the junction.
Thus the avalanche voltage is increased with increased temperature.
30. How does the zener breakdown voltage vary with temperature?
In heavily doped diodes, an increase in temperature increases the energies
of valence voltage is sufficient to knock or pull these electrons from their
position in the crystal and convert them in to conduction electrons. Thus
zener break down voltage decreases with temperature.
31. What is a transistor (BJT)?
Transistor is a three terminal device whose output current, voltage and /or
power are controlled by input current.
32. What are the terminals present in a transistor?
Transistor contains three terminals.
1. Emitter.
2. Base.
3. Collector.
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33.
What is FET?
FET is abbreviated for field effect transistor. It is a three terminal device
with its output characteristics controlled by input voltage.
34. Why FET is called voltage controlled device?
The output characteristics of FET is controlled by its input voltage thus it
is voltage controlled.
35. What are the two main types of FET?
1. JFET
2. MOSFET.
36. What is JFET?
JFET- Junction Field Effect Transistor.
37. What are the terminals available in FET?
FET contains three terminals.
1. Drain,
2. Source
3. Gate
38. What are the types of JFET?
N- Channel JFET and P- Channel JFET
39. What are the two important characteristics of JFET?
1. Drain characteristics 2. Transfer characteristics.
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40. What is transconductance in JFET?
It is the ratio of small change in drain current to the corresponding change
in drain to source voltage.
41. What is amplification factor in JFET?
It is the ratio of small change in drain to source voltage to the
corresponding change in Gate to source voltage.
42. Why the transistor is called a current controlled device?
The output characteristics of the transistor depend on the input current. So
the transistor is called a current controlled device.
43. Define current amplification factor?
It is defined as the ratio of change in output current to the change in input
current at constant.
44. When does a transistor act as a switch?
The transistor acts as a switch when it is operated at either cutoff region or
saturation region
45. What is biasing?
To use the transistor in any application it is necessary to provide sufficient
voltage and current to operate the transistor. This is called biasing.
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46. Explain about the various regions in a transistor?
The three regions are
1. Active region.
2. Saturation region
3. Cutoff region.
47. Explain about the characteristics of a transistor?
Input characteristics: it is drawn between input voltage & input current while
keeping output voltage as constant.
Output characteristics: It is drawn between the output voltage &output current
while keeping input current as constant.
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