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Transcript
Design ideas for Tunnel-FETs
Objective
•To explore design ideas for
voltage scaling of transistors.
Approach
•VDD scaling : Difficult in
MOSFETs, possible in TFETs.
•gFET: Larger tunneling area
gives higher ION than
conventional TFETs.
•Modified and optimized gFET
design to meet ITRS
requirements.
Lateral Tunneling
Vertical Tunneling
vs.
P-I-N TFET
gFET
: Band to Band Tunneling region
Impact
•gFET with high ION and low
IOFF will provide a viable
alternative for VDD scaling to
reduce power consumption.
Samarth Agarwal, Mathieu Luisier & Gerhard Klimeck