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Available online at www.sciencedirect.com ScienceDirect Solar Energy 97 (2013) 155–167 www.elsevier.com/locate/solener An effective passive islanding detection method for PV single-phase grid-connected inverter Ku Nurul Edhura Ku Ahmad ⇑, Nasrudin Abd Rahim, Jeyraj Selvaraj, Ahmad Rivai, Krismadinata Chaniago UM Power Energy Dedicated Advanced Centre (UMPEDAC), Level 4, Wisma R&D University of Malaya, Jalan Lembah Pantai, 59990 Kuala Lumpur, Malaysia Received 4 December 2012; received in revised form 31 July 2013; accepted 12 August 2013 Available online 12 September 2013 Communicated by: Associate Editor Nicola Romeo Abstract This paper presented a low cost and effective passive islanding detection method for single-phase photovoltaic grid-connected inverters. An analog circuit for over/under voltage protection is developed to ensure fast detection and no delay to system. An under/over frequency circuit is also developed, for accurate and fast frequency detection with minimal external components. A new algorithm is developed in a low-cost PIC18F4550. An improved disconnection time in the proposed method compared with that in the previously developed method is an attractive solution for single phase grid connected inverters. The low cost, effective and minimal external component count are the advantages. A prototype is developed and tested to demonstrate the performance and feasibility of the proposed method. The experiment results verified that the proposed islanding detection method able to detect islanding operation effectively under various load types, inverter output powers and quality factors. Ó 2013 Elsevier Ltd. All rights reserved. Keywords: Passive islanding; Distributed generation; Inverter 1. Introduction Development for renewable energy sources produce low pollution compared to the fossil fuels and nuclear generation system (Yu et al., 2008). The new paradigm of distributed generation (DG) thus gains technical importance and creates business opportunities (Chowdhury et al., 2009). In principle distribution generation is a small scale generation unit that need to be installed to the load and also connected to the grid for selling or buying energy purposes. One of the most important criteria that need to be considered is the islanding issue (Yu et al., 2010). The islanding condition as specified in Recommended Practice for Utility Interface of Photovoltaic (PV) Systems (2000), occurs when ⇑ Corresponding author. Tel.: +60 3 22463246; fax: +60 3 22463257. E-mail address: [email protected] (K.N.E.K. Ahmad). 0038-092X/$ - see front matter Ó 2013 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.solener.2013.08.011 “a portion of utility system that contains both load and distributed resources remains energized while it is isolated from the remainder of the utility system”. Such an undesirable event could potentially occur due to the circuit tripping, accidental disconnection of the utility due to equipment failure, human error, temporary disconnection (for maintenance services) or uncommon network reconfiguration (Chowdhury et al., 2009; Yu et al., 2010). Integrating DG into utility is a major challenge to researchers. DG could still be supplying local load demand while network is already isolated from the main system. Existing methods are still lacking, hence successful detection of islanding is an ongoing challenge. Two factors must be highlighted to better understand the islanding phenomenon. The first one is the available standards that have been established for the grid connected system. These standards addressed the issue of islanding as 156 K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 Nomenclature PV photovoltaic DG distributed generation NDZ none detection zone PCC point of common coupling Qf quality factor LPS load parameter space PMS power mismatch space In,a negative sequence current OV/UV over and under voltage OF/UF over and under frequency PJD phase jump detection ROCOP rate of change of power output ROCOF rate of change of frequency SMS sliding mode frequency shift PWM pulse width modulation MPPT maximum power point tracking R resistor L inductance well as procedure for testing and qualifying DG system (Chiang et al., 2010). The second feature is associated with the so called “Non-detection zone” (NDZ) which can be defined as the zone for which an islanding detection method would fail to operate in time. NDZ is an evaluating criterion of islanding detection methods. In principle, islanding detection monitors changes in inverter output parameter or other system parameters that indicate islanding. There are two types of anti islanding methods which are the local and remote methods. The local methods can be divided into passive and active. Passive islanding detection detects changes in electrical parameters to determine the occurrence of islanding (Chiang et al., 2010). The advantages of these passive techniques are their easy implementation (no additional controller), no degradation of PV inverter power quality, and their inexpensiveness. The primary drawbacks are a relatively large NDZ and ineffectiveness in multi-PV inverter systems (Syamsuddin et al., 2009). The most commonly used passive technique for islanding detection are under/over voltage and under/over frequency (OV/UV & OF/UF), phase jump detection (PJD), voltage harmonic monitoring, current harmonic monitoring, rate of change of power output (ROCOP) and rate of change of frequency (ROCOF) Yu et al., 2010; Llaria et al., 2011; De Mango et al., 2006; Freitas et al., 2005; Redfern et al., 1993. Active techniques inject a small disturbance at the PV inverter output to detect islanding. The main advantage of these techniques is their relatively smaller NDZ than that of passive methods. Their main drawbacks are the possibly deteriorated output power quality causing instability to the PV inverter and normally require additional controllers which increased the complexity of the method (Syamsuddin et al., 2009). APS SFS AFD RPEED PLCC T R SPD SCADA Vpcc RMS LED IGBT DFT V f C Qf active phase shift Sandia frequency shift active frequency drift reactive power export error detection power line carrier communication transmitter receiver signal produced by disconnect supervisory control and data acquisition voltage at point of common coupling root mean square light-emitting diode insulated gate bipolar transistor digital Fourier transformation grid voltage grid frequency capacitance quality factor Active techniques developed include impedance measurement (IM), sliding mode frequency shift (SMS) or active phase shift (APS), sandia frequency shift (SFS) or active frequency drift with positive feedback, and reactive power export error detection (RPEED) Chowdhury et al., 2009; Mohamad et al., 2011; Lopes and Huili, 2006. AFD method varies the output current frequency through positive feedback. This method will inject a current with slightly distorted in frequency into the PCC. Upon grid disconnection, the phase error between the PCC voltage and the inverter current will be detected by the inverter, which then tries to compensate by increasing the frequency of the injected current until it exceeds the OF/UF limits. However, the performance of this conventional AFD method is inefficient and researchers are facing difficulty in choosing the suitable chopping fraction (cf) value to meet the limit of harmonics. Hence, a novel AFD method (Jung and Yu, 2007) with a periodic chopping fraction that deviates from the frequency in an instant way from nominal was proposed. Remote islanding detection techniques are based on communication between utilities and PV inverter units (Syamsuddin et al., 2009). This technique do not have the NDZ, do not degrade PV inverter power quality, are effective in multi-PV-inverter systems, but are expensive to implement (especially in small systems), and have a complicated communication technique for multi-PV inverter systems. Common techniques that are communicationbased include power line carrier communication (PLCC), signal produced by disconnect (SPD), and supervisory control and data acquisition (SCADA). In application, each method has advantages and drawbacks. Among popular reference standards for islanding are IEEE 929-2000, IEC 62116, IEE 1547, VDE 0126-1-1, and AS 4777.3-2005. K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 157 Table 1 Existing anti-islanding standards. Quality factor, Qf Required islanding detection time, t Normal frequency range, f (nominal frequency f0) Normal voltage range, V (% of nominal voltage V0) IEC 62116 1 t<2s 85% 6 V 6 115% IEEE 1547 IEEE 929-2000 Japanese standard 1 2.5 0 (+rotating machinery) 1 2 1 t<2s t<2s Passive: t < 0.5 s active: 0:5 s < t < 1 s t < 0.5 s t < 0.2 s t<2s ðf 0 1:5 HzÞ 6 f and f 6 ðf 0 þ 1:5 HzÞ 59:3 Hz 6 f 6 60:5 Hz 59:3 Hz 6 f 6 60:5 Hz Setting value 88% 6 V 6 110% 88% 6 V 6 110% Setting value 59:3 Hz 6 f 6 60:5 Hz 47:5 Hz 6 f 6 50:2 Hz Setting value 88% 6 V 6 110% 80% 6 V 6 115% Setting value Korean standard VDE 0126-1-1 AS4777.3-2005 Table 1 shows all the standards having their own quality factor (Q) value, the required islanding disconnection time, and range of operational frequency and voltage (Yu et al., 2010). According to IEEE929-2000 standard the quality factor Q is equals to; Q ¼ tanðarccosine½pfÞ ð1Þ The selected Q = 2.5 is equals to a power factor of 0.37. As the power factor increases, Q decreases. Thus according to IEEE929-2000, the test requirement that sets Q = 2.5 equals lines with uncorrected power factors from 0.37 to unity and seems to cover all reasonable distribution line configurations (Recommended Practice for Utility Interface of Photovoltaic (PV) Systems, 2000). Meanwhile, Japanese standard are proposing Q = 0 based on adding rotating machinery while islanding test is being conducted (Yu et al., 2010). Other than quality factor, disconnection time is also important. The German VDE0126-1-1 standard has the strictest disconnection time limit which is less than 0.2 s. Normal frequency and voltage range also are crucial to determining islanding detection capability. Australian standard AS4777.3-2005 requires nominal frequency and voltage range to be set by manufacturer. Steps to obtaining tripping values are: (1) determination of under/over voltage and under/over frequency values through gradual increase or decrease of voltage and frequency until the device tested (the inverter) disconnects from the variable ac supply, and (2) reading of the over/under voltage or over/under frequency values at which disconnection occurred. A criteria of acceptance for over/under voltage is that the value at step (2) should equal an under-voltage set point of ±5 V; for frequency, the value should equal an under-frequency set point of ±0.1 Hz. The primary objective of this paper is to propose a new low cost and effective passive method for islanding detection of single-phase grid-connected PV inverter and to compare between the proposed algorithm and existing algorithm. 2. Research methodology 2.1. PV inverter system connected to grid Fig. 1 is the block diagram of a typical single-phase gridconnected PV inverter; here, it has PV arrays, DC–DC boost converter connected to two capacitors in series (and functioning as maximum power point (MPP) tracker), four switching devices connected in full bridge configuration (S1–S4) and presented as ideal switches, and a filter inductor (Lf) filtering the current injected into the grid. The power produced by the system is transferred directly to the grid. Since grid voltage is uncontrollable, the simplest way of controlling system operation is by controlling Fig. 1. Single-phase grid-connected PV inverter. 158 K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 Fig. 2. The grid-connected PV inverter system with PIC 18F4550 microcontroller. 15V R3 R1 LED C1 + R2 Grid - R1 Op Amp1 LM311 R1 2W06 To Port RD6 15V R3 LED R1 + - Op Amp2 LM311 R1 To Port RD7 Fig. 3. Under/over voltage circuit. the current flowing into the grid. The injected current must be sinusoidal and have low harmonic distortion (Rahim et al., 2011; Rahim and Selvaraj, 2010). 2.2. Overall block diagram of the grid-connected PV inverter with the proposed method + - Fig. 2 is the block diagram of the grid-connected PV inverter system with PIC 18F4550 microcontroller for islanding detection integrated with the main controller for the inverter system. In this paper, the proposed low cost and effective passive method is developed using microcontroller PIC 18F4550. The controller handles the proposed passive islanding of under/over voltage and under/over frequency detection before the signals are sent to the main controller of the single-phase grid-connected inverter. The proposed method takes the grid voltage to the under/over Fig. 4. Zero-crossing detector circuit for under/over frequency detection. voltage circuit and send the signals as input to PIC18F4550 for under/over voltage detection. For under/over frequency, the proposed method detects zero crossing K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 159 Table 2 Parameters of the single-phase grid-connected PV inverter prototype. Fig. 5. Falling edge of a square wave signal with the triggered interrupt. Parameter Value D1 S1–S4 Filter inductor (Lf) Switching frequency RHRP30120 VRR = 1200 V, I = 30 A IGBT IRG4PH50UD VCE = 1200, Ic = 24 A 5 mH 20 kHz The islanding detection algorithm output from PIC 18F4550 is input to the main inverter controller through GPI0A11, the input then used as a signal to turn off the relay, disconnecting the inverter from the grid (see Figs. 3 and 4). 2.3. The proposed under-voltage and over-voltage circuit detection pulses and sends the signal as interrupt input to PIC18F4550. These signals are used as conditional detection in the islanding detection algorithm developed. PIC 18F4550 was designed to read analog signals between 0 V and 5 V, hence the under/over voltage circuit Fig. 6. Flowchart of islanding detection. 160 K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 Table 3 Load parameters of the simulation and experiment at Q = 2.5, and P = 1 kW. Table 4 Load parameters of the simulation and experiment at Q = 1, 2, 2.5, and P = 1 kW. Types R (O) L C Quality factor R (O) L (mH) C (lF) Pure resistor load Resistor–inductor load Resistor–capacitor load Resistor–inductor-capacitor load 57.6 57.6 57.6 57.6 – 73.33 mH – 73.33 mH – – 138.13 lF 138.13 lF 1 2 2.5 57.6 57.6 57.6 183.35 91.67 73.33 55.26 110.52 138.13 was designed to not exceed that range. In this work, a 240– 6 V transformer was connected to the utility source. A rectifier transforms the lower AC voltage into DC. Through the addition of resistor R2 parallel with capacitor C1, this circuit can convert a high voltage signal into a very stable low DC voltage signal. The stable DC signal then act as input to the under-voltage circuit which used the OpAmp1. A 10 kO potentiometer is used as tuner for reference voltage Vref1. The DC voltage and reference voltage Vref1 are compared, with OpAmp1 acting as comparator. OpAmp1 output is fed to RD6 as input signal to the microcontroller. The same concept is applied to the over voltage circuit, except that the location of the reference voltage is now at the positive side of OpAmp2 and the stable DC voltage now connects to the negative input of OpAmp2. This circuit was developed for accurate and fast detection of under/over voltage without continuous calculation of the grid voltage RMS as in the past method. Not only does detection become very fast, there is no added delay. forces the voltage down. Resistor pair R2 is a voltage divider, producing 2.5 V as reference voltage to Op Amp LM311. The circuit output connects to RB0. Capacitor C1 connects to the Op Amp output to act as noise filter that gives the possibility to prevent noise in a simple and cost effective way. It improves triggering of the interrupt by reducing the noise in the low-voltage square-wave signals. As the square-wave signal is in phase with the grid voltage, the falling edge will indicate very accurately where the zero crossing is. This square wave signal will be the input to interrupt routine INT0, making possible the design of a zero-crossing-detection routine in an interrupt routine and automatically making the detection fully interrupt-driven. Fig. 5 shows a square-wave input signal and the triggered interrupt. 2.5. Islanding algorithm Fig. 6 shows the control algorithm of the proposed passive islanding detection, applied in PIC18F4550, which processes the algorithm through C programming language. PIC18F4550 collects analog inputs data from the under/ over voltage circuit through RD7 and RD6. There is a filter in the programming algorithm to meet AS 4777.3-2005 2.4. The proposed under-frequency and over-frequency circuit This circuit is to ensure accurate and fast frequency detection with minimal external components. Resistor R1 Voltage sensor PM6000 Current sensor LAN Area LeCroy Oscilloscope PC for PV Array Simulator R C L Inverter PC for PM6000 PV Array Simulator Programmable AC source GPIB and serial USB (a) Computer PM6000 Oscilloscope under and over voltage circuit under and over frequency circuit Inverter RLC load (b) Fig. 7. (a) Islanding test and (b) the laboratory test equipment with the proposed passive islanding detection method. K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 161 Fig. 8. Simulation model of the islanding test circuit. standard reconnection time. For frequency calculation, a simple zero-crossing circuit is utilized. The square wave produced by the zero-crossing detector has the same frequency as the grid. By feeding the produced signal into the RB0 of the PIC18F4550, the microcontroller is programmed to be a very accurate zero-crossing detector with an interrupt-driven code. Fig. 7 shows the PV grid-connected inverter hardware prototype controller interface with the islanding detection, implemented on PIC 18F4550 to validate the performance of the proposed passive islanding detection algorithm. Table 2 lists the prototype parameters of the single phase grid-connected PV inverter. The hardware was tested under various load conditions. Equipment such as PV array Vgrid Vgrid 400 200 0 -200 -400 400 200 0 -200 -400 Vpcc Vpcc 400 200 0 -200 -400 400 200 0 -200 -400 Iinv*10 Iinv*10 100 50 0 -50 -100 100 50 0 -50 -100 0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 Time (s) Time (s) (a) (b) Vgrid 400 200 0 -200 -400 Vpcc 400 200 0 -200 -400 Iinv*10 100 50 0 -50 -100 0 0.2 0.4 0.6 0.8 1 1.2 Time (s) (c) Fig. 9. Simulation result for islanding detection, at (a) Q = 1, (b) Q = 2, and (c) Q = 2.5. 0.8 1 1.2 162 K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 simulator, resistor-inductor-capacitor (R–L–C) load, programmable AC source, PM6000, and LeCroy Oscilloscope were used. The test was conducted from 500 W to 2 kW power output. In the following experiments, the grid-connected inverter was controlled to generate balanced real power with the load. Various load types were used to verify the proposed islanding detection method. Table 3 lists the load parameters of the experiments. The parameters of the resistor–inductor–capacitor (R–L–C) load were as specified by the IEEE Std. 929-2000 (Recommended Practice for Utility Interface of Photovoltaic (PV) Systems, 2000) for testing islanding operation performance. IEEE Std. 929-2000 states that a non-islanding inverter must shut down within 2 s of grid disconnection for loads with a quality factor (Qf) equals to or lower than 2.5. The values for L and C are calculated through this formula: P¼ V2 R ð2Þ L¼ R Qf x ð3Þ C¼ Qf R 2 L ð4Þ Fig. 8 is a diagram of the PSIM model of the islanding circuit. 3. Results and discussion 3.1. Disconnection time for different method and algorithm To prove that the proposed passive islanding detection has advantages over the implemented algorithm in TMS320F2812 DSP in terms of disconnection times, the corresponding comparisons were made on both passive islanding methods. Low cost PIC 18F4550, compared with ATMEGA and TMS320F2812 DSP with under/over voltage and under/over frequency islanding detection algorithms, were compared. The circuit connections and algorithms of the past methods are as in Syamsuddin et al. (2009). The prototype of both methods monitored grid voltage and grid frequency at PCC (see Table 4). Vpcc 400 200 0 -200 -400 Iinv*10 100 50 0 -50 -100 0 0.2 0.4 0.6 0.8 1 1.2 0.8 1 1.2 Time (s) (a) Vpcc 400 200 0 -200 -400 Iinv*10 100 50 0 -50 -100 0 0.2 0.4 0.6 Time (s) (b) Fig. 10. Simulation result for (a) R–L load (b) R–C load under islanding operation with Q = 2.5 and P = 1 kW. K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 163 Table 5 Disconnection times of the two methods. ATMEGA and DSP based algorithm PIC 18F4550 algorithm Under voltage disconnection time (s) Over voltage disconnection time (s) Under frequency disconnection time (s) Over frequency disconnection time (s) Could not be determined 1.2 2.1 52.5 0.6 0.6 0.6 0.6 Fig. 11. Experiment results for R load under islanding operation, for (a) 25% (500 W), (b) 50% (1 kW), (c) 75% (1.5 kW), and (d) 100% (2 kW) inverter output, with (M1) Vgrid, (M2) Vpcc, (M3) the inverter output current and (M4) load current. The disconnection time of PIC18F4550 was much faster than that of ATMEGA and TMS320F2812. The cost of design and implementation for the proposed method were also much less. The disconnection times were validated according to AS 4777.3-2005 standard. Table 5 compares the disconnection times. As the table shows, the proposed method is much faster and more stable than the past method (very unstable). Although over-voltage disconnection time of the past method passed the less-than-2-s standard, the proposed method enabled much faster disconnection. From Syamsuddin et al. (2009), this method used TMS320F2812 DSP for reading the grid voltage at the sensor signal through the ADC and calculates the RMS voltage value for under/over voltage disconnection. This may add some lagging to the systems when detecting under/over voltage. The proposed circuit and algorithm aim to correct the problem. 3.2. Simulation results Simulations were performed using PSIM system. The DC voltage source was 400 V, the grid voltage 240 V, the grid frequency 50 Hz, and the output filter inductance 5mH. The inverter was designed for 1.4 kW power output. The RMS current injected into the grid was 6 A. The main parameters of the simulation were as those of the experiments. The inverter was loaded by a parallel R–L–C circuit 164 K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 with quality factors 1, 2, and 2.5. Fig. 9 shows the point of common coupling voltage Vpcc, the inverter current and voltage, and grid current and voltage ideally when the inverter is tripped off. Fig. 10(a) shows the simulation result for R–L under islanding operation with 1 kW inverter output power. The inverter output current is almost the same for both simulation and experiment results (see Fig. 10(a) and see Fig. 12(a)). From the simulation result for R–L load under islanding condition, the value of the maximum inverter output current before inverter is tripped off is 7.08 A and 5.7 A from the experiment (see Fig. 12(a)). Fig. 10(b) shows the simulation result for R–C under islanding operation with 1 kW inverter output power. The Vpcc voltage is almost the same for both simulation and experiment results (see Fig. 10(b) and 12(b)). From the simulation result for R–C load under islanding condition, the value of Vpcc voltage before inverter is tripped off is 160 V and 216 V from the experiment (see Fig. 12(b)). 3.3. Experiment results The grid system was first connected to the inverter and then removed to create islanding. Fig. 11 gives the different Fig. 12. Experiment results for (a) R–L load, and (b) R–C load under islanding operation, with (M1) Vgrid, (M2) Vpcc, (M3) the inverter output current and (M4) load current. K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 165 Fig. 13. Experiment results for R–L–C load under islanding operation, at (a) Q = 1, (b) Q = 2, and (c) Q = 2.5, with (M1) Vgrid, (M2) Vpcc, (M3) the inverter output current and (M4) load current. Fig. 14. Experiment results for R–L–C load under islanding operation, at Q = 2.5 with (M2) the inverter output current, (M3) load current. 166 K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 Inverter starts to deliver power Watt Inverter power Load power load power grid power inverter power Grid power seconds Fig. 15. The inverter comes “on-line” and gradually increases its output to 1 kW. Table 6 Detection times for the R–L–C load with Q = 2, as taken by PM6000 Universal Power Analyzer. Timestamp 20130130155137.30 20130130155137.30 20130130155137.30 20130130155137.60 20130130155137.60 20130130155137.60 B C D B C D Channel Arms Watt Load Grid Inverter Load Grid Inverter 5.00 2.51 5.35 0.00 0.00 0.00 1091.88 182.38 1283.13 0.00 0.00 0.00 Table 7 Detection times for the different quality factors. Capacity inverter output Quality factor of the RLC Load Detection time 1 kW 1 kW 1 kW 1 2 2.5 21.25 ms 24.8 ms 55.7 ms Table 8 Response to abnormal voltages. Voltage (at PCC) Maximum trip time V < 120 (V < 50%) 120 6 V < 211 (50% 6 V < 88%) 211 6 V 6 264 (88% 6 V 6 110%) 264 < V < 329 (110% < V < 137%) 329 6 V (137% 6 V) 6 cycles 120 cycles Normal operation 120 cycles 2 cycles inverter outputs: 25%, 50%, 75% and 100% with pure resistive load under islanding condition. The results allow conclusion that the ratio of the inverter’s output and load consumption can affect the amplitude of the load voltage. Fig. 12 shows the experiment results for the R–L and R– C loads under islanding operation. In the following experiments, the grid-connected inverter will be tripped off when islanding is detected. Under islanding conditions, the magnitude and frequency of the voltage at PCC tend to slide from the rated grid values. It has been proved that the larger the power imbalance (DP and DQ in local generation and consumption in the islanded system prior to grid disconnection), the larger the variations are in the frequency of the voltage and voltage at the PCC. Therefore, standard under/over frequency and under/over voltage protections are successful in preventing islanding in system with large enough power imbalances. The islanding condition for the experiments conducted was made to have the smallest power imbalance possible, i.e., the worst-case scenario. Fig. 13 shows the experiment results for R–L–C load under islanding, at Q = 1, Q = 2, and Q = 2.5. In the following experiments, the grid-connected inverter will be tripped off 21.25 ms (Q = 1), 24.8 ms (Q = 2) and 55.7 ms (Q = 2.5) after the grid is disconnected. From all the following experiments (see Fig. 13), the inverter (Vpcc) briefly swings up to slightly more than + and 400 volt peak after the grid is disconnected, and then shuts down. The detection time of islanding operation may be different under different loads and different quality factors of RLC load. As Fig. 14 shows, (M2) and (M3), at inverter output 1 kW and R– L–C load with Q = 2.5, the inverter output current was almost identical with the load current. This indicates the worst case for islanding detection, where the power-flow between the grid-connected inverter and the local load is balanced. Table 6 lists the disconnection times for when the grid was disconnected until the inverter was tripped off. As shown in Table 6 the disconnection time is 0.3 s (24.8 ms) for R–L–C load with Q = 2. PM6000 Universal Power analyzer was set to the minimum time setting available for data recording (every 0.3 s). The detection time satisfies the IEEE 929-2000 control standard, verifying that the proposed islanding method is able to detect islanding effectively. As shown in Table 6, the inverter current value immediately zeros out after the grid is disconnected (see Table 7). According to IEEE Std. 929-2000 standard, the relationship between the amplitude of the load voltage and the K.N.E.K. Ahmad et al. / Solar Energy 97 (2013) 155–167 maximum trip time for determining the islanding condition are shown in Table 8. All the experiment results show the amplitudes of the local load (Vpcc) to have passed the following requirement. The proposed method is shown to effectively and effortlessly detect islanding operation under different load types and quality factors. As Fig. 15 shows, the inverter comes “on-line” and gradually increases its output power to 1300 W. Fig. 15 shows the transition as the inverter power increases and the grid transitions from delivering the load power to negative. Note that the load power stays constant during the transition period. 4. Conclusions A low cost and effective passive method for islanding detection of single-phase grid-connected inverter is proposed. An analog circuit for under/over voltage protection has been developed, to ensure fast detection with no added delay. An under/over frequency circuit has also been developed, for accurate and fast frequency detection and with minimal external components. A new algorithm is developed in a low cost PIC18F4550. The circuit topology, control algorithm, and operational principle of the proposed method have been presented. PIC18F4550 optimized the method’s performance, which has improved the disconnection time of a past method. The inexpensiveness, effectiveness, and minimal external component count are the proposed method’s advantages. Its performance and feasibility has been tested and proven by a purpose-developed prototype. The main improvements are the disconnection times, effectiveness in detecting islanding under various load types, inverter output powers and quality factors and also cost down of the end product. Acknowledgments This work was supported by UMPEDAC (University of Malaya Power Energy Dedicated Advanced Centre), a flagship HICoE (Higher Institution Centre of Excellence) of the Ministry of Higher Education, Malaysia and HIR Grant H16001-00-0000032 Campus Network Smart Grid System for Energy Security. The authors thank all concerned. 167 References Chiang, W.-J., Jou, H.-L., Wu, J.-C., Wu, K.-D., Feng, Y.-T., 2010. Active islanding detection method for the grid-connected photovoltaic generation system. Electric Power Systems Research 80, 372–379. Chowdhury, S.P., Chowdhury, S., Crossley, P.A., 2009. Islanding protection of active distribution networks with renewable distributed generators: a comprehensive survey. Electric Power Systems Research 79, 984–992. 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