Survey
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
8 10월 19일 중간고사 1: 6:00 – 8:00 pm 1 2 8.1 Band Structure Hybridization of s- and p-states Sp3 state Two s+p bands, lower filled higher empty for Ge, Si Group IV 3 Calculated band structure for Si. Eg, at T=0 K C : 5.48 Si : 1.17 Ge : 0.74 Sn(gray) : 0.08 T 2 EgT Eg0 , T D 5 104 eV / K D: Debye Temperature Dependence of band-gap on temperature 4 8.2 Intrinsic Semiconductors At elevated temperature, Semiconductor become conducting For intrinsic semiconductors, EF E g / 2 5 Assuming, me*=mh* Z(E): density of states N(E): number of electrons per unit energy N*: number of electrons dN * N ( E )dE, V 2m Z (E) 4 2 2 N (E) 2 Z (E) F (E) 3/ 2 E1/ 2 E EF 1 F (E) exp k T E EF B exp 1 kBT V N* 2 2 V N 2 2 * 3/ 2 2m 2 0 3/2 E 1/ 2 E EF exp dE kBT E EF 1/2 exp 0 E exp dE kBT kBT EF k BT 2m 1/2 2 exp ( k T ) B k T 2 B EF V 2mk BT 3/2 ( ) exp( ) 2 4 k BT V 2 2 6 2m 2 3/2 Inserting that EF=-Eg/2, and effective mass ratio me*/m0, 1 2m k Ne 0 2 B 4 3/2 m m 0 * e 3/2 T 3/2 Eg exp 2kBT m Ne 4.84 10 m0 15 * e 3/ 2 T 3/ 2 . Eg exp 2 k T B Number of electrons in the conduction band per unit volume (cm3) 7 Fermi Level in Semiconductors: Emax Emax n EC EG 1 = Ec 2 N v ( E ) f ( E )dE 2 0 EF = Ev = 1 2 ( 2 1 2 2 = ( 2 1 2 ( 2me* 2 2me* 2 2me* ( 2 2 ) 3 2 1 E ( EC EF ) 2 E exp dE 0 kT 1 E ( E EF ) 2 ) 2 exp C E exp dE kT 0 kT 2me* 2 3 1 E ( EC EF ) ) 2 E 2 exp dE kT 3 ) 3 2 1 kT ( E EF ) ( kT ) 2 exp C 2 kT 3 2 m kT 2 ( EC EF ) =2 exp h kT * e 2 2 m kT ( E EF ) =N C exp C where, N 2 C kT h * e 2 8 When m*e=m, Nc =2.5x1019 cm-3 3 2 Fermi Level in Semiconductors: Emax Ec Eg Ev By the same token, ( E EV ) p NV exp F kT where, NV is the effective density of states in the valence band 2 mh* kT 2 3 NV 2( ) h2 By multiplying together, np N C NV exp( EG ) kT The number should be constant for a given material for a given temperature. 9 Intrinsic Semiconductor: The electron density of free electrons equals the density of free holes. Therefore, if ni is the intrinsic carrier density, ni2 np N C NV exp( EG ) kT since, n=p, ( EC EF ) ( EF EV ) N C exp N exp V kT kT EG ( EC EF ) ) N C exp( ) 2kT kT EG NC EG 3kT me* kT ( EC EF ) ( ) ln( ) ( ) ln( * ) 2 2 NV 2 4 mh 1 n ( N C NV ) 2 exp( combining, me* 3 4 E ni N C ( * ) exp( G ) mh 2kT 10 me* 3 4 E i N C q( * ) ( n p ) exp( G ) mh 2kT Mobility Ohm’s law , j , j N e, N e N e. N e e e N h e h , * m 15 4.84 10 m0 Again, 11 For intrinsic semiconductor, 3/2 Eg T e( e h ) exp , 2kBT 3/2 me* 3/4 E N C e( * ) ( n p ) exp( G ) mh 2kT Ne N h N e e e N h e h , m 4.84 10 m0 * 15 Due to lattice vibration 12 3/ 2 T 3/ 2 Eg e( e h ) exp 2kBT Increasing the number of carriers , 8.3 Extrinsic Semiconductors 8.3.1 Donors and Acceptors For intrinsic semiconductor, 109 electrons per cubic centimeter P. Binding E = 0.045 eV Doping : adding small amounts of impurities (III or V) to intrinsic semiconductors Dopant in substitutional manner 13 14 8.3.2 Band Structure Donor electrons & thermally excited electrons CB VB Impurity states; donor or acceptor levels n-type, major carrier: electrons p-type, major carrier: holes B, Al, Ga, In P, As, Sb 15 For extrinsic semiconductor, Charge neutrality is important, n nA ( N D nD ) p n N A N D p Ec Ed Ef Ea 16 Ev where, ( E EF ) 1 nD N D {( ) exp[ D 1]}1 g kT ( E EA ) 1 ( N A nA ) N A{( ) exp[ F 1]}1 g kT g 2 (spin orientation) (degeneracy factor) or , ( E ED ) N D ( N D nD ) N D {2 exp[ F 1]}1 kT ( E EF ) N A nA N A{2 exp[ A 1]}1 kT ( EC EF ) n N C exp[ ] kT ( EF EV ) p NV exp[ ] kT 8.3.3 Temperature Dependence of the Number of Carriers 17 8.3.4 Conductivity Nde ee , 18 8.3.5 Fermi Energy n-type semiconductor, Nd=1016 atoms per cubic centimeter 19 8.4 Effective Mass 1 2 d E * 2 m 2 . dk 20 In the presence of electric field, electrons at the bottom of conduction band and holes at the top of the valence band move in opposite directions in real space (same sign mass but different sign charge), whereas electrons and holes both at the top of the valence band move in the same direction (different sign mass cancels different sign charge). 8.5 Hall Effect jx Nx e Due to Ex FL e( v B) x Bz e, y x Bz . Hall field FH e y since FH FL 0 jx Bz I x Bz Ly N e y Ax eVy Vy : Hall voltage measured in the y-direction Hall constant RH Ey jx Bz 1 RH Ne Negative value for electron Positive value for hole 21 8.6 Compound Semiconductors 22 23 8.7 Semiconductor Devices 8.7.1 Metal-Semiconductor Contacts (a) rectifying contact: convert AC to DC (b) ohmic contact: electrons can easily flow in both directions draw the I-V curve: electrons like to roll downwhill 24 (Space charge region) Holes wan to drift upward 8.7.2 Rectifying Contacts (Schottky Barrier Contacts) Work function: energy difference between the Fermi energy and the ionization energy (Vacuum level) (electron affinity) Contact potential - Diffusion current: electrons from both sides cross the potential barrier at equilibrium state - Drift current: the transport of thermally created electrons and holes 25 26 The width of the depletion region in the n-type semiconductor: Assuming full depletion model (there are no free electrons in the depletion region and that the only charge there is the charge on spatially uniform ionized donors. 2 N D q x 2 r 0 0 and =D at x wd x and, =0 at x 0 B.C.: E N D qx C x r 0 C N D qwd r 0 N D q ( x wd ) x r 0 By integration a second time between x 0 and x wd N D q 2 D ( ) wd 2 r 0 wd ( wd [ 2 r 0D 1/2 ) N D q 2 r 0 (D app ) D N q since, C 27 1 (C / A) 2 ]1/2 r 0 A d 2(qD qapp ) r 0 q 2 N D Reverse bias 28 Forward bias I MS I SM M ACT exp , k T B 2 M S eVappl . ACT exp , k T B 2 A: Area of the contact, C: constant Thermionic emission: J x (4 qm / h3 )(kT ) 2 exp( q / kT ) CT 2 exp( q / kT ) where, 29 C (4 qmk 2 / h3 ) : Richardson const.=1.02x106 A m 2 K 2 S For low enough temperatures, Fermi level lies close to the conduction band, See Fig. 8.10 I net ISM I MS Consists of saturation current and a voltage-dependent term M S I S ACT exp kBT 2 I net eV I S exp kBT 1 . A few advantages over p-n diode No annihilation of electrons and holes, charge carrier , electron Better heat removal 30 8.7.3 Ohmic Contacts (Metallizations) M S The formation of highly doped region to make an Ohmic contact. 31 8.7.4 p n 32 Rectifier (Diode) Diffusion of electrons in p-type region The saturation current in the case of reverse bias is given by the Shockley equation, which is also called ideal diode law: Ideal diode law : Cep Dep Chn Dhn I S Ae L Lhn ep Diffusion of holes in n-type region , The electrons in the p-type region and the holes in the n-type region can diffuse to the junction area and be swept away when the reverse bias voltage is applied. Chn : concentration of holes in the n-type region Cep : concentration of electrons in the p-type region Einstein relation: Dep ep kBT e Lep Dep ep , 33 8.7.5 Breakdown Voltage and Zener Diode When the reverse voltage of a p-n diode is increased above a critical value, the high electric field strength caused some electrons to become accelerated to a velocity at which impact ionization occurs. The breakdown voltage, which is the result of this avalanching process, depends on the degree of doping: the higher the doping the lower the breakdown voltage. Tunneling or Zener breakdown occurs when the doping is heavy and thus the barrier width becomes very thin. -takes place at low reverse voltages 34 8.7.6 Solar Cell (Photodiode) A photodiode consists of a p-n junction. A Si PV device yields an inherent voltage of 0.6 V. Diffusion length of carriers: 10 – 200 m depending on the quality of Si. Quantum Efficiency: Si: 20 – 28% efficiency The goal is to produce for terrestrial applications inexpensive solar cells having 20% efficiency or better and a lifetime of about 20 years. 35 8.7.8 Tunnel Diode (OK) Degenerated doping – high doping Fermi level lies in the conduction and valence band Depletion width is very narrow (~10 nm) Show negative current-voltage characteristics. 36 8.7.9 Transistors n-p diode p-n diode For signal amplification Smaller and higher resistivity + Climb Unbiased n-p-n bipolar junction transistor diffuse acceleration The E-B diode is forward biased, whereas the B-C diode is strongly reverse biased. Electron flow from E to C can be controlled by bias voltage on the Base 37 Transistors : amplification of music or voice electronic switch (on & off) for logic and memory (1) Bipolar : current flow through n-type as well as through p-type Heavily doped # of holes kept to a minimum(light doping) or thin doping level is not critical The voltage applied between emitter and base modulates the transfer of the electrons from the emitter into the base region. 38 (2) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) Can be controlled Electric field Can be controlled Unipolar : current flow only through n-type Two types: depletion-type MOSFET 39 Normally on * Enhancement-type MOSFET Normally off This type is dominating in IC circuit industry 40 N-MOSFET P-MOSFET If both are integrated on one chip and wired in series, this technology is labeled CMOSFET (complementary MOSEFT) For information processing, low operating voltage, low power short channel for High speed. MOSFET = MOST (metal-oxide-semiconductor transistor) = MISFET (metal-insulator-semiconductor field-effect transistor) 41 (2) Junction Field-Effect Transistor (JFET) Normally on, depletion type 42 Transistors 43 (2) GaAs MESFET Use of computer still demands higher switching speed device- GaAs seems to be the answer with its higher electron mobility Source, Drain – Ohmic contact Gate – Schottky contact 44 8.7.10 Quantum Semiconductor Devices The energy level is separated due to the size quantization. 45 46 8.7.11 Semiconductor Device Fabrication 47 48 49 8.7.12 Digital Circuits and Memory Devices 8-39: AND device (A(G) and B(S) on makes On) 8-41: NAND (NOT-AND) device with one load MOSFET and two input MOSFET transistors, A and B on – OFF 50 A or B off - On Either 8-40: inverter circuit (Gate on – OFF, Gate off – On) 8-42: OR device: Either A or B on - On 8-43: NOR device: Either A or B on - OFF 8-44: SRAM memory device called R-S flipflop with latch 8-46: DRAM memory device 51 52