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EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
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EE 410 – Power Electronics Laboratory
Fall 2010
Dr. Dolan
Experiment #4 – Buck Regulator
Group #3
James Tuccillo, Scott Carey, Rene Canedo
11/15/2010
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Equipment Used:






Oscilloscope
PC with LTSpiceIV
LT1976 Module
DC Power Supply
AC Power Meter
BK Precision 8540 DC Electronic Load
Circuit Diagrams:
Figure 1: LTSpice Simulation of Buck converter using LT1976
Figure 2: Linear Technology’s LT1976 Controller Demo Board
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Software Procedure:
a) Load LTSpiceIV program
b) Create a new file: File  New Schematic
c) Place parts by going to Edit on the menu. Note that instead of a resistor as the load, you may also
use a dc current source for the load
 LT 1976:
Edit  Component  [PowerProducts]  LT1976
 DC Source:
Edit  Component  Voltage
Right Click on DC source to change the DC voltage value

Capacitor:
Edit  Capacitor (or click the capacitor symbol on the menu)
Right Click on capacitor to change the Capacitance value

Resistor:
Edit  Resistor (or click the resistor symbol on the menu)
Right Click on resistor to change the Resistance value

Diode:
Edit  Diode (or click the diode symbol on the menu)
Right Click on diode  Pick New Diode  select the diode part number

Inductor:
Edit  Inductor (or click the inductor symbol on the menu)
Right Click on inductor to change Inductance value
d) Set simulation:
Simulate  Edit Simulation Cmd
Under Transient tab, type in 12ms for stop time then hit OK
e) Run simulation:
Simulate  Run (or click the run short cut on the menu)
A “Select Visible waveforms” window appears, just click OK
Once the simulation is completed, display the output voltage waveform by placing the cursor at the
output voltage node (voltage probe will appear once the cursor is at the node)
g) Display the inductor current, by placing the current probe ON the component (current probe will
appear once the cursor is ON the component)
h) Measure the following Steady State performance:
 Percent Line regulation with Vinmin = 9V and Vinmax = 15V, both measured at full load
 Percent Load regulation with 10% load and full load as points of measurements, both measured
at nominal input voltage.
 Peak to peak ripple of output voltage Vopp vs. Percent load from 20% to 100% with 20% step size.
Tabulate and plot the result.
 Peak to peak ripple of inductor current ILpp vs. Percent load using the same previous step.
Tabulate and plot the result.
 Efficiency vs. Percent loads with again the same previous step. See note b) below for obtaining
the efficiency. Tabulate and plot the result.
f)
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Hardware Procedure:
a) Turn on the dual dc power supply and adjust its voltage to 9 V. Once you get the 9 V then turn the
power supply off.
b) Connect the ac power meter in between the input terminals of the dc-dc converter and the 9V power
supply
c) Without connecting the electronic load to the Buck module, turn on the electronic load. Press the
On/Off key to turn OFF the load. Select the Constant Current (CC) mode. Select the digit to adjust by
pressing either the left or right arrow key. Select the current range to 3 A by pressing the Shift key
and the “D-Mode” key until the 30 A led on the display is OFF. Set the current value by turning the
knob to 20% load.
d) Connect the output terminals of the dc-dc converter to the electronic load terminals. MAKE SURE
THE POLARITY OF CABLE CONNECTING THE TERMINALS FROM THE CONVERTER TO THE
LOAD MATCHES (+ from converter’s output goes to + of the electronic load, and – terminal of
converter to – terminal of the load.
e) Connect a multimeter to measure the output voltage of dc-dc converter
f) Connect the output terminals to an oscilloscope
g) Ask the instructor to check your circuit. Once verified you may now turn on the power supply. Also
turn on the electronic load by pressing On/Off key.
h) Obtain the following measurements when input voltage is Vinmin = 9 V and full load of 3 Watts. When
increasing the load, turn the knob on the electronic load gradually and slowly while closely watching
the current on the display.
Table 3-1. DC-DC Converter Data
Percent
Load
0
20
40
60
80
100
Pin
[W]
Vout
[V]
Iout
[A]
Pout
[W]
Vopp-ripple
[V]
Percent
Efficiency
i) Using data above, compute percent load regulation and plot the Vopp-ripple vs. Percent Load
j) Turn off the electronic load by pressing the On/Off key, and turn off the power supply.
k) Change the input voltage to 12 V and reset the load current back to 20%. Repeat measurements for
the above table.
l) Repeat the previous step for input voltage of 15 V.
m) Turn the power supply off
n) Compute percent line regulation at full load when Vinmin = 9V and Vinmax = 15V
o) Plot the efficiencies from the three sets of measurements (Vi n = 9V, 12V, and 15V).
p) Set the input voltage to 12 V and adjust the load to 80%. Do not turn on the power supply and
electronic load yet.
q) Place the scope probe to measure the voltage across the diode. For a Buck converter, this is the
“Switching Node”. Ask the instructor to verify the placement of the scope probe.
r) Once verified turn on the power and the load, and obtain the diode voltage waveform. Measure the
duty cycle and the switching frequency of the dc-dc converter
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Calculations
%𝐿𝑖𝑛𝑒 𝑅𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 =
𝑉𝑜𝑢𝑡(ℎ𝑖𝑔ℎ 𝑖𝑛𝑝𝑢𝑡) − 𝑉𝑜𝑢𝑡(𝑙𝑜𝑤 𝑖𝑛𝑝𝑢𝑡)
∗ 100
𝑉𝑜𝑢𝑡(𝑛𝑜𝑚𝑖𝑛𝑎𝑙)
%𝐿𝑜𝑎𝑑 𝑅𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 =
Ƞ=
𝑉𝑜𝑢𝑡(𝑙𝑜𝑤 𝑙𝑜𝑎𝑑) − 𝑉𝑜𝑢𝑡(ℎ𝑖𝑔ℎ−𝑙𝑜𝑎𝑑)
∗ 100
𝑉𝑜𝑢𝑡(ℎ𝑖𝑔ℎ 𝑙𝑜𝑎𝑑)
𝑃𝑜𝑢𝑡 𝑉𝑜𝑢𝑡−𝑎𝑣𝑔 ∗ 𝐼𝑜𝑢𝑡−𝑎𝑣𝑔
=
𝑃𝑖𝑛
𝑉𝑖𝑛−𝑎𝑣𝑔 ∗ 𝐼𝑖𝑛−𝑎𝑣𝑔
Data and Observations:
Table 1 DC-DC Converter Data
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Graph 1: Vout before and during steady state
Line and Load regulations of simulation results (software procedure step h)
%𝐿𝑖𝑛𝑒 𝑅𝑒𝑔 =
%𝐿𝑜𝑎𝑑 𝑅𝑒𝑔 =
3.344𝑉 − 3.347𝑉
∗ 100 = .091%
3.3𝑉
3.33432 − 3.3448
∗ 100 = 478.3 ∗ 10−6
3.3448
Experimental percent line regulation at full load with Vin min =9V and Vinmax=15V in hardware step n
%𝐿𝑖𝑛𝑒 𝑅𝑒𝑔 =
3.267 − 3.274
∗ 100 = .21%
3.3
peak-peak voltage ripple vs %load (Simulation)
50
45
Voltage (mV)
40
35
30
25
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
Graph 2: Vripple as percent load increases
70%
80%
90%
100%
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
peak-peak ripple current Vs % load (Simulation)
3
Current (A)
2.5
2
1.5
1
0.5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Graph 3: Inductor current ripple as percent load increases
Efficiency vs %load (Simulation)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0%
10%
20%
30%
40%
50%
60%
70%
Graph 4: Efficiency graph as percent load increases
80%
90%
100%
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Vout_ripple vs %load (Experimental for Vin=9V)
35
30
Voltage (mV)
25
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Graph 5: Vout_ripple vs. percent load Vin =9V
Vout_ripple vs %load (Experimental for Vin=12V)
35
30
Voltage (mV)
25
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
Graph 6 Vout_ripple vs. percent load Vin =12V
70%
80%
90%
100%
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Vout_ripple vs %load (Experimental for Vin=15V)
35
30
Voltage (mV)
25
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Graph 7 Vout_ripple vs. percent load Vin =15V
Efficiency vs %load (Experimental for Vin=9V)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0%
10%
20%
30%
40%
50%
60%
70%
Graph 8: Efficiency vs. percent load for Vin =9V
80%
90%
100%
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Efficiency vs %load (Experimental for Vin=12V)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0%
20%
40%
60%
80%
100%
Graph 9: Efficiency vs. percent load Vin = 12 V
Efficiency vs %load (Experimental for Vin=15V)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0%
20%
40%
60%
Graph 10: Efficiency vs. percent load Vin = 15 V
80%
100%
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Figure 3: Diode voltage waveform Duty cycle = 32.2%, Switching freq. = 641 kHz
Discussion:
The efficiency plot of the buck converter was taken with different voltage inputs to compare
which input voltage and at what percent load the DC-DC converter is most power efficient. The input
value that was the least efficient was the highest voltage of Vin= 15V. The trend between voltages
showed that the higher the voltage input went the less efficient due to more loss over the switched and
diodes. Also at higher voltages the duty cycle is reduced to maintain the same output voltage which
requires the switch to be open longer. Since the switch is open longer less power is transferred directly
to the load.
The group also took plots of the Vripple as the percent load increases to see the effect of drawing
more current on the voltage output waveform. The results show that Vripple does not increase as the
output current increases because the voltage ripple is only affected by the duty cycle, capacitor size,
output voltage, inductor size, and switching frequency. The duty cycle for buck converter is dependent
on the input and output voltage. This result is expected because the idea behind a buck converter is to
keep a constant voltage regardless of the current drawn from the circuit.
Another important aspect of a buck converter is the load regulation which gives a measure of
the difference of the average output voltage at high load and low load over the high load. The load
regulation improves as the Vin increases due to more energy being available with the higher voltage
input. Also a higher voltage input draws less current through the system reducing the I2R losses.
The duty cycle in a buck converter is the output voltage over the input voltage. The input
voltage was held constant and the output voltage would vary slightly which slightly changes the duty
cycle of the system. The theoretical duty cycle for Vin = 3.3/15= .22, a 22 percent duty cycle while the
measured duty cycle is 32.2% due to the output voltage fluctuating slightly.
EE 410 – Power Electronics Laboratory
Experiment 4 – Buck Converter
Conclusion:
This lab covered the operation of a basic buck converter which takes a higher input voltage and
bucks it down to a lower voltage at the output. The prelab gives a mathematical understanding of how
the system should ideally work with ideal diodes and switches with no voltage drop across them, which
shows what the power system is primarily affected by. It is important to keep the voltage and current
ripple as low as possible in order to get a clean usable waveform at the end which is also explained in
the prelab. The operation of the buck converter is shown in the simulation section of the lab by
observing the current and voltage waveforms at different areas in the circuit, and the effect of
increasing the load to those waveforms. The hardware section of the lab gave an understanding of how
the buck converter performs with non-ideal parts and the results of different input voltages and higher
loads. These non-ideal parts with voltage drops across the switches and the diodes affected the
efficiency of the circuit and cause a change in the duty cycle.
Signatures:
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