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Transcript
3-Phase BLDC/PMSM Low Voltage
Power Stage User Guide
Devices Supported:
MC33937A
Document Number: 3PHLVPSUG
Revision 0
07/2012
2
Freescale Semiconductor
Petr Konvicny
Freescale Semiconductor
Roznov Czech System Center
About This Book
This document describes the 3-Phase BLDC/PMSM Low Voltage Power Stage, targeted for rapid
development of motor control applications.
To locate any published updates for this document, refer to the Freescale websaite at:
http://www.freescale.com/.
Revision History
Table i. Revision History
Date
Revision
level
08/2012
0
Description
Initial release
Page
number(s)
30
Documentation
The MC33937A documentation is available at the Freescale web site, http://www.freescale.com.
as follows:
• Data sheet — MC33937A modules in detail
• Product briefs — device overview
• Application notes — address specific design issues
MC33937A Controller Board, Revision
Freescale Semiconductor
3
MC33937A Controller Board, Revision
4
Freescale Semiconductor
Chapter 1 Introduction
1.1
1.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Board architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Chapter 2 Interface Description
2.1
2.2
2.3
2.4
2.5
Power Supply J1 and J2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
UNI3 Interface J3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
MC33937A Interface J4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Motor connector J6, J7, J8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Braking chopper connector J5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 3 Design Consideration
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3-phase power bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
DC Bus voltage and current feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Over-current, under-voltage, and other safety functions . . . . . . . . . . . . . . . . . . . . . . . . . 13
Back EMF signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Phase current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power supplies and voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Brake choppper circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Chapter 4 Electrical Characteristics
Freescale Semiconductor
1
2
Freescale Semiconductor
Introduction
Chapter 1 Introduction
Freescale’s embedded motion control series 3-Phase BLDC/PMSM Low Voltage Power Stage is an
8 V–50 V, 10 Amps, surface-mounted power stage. In combination with one of the embedded motion
control series controller boards, it provides a software development platform that allows algorithms to be
written and tested without the need to design and build a power stage. It supports speed and position
sensing based on Hall sensors, resolver sensors, encoder sensors, and back electromotive force
(BackEMF) signals for sensorless control.
The 3-Phase BLDC/PMSM Low Voltage Power Stage has an over-current protection. It is independent of
the control board when you choose the internal MC33937A DC bus operational amplifier with an
over-current comparator. You must therefore be careful when you drive low impedance motors. The
current measuring circuitry is setup for ±10 Amps full scale. At ambient temperature (25 °C), the board
remains within thermal limits when operating with output currents of up to 10 Amps continuous RMS.
Input connections are made via the 40-pin and 10-pin ribbon cable connectors J3 and J4. Pin assignments
for the input connector are illustrated in Section 2.2, “UNI3 Interface J3.” Power connections to the motor
are made on the 3-way connectors J6 (Phase A), J7 (Phase B), and J8 (Phase C). The input voltage
requirements are met by a power supply of 8 V–50 V. The voltage should be within these limits. The board
sustains a voltage of at least 8 V with a maximum of 58 V. The input power is supplied by means of the
2.1 mm jack connector J2 or clamp connector J1.
The following is summary of the information required to use the 3-Phase BLDC/PMSM Low Voltage. For
design information, see Section Chapter 3, “Design Consideration.”
1.1
Features
The 3-phase low voltage power stage features are:
• MC33937A MOSFET pre-driver
• Motor control interface:
— UNI-3
— MC33937A pre-driver
• Braking chopper circuit
• Phase and DC-Bus voltage and current sensing circuits
• DC-Bus over current protection
• +12 Vdc, +5 Vdc DC-DC converters
1.2
Board architecture
The 3-phase low voltage power stage contains basic building blocks. See Figure 1-1.
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
1-3
Introduction
Figure 1-1. 3-Phase BLDC/PMSM Low Voltage Power Stage controller board block diagram
The board is supplied by VBAT voltage in the range of 8 V–50 V.
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
1-4
Freescale Semiconductor
Introduction
Figure 1-2. 3-phase BLDC/PMSM low voltage power stage block location
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
1-5
Introduction
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
1-6
Freescale Semiconductor
Interface Description
Chapter 2 Interface Description
Inputs and outputs are located on eight connectors and headers available on the board:
• Two power supply connectors J1 and J2
• Three-pin motor connector (J6, J7, J8)
• Two-pin brake connector J5
• 40-pin UNI3 connector J3
• 10-pin MC33937 interface connector J4
Pin descriptions for each connector and header are identified in the following information. Table 2-1
shows the pin assignments and signal descriptions for the UNI3 interface connector J3.
The 3-Phase BLDC/PMSM Low Voltage Power Stage contains several connectors and headers that serve
for connecting the power supply for motor phases connections, and other functions.
The input power supply, attached to inputs J1 and J2, must be in the range 8 V–50 V DC.
The output for the motor is executed by the connectors J6, J7, and J8. For more details see Section 2.4,
“Motor connector J6, J7, J8.”
Each connector and header is labelled on the top side of the board.
2.1
Power Supply J1 and J2
The 3-Phase BLDC/PMSM Low Voltage Power Stage board can be supplied by either using the 2.1 mm
DC power plug J2 or connector (J1).
The board provides 12 V, 5 V, and 3.3 V for board logic and analogue circuits, and for controllers boards
connected through UNI-3 interface.
The board is designed to operate in the voltage range from 8 V–50 V. The board is protected against a
reverse battery.
2.2
UNI3 Interface J3
The Unified Interface Version 3 (UNI-3) defines the interface between the 3-Phase BLDC/PMSM Low
Voltage Power Stage and the dedicated controller board.
The list of UNI-3 signals is as follows:
• Control signals:
— PWM phase A, B, C top and bottom switches control
— Braking chopper control signal
— Power Factor Correction (PFC)
• Monitor signals
— DC-bus voltage
— DC-bus current
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
2-7
Interface Description
•
•
— Phase A, B, C current
— Zero-cross signals
— Back-EMF phase A, B, C
— Temperature monitoring
Power Supply 12 V
Serial line — A bidirectional communication line between the Controller Board and Power Stage
Table 2-1 defines the UNI-3 pin-out.
Table 2-1. UNI-3 signal description
Interface Pin
Signal Name
MCU Signal
Description
Direction
1
PWM_AT
–
Phase A top switch control (H -> Turn OFF)
Digital input
3
PWM_AB
–
Phase A bottom switch control (H -> Turn ON)
Digital input
5
PWM_BT
–
Phase B top switch control (H -> Turn OFF)
Digital input
7
PWM_BB
–
Phase B bottom switch control (H -> Turn ON)
Digital input
9
PWM_CT
–
Phase C top switch control (H -> Turn OFF)
Digital input
11
PWM_CB
–
Phase C bottom switch control (H -> Turn ON)
Digital input
2, 4, 6, 8, 10
Shield
–
PWM signals shield
(grounded on the power stage side only)
–
12,13
GND_D
–
Digital power supply ground
–
14, 15
+5 V DC
–
+5 V digital power supply
–
17, 18
AGND
–
Analog power supply ground
–
19
+12/+15 V DC
–
Analog power supply
–
16,20, 27, 28,37
NC
–
Not connected
–
21
VDCBUS
–
DC-bus voltage sensing, 0 V – 3.3 V
Analog output
22
IDCBUS
–
DC-bus current sensing, 0V – 3.3V
Analog output
23
24
25
IA
IB
IC
–
Phase A current sensing, 0 – 3.3 V
Phase B current sensing, 0 – 3.3 V
Phase C current sensing, 0 – 3.3 V
Analog output
26
TEMP
–
Analog temperature 0 V – 3.3 V
Analog output
29
BRAKE_CONT
–
DC-bus brake control
Digital input
30
SERIAL
–
Serial interface
Dig. bidirectional
31
PFC
–
Power factor correction PWM
Digital input
32
PFCEN
–
Power factor correction enable
Digital input
33
PFCZC
–
Power factor correction Zero-cross
Digital output
34
ZCA
–
Phase A Back-EMF zero crossing
Digital output
35
ZCB
–
Phase B Back-EMF zero crossing
Digital output
36
ZCC
–
Phase C Back-EMF zero crossing
Digital output
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
2-8
Freescale Semiconductor
Interface Description
Table 2-1. UNI-3 signal description (continued)
Interface Pin
Signal Name
MCU Signal
Description
Direction
38
Back-EMF_A
–
Phase A Back-EMF voltage sensing
Analog output
39
Back-EMF_B
PAD2
Phase B Back-EMF voltage sensing
Analog output
40
Back-EMF_C
PAD4
Phase C Back-EMF voltage sensing
Analog output
2.3
MC33937A Interface J4
The phase top and bottom switches are controlled by the MC33937A pre-driver. The device is configured
by the SPI, see Table 2-2.
Table 2-2. MC33937A signal description
Interface Pin
Signal Name
MCU Signal
Description
Direction
1
NC
–
Not connected
–
2
NC
–
Not connected
–
3
MC33937_EN
–
Device enable
Digital input
4
MC33937_OC
–
Over current. Totem pole digital output of
overcurrent comparator
Digital output
5
MC33937_/RST
–
Reset input
Digital input
6
MC33937_INT
–
Interrupt pin output
Digital output
7
MC33937_SOUT
–
Output data for SPI port. Tri-state until CS
becomes low
Digital output
8
MC33937_SCK
–
Clock for the SPI port
Digital input
9
MC33937_CS
–
Chip select input. It frames the SPI command and
enables the SPI port
Digital input
10
MC33937_SIN
–
Input data for the SPI port. Clocked on the falling
edge of SCLK, MSB first
Digital input
2.4
Motor connector J6, J7, J8
Power outputs to the motor are located on connectors J6, J7, and J8. Phase outputs are labelled A, B, and
C. A permanent magnet synchronous or brushless DC motor phase windings can be connected to the
connectors J6, J7, and J8. Table 2-3 contains pin assignments.
Table 2-3. Motor Connector — signal description
Pin
Signal name
Description
J6
Phase A
Supplies power to motor phase A
J7
Phase B
Supplies power to motor phase B
J8
Phase C
Supplies power to motor phase C
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
2-9
Interface Description
2.5
Braking chopper connector J5
The braking resistor can be joined to connector J5. This is located on the left top corner of the board.
Table 2-4. Brake resistor connector — signal description
Pin
Signal name
Description
1
– Brake_res
Brake resistor negative terminal
2
+ Brake_res
Brake resistor positive terminal
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
2-10
Freescale Semiconductor
Design Consideration
Chapter 3 Design Consideration
The 3-phase BLDC/PMSM low voltage power stage demonstrates the ability of Freescale microcontrollers
and DSCs to control various electrical motors and for easy SW development. In addition to the hardware
needed to run a motor, a variety of feedback signals that facilitate control-algorithm development are
provided. A set of schematics for the drive is explained in the following section.
3.1
3-phase power bridge
The power stage is configured as a 3-phase power bridge with MOSFET output transistors. It is simplified
considerably by an integrated gate driver that has several safety features. Figure 3-1 shows a schematic of
the 3-phase power bridge. The pre-driver inputs are 3.3 V compatible. A Freescale MC33937 pre-driver
provides a supply voltage for the low and high side MOSFET gates. The MC33937 also provides the
MOSFETs and application protection. It integrates an under voltage hold-off, desaturation, phase
comparators, and over-current protection circuits. The dead time insertion can be configured using SPI.
The default dead time value is typically 15 us. The low and high side drivers are capable of providing a
typical current of 1 Amp. This gate drive current may be limited by an external resistor to achieve a good
trade-off between the efficiency and EMC compliance of the application.
Figure 3-1. 3-phase power bridge
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
3-11
Design Consideration
3.2
DC Bus voltage and current feedback
Figure 3-2 shows the circuity that provides feedback signals proportional to DC bus voltage and current.
Bus voltage is scaled down by a voltage divider consisting of R40, R42. The populated resistor values are
chosen in such way that a 50.05 V, 36.025 V, or 18.298 V DC bus voltage corresponds to VREF at output
V_DCBUS. This output signal is connected to the UNI3 connector pin 21.
Figure 4-2 shows the circuitry supporting DC bus current sensing. The DC bus current is sampled by shunt
resistor R33. The voltage drop for this resistor can be amplified by either the MC33937 internal amplifier
or an AD8656 operational amplifier (if populated). Both amplifiers are used as a differential amplifier for
DC bus current sensing. With R46=R52, and R48=R50, the gain is given by:
R46
A = ---------R48
The output voltage is shifted up by +1.65V VREF to accommodate positive and negative current swings.
A ±150mV voltage drop across the sense resistor corresponds to a measured current range of ±10Amps.
If you use the MC33937 for current measurement, the I_DCBUS signal is internally connected to the over
current comparator, and provides an over current triggering function. A discussion about over-current
limiting follows in section 3.3.
The DC bus current may be measured by an AD8656. To use this option, the zero resistors R35, R36 and
R37 cannot be populated. MC33937 operational amplifier inputs must be grounded to avoid incorrect OC
output behavior.
The output from opam I_DCBUS is joined to the UNI3 connector pin 22. The shunt resistor is represented
by a 0.015  resistance (Cyntec SMD), the same type as the phase current measurement resistors.
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
3-12
Freescale Semiconductor
Design Consideration
Figure 3-2. DC Bus current and voltage sensing
3.3
Over-current, under-voltage, and other safety functions
The MC33937A provides over-current and under-voltage functions. The amplified DC Bus current signal
is filtered to remove spikes, and then it is internally fed into the MC33937 over-current comparator input.
The OC comparator threshold level is adjusted by external trimmer R38 and filtered by C43. This signal
is connected to the MC33937 pin 28 OC_TH. Therefore, when DC bus current exceeds the adjusted
threshold level, all six bridge transistors are switched off. After a fault state has been detected, all six gate
drivers are off, until the fault state is cleared by the SPI command or RESET pin.
The under voltage function is implemented internally. The IC guarantees that the output FETs are turned
off in the absence of VDD or VPWR by means of the Hold-off circuit. When VDD is less than about 3.0 V
or VPWR is lower than the typically 8.0 V, a small current source pulls all output gate drive pins low and
if set an interrupt is generated.
The MC33937A safety functions keep the driver operating properly and within safety limits. It has a
thermal warning feature. If the IC temperature rises above 170 °C on one of three individual thermal
warning circuits, then an interrupt is generated if set. The IC has other safety functions, such as
desaturation detection, phase error, framing error, write error after a lock, and exiting RESET. All these
features can be configured through the SPI interface to trigger interrupts.
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
3-13
Design Consideration
A detailed description is available in the driver datasheet.
Figure 3-3. MC33937A circuit
3.4
Back EMF signals
Back EMF signals are included to support sensorless algorithms for BLDC motors, and dead time
distortion correction for a sinusoidal motor. Figure 3-4 shows circuitry for phase A; the raw phase voltage
is scaled down by a voltage divider consisting of R55 (R67 or R70) and R60. Output from this divider
produces a a back EMF sense voltage BEMF_A. The resistor values are chosen so that a 50.05 V, 36.025
V or 18.298 V of phase voltage corresponds to a 3.3 V ADC input range. The BEMF_A, BEMF_B,
BEMF_C signals are directly connected to the UNI3 interface pins 38, 39, 40.
Figure 3-4. Back EMF Sensing — Phase A, B, C
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
3-14
Freescale Semiconductor
Design Consideration
3.5
Phase current sensing
Phase currents are sampled by sensing resistors R30, R31, R32 in Figure 3-5, and amplified in the U5, U6
(AD8656) operational amplifiers. All amplifiers are used as a differential for phase current sensing. With
R41=R43, R39=R44, the gain is given by:
R39
A = ---------R41
The gain of these operational amplifiers are 11 with a +1.65 V offset. The output voltage is shifted up by
+1.65 V VREF to accommodate positive and negative current swings. A ±150 mV voltage drop across the
sense resistor corresponds to a measured current range of ±10Amps.
The outputs from opams I_A, I_B, I_C are connected to the UNI3 connector pins 23, 24, 25 through RC
filters R13, C24. The shunt resistor is represented by a 0.015 resistance (Cyntec SMD), the same shunt
resistor is used for DC bus current measurement.
Figure 3-5. Phase current sensing circuit
3.6
Power supplies and voltage reference
The 3-phase BLDC/PMSM low voltage power stage contains devices that require various voltage levels
of +12 V, +5 V, and +3.3 V.
3.6.1
Input power supply
The DC bus can be supplied from two input connectors, J1 and J2. The DC bus has reverse polarity
protection. The MC33937 driver is supplied from a SEPIC DC/DC converter that delivers a constant
output voltage of +12 V across the entire input voltage range (+8 V to +50 V). The +5 V and +3.3 V power
supplies are taken from +12 V source.
3.6.2
+12 V power supply
The constant +12 V supply voltage for the wide input voltage range (6 V to 50 V) is provided by the SEPIC
converter. This topology delivers a constant output voltage when the input voltage is below or above the
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
3-15
Design Consideration
nominal output voltage. It is suitable for this input voltage range. The LM5022 is a high voltage low side
N-channel MOSFET controller. The output voltage regulation is based on current-mode control. It
includes a start-up regulator that operates over a wide input range of 6 V to 60V, an error amplifier,
precision reference, line under-voltage lockout, cycle-by-cycle current limit, slope compensation,
soft-start, external synchronization capability, and thermal shutdown. The switching frequency has been
setup to 500 kHz.
3.6.3
+5 V power supply
The +5 V voltage level is generated by the step down DC/DC converter LM2694. This circuit delivers up
to 600 mA peak output current. The switching frequency is adjusted to 500 kHz. More information is
available in the converter datasheet.
3.6.4
+3.3 V power supply
An important voltage level for this board is +3.3 V. This is obtained from the MC33269D linear voltage
regulator, which is able to deliver up to 800 mA. The +3.3 V level is used to supply the on-board analogue
devices.
3.6.5
+1.65 V voltage reference
The +1.65 V reference is generated from the +3.3 V level by a resistors divider and an impedance isolator.
This reference shifts all current sensing output signals by 1.65 V.
3.7
Brake choppper circuit
The brake chopper circuit is included to control the operation of losing the energy from the motor through
regenerative braking to an external brake resistor.
There is only a power switch with a pre-driver and a freewheeling diode populated on the board. An
external brake resistor must connected through the two pin connector J5.
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
3-16
Freescale Semiconductor
Electrical Characteristics
Chapter 4 Electrical Characteristics
The electrical characteristics in Table 4-1 apply to an operation at 25 °C.
Table 4-1. Electrical Characteristics
Characteristic
Symbol
Minimum
Type
Maximum
Units
Power supply Voltage
VDC
8
12, 24, 42
58
V
Quiescent Current(1)
ICC
–
TBD
–
mA
Min Logic 1 Input Voltage
VIH
–
–
–
mA
Max Logic 0 Input Voltage
VIL
–
–
–
mA
Input Logic Resistance
RIN
–
4.7
–
k
Analogue Output Range
VOUT
0
-
3.3
V
Bus Current Sense Voltage
VISNS
–
165
–
mV/A
Bus Current Sense Offset
VISNSOFF
–
1.65
–
V
Bus Voltage Sense Voltage: ............. 12 V range
24 V range
48 V range
VBUS
5.3564
10.7203
14.8861
5.4445
10.9167
15.1667
5.5342
11.117
15.4529
V/V
Phase A, B, C Current Sense Voltage
VIASNS
–
165
–
mV/A
Phase A, B, C Current Sense Offset
VIASNSOFF
–
1.65
–
V
Power MOSFET On Resistance
RDS(ON)
–
22.5
28.5
m
Continuous Output Current, TC =25 °C
ID
–
35
–
A
Pulsed Output Current
IDM
–
140
–
A
Total Power Dissipation (per MOSFET)(2)
PD
–
TBD
–
W
Required Deadtime
tOFF
–
77
–
ns
1—measured
2—The
at 12 V power supply
values are measured at 25 °C. Values may differ for other temperatures.
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
4-17
4-18
Input_circuit
DCBUS_NEG
DCBUS_POS
GND
+12Vdc
AGND
+3.3VAdc
33937_EN
33937_INT
33937_/RST
33937_CS
33937_SCK
33937_SOUT
33937_SIN
33937_OC
V_DCBUS
I_DCBUS
I_C
I_B
I_A
ZCC
ZCB
ZCA
BEMF_C
BEMF_B
BEMF_A
BRAKE_CONT
PWM_CB
PWM_CT
PWM_BB
PWM_BT
PWM_AB
PWM_AT
Input circuit and power supply
GNDP
+DC_BUS
GND
+12Vdc
AGND
+3.3VA
3-phase power stage
DCB_NEG
DCB_POS
GND
+12Vdc
AGND
+3.3VAdc
33937_EN
33937_INT
33937_/RST
33937_/CS
33937_SCLK
33937_SO
33937_SI
33937_OC_OUT
V_DCBUS
I_DCBUS
I_C
I_B
I_A
ZC_C
ZC_B
ZC_A
BEMF_C
BEMF_B
BEMF_A
BRAKE_CONT
PWM_CB
PWM_CT
PWM_BB
PWM_BT
PWM_AB
PWM_AT
Power
Thursday, February 02, 2012
Date:
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A4
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Block diagram
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Rev
C
10A Low Volt. 3-ph PS with MC33937
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: ____ PUBI: x
Designer:
Drawing Title:
Petr Konvicny
1.Maje 1009
75661 Roznov pod Radhostem, Czech Republic
Czech System Centre
Electrical Characteristics
Figure 4-1. Schematic — Block diagram
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
B
1
3
2
+
C21
0.1UF
10UF
75K
R11
C22
0.1UF
0.22UF
C10
C4
33UF
C20
+12Vdc
DCBUS_POS
CON_1_PWR
J2
CON_2_TB
2
1
4
Rt for 500kHz
6
7
8
9
10
+
FB
COMP
CS
1000PF
C23
0.022UF
6
7
8
9
10
LM2694
FB
SS
RON/SD
VCC
VIN
RTN
SGND
ISEN
BST
SW
IC1
1
5
4
3
2
5
4
3
2
1
DCBUS_POS
C12
1UF
1.0K
4.7
R7
R4
DCBUS_NEG
DCBUS_NEG
DCBUS_POS
1
R8
0.1
3
1UF
C3
10UH
L1
60V
Q1
L1
1
4
L2
2
0.1UF
C5
D2
0.022UF
C13
150uH
L3
D3
MBRA160T3G
1
2
R12
10.2K
R10
10.2K
1
4.7K
220PF
C9
R3
MBRA160T3G
2
OUTPUT 12 Vdc, 1 Amps
R15
2.2
22uF
C14
+5Vdc
current sense circuit place as close as possible to LM5022
OUT
GND
C11
VCC
UVLO
LM5022
VIN
RT
U1
C1
0.1UF
SS
C2
100UF
DCBUS_POS
R18 / R17 = 3.9 for 6.125V UVLO threshold
R6
1.0K
R1
3.90K
MBRD620CT
D1
R5
33.2K
3
1
1
2
A
EP
11
2
4
3
Freescale Semiconductor
1
2
ShortingBar1206
BAR1
50OHM
L2
R9
1.2K
R2
10.2K
R6 / R7 = 8.6 for 12V output
J1
+
C7
10UF
C18
47UF
+5VAdc
C6
10UF
+12Vdc
+12Vdc
C16
0.1UF
3
C8
10UF
VOUT
AGND
1
GND/ADJ
VIN
2
U2
MC33269DT-3.3G
GND
GND
+12Vdc
C17
0.1UF
AGND
AGND
+3.3VAdc
1.Maje 1009
75661 Roznov pod Radhostem, Czech Republic
Czech System Centre
Thursday, February 02, 2012
Date:
Sheet
2
SCH-26777 PDF: SPF-26777
Document Number
Size
A3
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Input circuit and power supply
Page Title:
Drawn by:
Petr Konvicny
of
5
Rev
C
10A Low Volt. 3-ph PS with MC33937
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: ____ PUBI: x
Drawing Title:
Designer:
Petr Konvicny
+ C19
47UF
+3.3VA
Electrical Characteristics
Figure 4-2. Schematic -— Input circuit and power supply
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
4-19
4-20
A
B
C
D
5
33937_EN
33937_/RST
33937_SOUT
33937_CS
BEMF_B
ZCB
BRAKE_CONT
+12Vdc
V_DCBUS
I_A
I_C
+5Vdc
PWM_AT
PWM_AB
PWM_BT
PWM_BB
PWM_CT
PWM_CB
4
AGND
GND
1
3
5
7
9
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
HDR_2X5
J4
CON_2X20
J3
3
GND
AGND
GND
AGND
1.Maje 1009
75661 Roznov pod Radhostem, Czech Republic
Czech System Centre
1
GND
AGND
A
Thursday, February 02, 2012
Date:
Sheet
3
SCH-26777 PDF: SPF-26777
Document Number
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A4
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UNI-3 Interface
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5
Rev
C
10A Low Volt. 3-ph PS with MC33937
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
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FIUO: ____ PUBI: x
Designer:
Drawing Title:
Petr Konvicny
33937_OC
33937_INT
33937_SCK
33937_SIN
ZCA
ZCC
BEMF_A
BEMF_C
I_DCBUS
I_B
+5Vdc
+5VAdc
2
Electrical Characteristics
Figure 4-3. Schematic — UNI-3 Interface
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
A
B
C
D
DCB_NEG
DCB_NEG
DCB_POS
+
R38
10K
2
0
DNP
R35
C43
0.1UF
GND
+
BRAKE_GATE
C28
68.0UF
R77
0
0
DNP
R36
C30
47UF
5
47
R28
47
R29
R78
0
D10
MBR120LSFT1G
C
A
Populate R35, R36, R37 or R77, R78.
+3.3VAdc
33937_AMP_N
33937_AMP_P
33937_/CS
33937_SI
33937_SCLK
33937_SO
PWM_AB
PWM_BB
PWM_CB
PWM_AT
PWM_BT
PWM_CT
33937_/RST
33937_EN
+12Vdc
C27 +
68.0UF
28
25
26
18
19
20
21
13
16
22
12
15
23
5
3
4
D13
MURA110T3
1
U3
1
OC_TH
AMP_N
AMP_P
CS
SI
SCLK
SO
PA_LS
PB_LS
PC_LS
PA_HS
PB_HS
PC_HS
RST
EN1
EN2
2
DCB_POS
1
3
4
A
B
CON_2_TB
Q8
IRFR540Z
1
2
4
J5
DCB_POS
3
GND
4
24
27
53
52
50
49
33
6
11
10
1
38
37
36
35
43
42
41
40
48
47
46
45
17
0.1UF
2.2UF
PC_LSS
PB_LSS
PA_LSS
GND
C32
C31
PCZ33937AEK
AMP_OUT
OC_OUT
NC6
NC5
NC4
NC3
NC2
NC1
PHASEC
PHASEB
PHASEA
PC_BOOT
PC_HS_G
PC_HS_S
PC_LS_G
PB_BOOT
PB_HS_G
PB_HS_S
PB_LS_G
PA_BOOT
PA_HS_G
PA_HS_S
PA_LS_G
INT
VLS
I_sense_AN
I_sense_AP
PA_LSS
PA_LSG
PA_HSS
PA_HSG
D7
47
0.1UF
C34
47
C41 0.15UF
C40 0.15UF
C38 0.15UF
0
DNP
R37
2
2
MMSD914T1
R22
1
2.2UF
C33
D4
MMSD914T1
R16
1
0.1UF
C36
1
1
3
33937_AMP_OUT
33937_OC_OUT
2.2UF
C35
0.015
R33
47
R23
47
R17
3
4
3
4
3
I_sense_BN
I_DCBUS_N
ZC_C
ZC_B
ZC_A
PC_HSG
PC_HSS
PC_LSG
PB_HSG
PB_HSS
PB_LSG
PA_HSG
PA_HSS
PA_LSG
33937_INT
PB_LSS
PB_LSG
PB_HSS
I_sense_BP
I_DCBUS_P
R30
0.015
Q5
IRFR540Z
Q2
IRFR540Z
PB_HSG
D5
2
D8
2
47
MMSD914T1
R24
1
47
MMSD914T1
R18
1
GND
47
R25
47
R19
GND
1
1
2
4
3
4
2
3
I_sense_CN
I_sense_CP
PC_LSS
PC_LSG
PC_HSS
C42
1000pF
2
D9
2
R34
3.3K
PC_HSS
PB_HSS
PA_HSS
47
MMSD914T1
R26
1
47
2
1
1
2
0.1UF
C37
GND
VCC
GND
C39
22UF
R32
0.015
Q7
IRFR540Z
Q4
IRFR540Z
7
5
OutA
OutB
MC33152
NC 8
GND
BRAKE_GATE
1.Maje 1009
75661 Roznov pod Radhostem, Czech Republic
Czech System Centre
4 InB
2 InA
+12Vdc
CON 1 TB
1 SHORT
CON
J8 1 TB
2
CON
J7 1 TB
1 SHORT
U4
1 NC
GND
J6
1 SHORT
47
R27
47
R21
1
Approved:
<Approver>
Drawn by:
Petr Konvicny
Date:
Size
A3
A
B
C
D
Thursday, February 02, 2012
1
Sheet
4
SCH-26777 PDF: SPF-26777
of
3ph power bridge with driver circuit
5
Rev
C
10A Low Volt. 3-ph PS with MC33937
Document Number
Page Title:
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: ____ PUBI: x
Drawing Title:
Designer:
Petr Konvicny
BRAKE_CONT
Brake Switch
GND
TP10
Output terminal
R31
0.015
Q6
IRFR540Z
Q3
IRFR540Z
PC_HSG
D6
MMSD914T1
R20
1
4
3
4
3
5
VSS
29
7
8
9
PUMP
VPUMP
VSUP
14
32
51
54
VDD
VLS_CAP
VLS
VPWR
GND0
GND1
PGND
PA_LS_S
PB_LS_S
PC_LS_S
30
31
2
44
39
34
EP
55
6
3
Freescale Semiconductor
+
DCB_POS
Electrical Characteristics
Figure 4-4. Schematic — 3ph power bridge with driver circuit
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
4-21
A
B
C
D
5
I_sense_CP
I_sense_CN
I_sense_BP
I_sense_BN
I_sense_AP
I_sense_AN
3.0K
R58
3.0K
R54
3.0K
R49
3.0K
R47
3.0K
R43
3.0K
R41
AGND
AGND
AGND
R64
10.0K
R63
10.0K
+3.3VA
AGND
33k
R59
47PF
C55
47PF
C54
33k
R53
33k
R51
47PF
C52
47PF
C50
33k
R45
33k
R44
47PF
C47
47PF
C46
33k
R39
C44
22UF
3
2
3
2
+1.65Vref
5
6
+
-
1
AD8656
U5B
0.22UF
C56
5
6
+
4
AD8656
U6B
I_A
TP3
TPAD_050
I_B
7
7
TP9
TPAD_050
+1.65Vref
TP5
TPAD_050
I_C
Decoupling capacitor C48
Place as close as possible to V+ pin
AD8656
12PF
DNP
C59
AGND
V-
V+ U5A
TP2
TPAD_050
Decoupling capacitors C44, C45
Place as close as possible to V+ pin
+3.3VA
12PF
DNP
C57
1
AD8656
Reference divider:
Analog supply voltage is divided by 2;
Output voltage is +1.65Vdc
1.2k
DNP
R75
-
V-
V+ U6A
+3.3VA
12PF DNP
4
C58
AGND
+
0.1UF
C48
+1.65Vref
AGND
1.2k
DNP
R73
+
C45
0.1UF
+1.65Vref
AGND
1.2k
DNP
R74
8
4
8
4
5
AGND
R42
3.6K
R40
51.1K
DNP
R65
35.7K
3
PA_HSS
I_DCBUS_P
I_DCBUS_N
AGND
AGND
R60
3.6K
AGND
33k
+3.3VAdc
AGND
1.2k
DNP
R76
2
BEMF_A
PB_HSS
+1.65Vref
2
AGND
33937_AMP_P
1
3.3V @ 50.05V
3.3V @ 36.025V
3.3V @ 18.298V
(51k/3.6k)
(35.7k/3.6k)
(16k/3.6k)
AGND
R62
3.6K
R57
51.1K
DNP
BEMF_C
1.Maje 1009
75661 Roznov pod Radhostem, Czech Republic
(51k/3.6k)
(35.7k/3.6k)
(16k/3.6k)
R72
16.0KTP8
DNP TPAD_050
I_DCBUS
3.3V @ 50.05V
3.3V @ 36.025V
3.3V @ 18.298V
Czech System Centre
BEMF_B
PC_HSS
R69
35.7K
TP4
TPAD_050
Decoupling capacitor C26
Place as close as possible to V+ pin
AD8656
R71
TP7
16.0K TPAD_050
DNP
AGND
V-
33937_AMP_OUT
1
Approved:
<Approver>
Drawn by:
Petr Konvicny
A
B
C
D
Thursday, February 02, 2012
Date:
1
Sheet
5
SCH-26777 PDF: SPF-26777
Document Number
Analog sensing circuits
of
5
Rev
C
10A Low Volt. 3-ph PS with MC33937
Size
A3
Page Title:
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: ____ PUBI: x
Drawing Title:
Designer:
Petr Konvicny
R61
3.6K
+
+3.3VA
V+ U7A
12PF
DNP
R68
35.7K
3
2
0.1UF
C49
C60
Do not populate:
R73, C57, R74, C58, R75, C59, R76, C60
R56
51.1K
DNP
AGND
33937_AMP_N
(51k/3.6k)
(35.7k/3.6k)
(16k/3.6k)
V_DCBUS
(51k/3.6k)
(35.7k/3.6k)
(16k/3.6k)
R70
16.0K TP6
DNP TPAD_050
3.3V @ 50.05V
3.3V @ 36.025V
3.3V @ 18.298V
R67
35.7K
+3.3VA
R55
51.1K
DNP
33k
R52
47PF
C53
47PF
C51
Back EMF voltage sensing
3.0K
R50
3.0K
R48
R46
3.3V @ 50.05V
3.3V @ 36.025V
3.3V @ 18.298V
R66
16.0K TP1
DNP TPAD_050
DC BUS Voltage Sensing
DC BUS Current Sensing
DCB_POS
3
8
+
4
4-22
3 Phase Current Sensing
Electrical Characteristics
Figure 4-5. Schematic — Analogue sensing circuits
3-Phase BLDC/PMSM Low Voltage Power Stage, Revision
Freescale Semiconductor
Freescale Semiconductor
23
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3PHLVPSUG
Rev. 0
07/2012