Download Stability Investigation using SPICE of BUCK DC-DC Converter

ANNUAL JOURNAL OF ELECTRONICS, 2014, ISSN 1314-0078
Stability Investigation using SPICE of BUCK
DC-DC Converter
Georgi Tzvetanov Kunov, Elissaveta Dimitrova Gadjeva, Maria Petkova Petkova
and Tihomir Sachev Brusev
Abstract – A stability investigation of the BUCK DC-DC
converter with Average Current Mode Control is considered
in the present paper. A Spice stability investigation equivalent
circuit is composed. Using parametric analysis, zeros and
poles of the current regulator transfer function are
investigated. The optimal values of the compensation network
elements for the current regulator are obtained. The stability
of the converter operation is validated by Nyquist plot and
transient analysis.
Keywords – Power Electronics, BUCK DC-DC Converters,
Average Current Mode Control, Stability, Spice Simulation
I. INTRODUCTION
when D > 0.5, peak to average current error, topology
problem when inductor current is other than output current.
The advantages of ACMC are: average current tracks well
the current program in CCM or DCM, noise immunity is
excellent even at low set point, ACMC is working
whatever the topology, slope compensation is not
required but loop gain at Fsw is limited to achieve stability.
In the present paper the stability of work of BUCK DCDC converter with Average Current Mode Control is
investigated. It is performed using the program Cadence
PSpice. The simplified circuit of the converter is shown in
Fig. 1.
Vin
+
R
Rcs
0
-
CRe g
-
PWM
VRe g
+
+
+
G. Kunov is with the Department of Power Electronics, Faculty
of Electronic Engineering and Technologies, Technical
University of Sofia, 8 Kliment Ohridski blvd., 1000 Sofia,
Bulgaria, e-mail: [email protected]
E. Gadjeva is with the Department of Electronics and
Electronics Technologies, Faculty of Electronic Engineering and
Technologies, Technical University of Sofia, 8 Kliment Ohridski
blvd., 1000 Sofia, Bulgaria, e-mail: [email protected]
M. Petkova is with the Department of Power Electronics,
Faculty of Electronic Engineering and Technologies, Technical
University of Sofia, 8 Kliment Ohridski blvd., 1000 Sofia,
Bulgaria, e-mail: [email protected]
T. Brusev is with the Department of Technology and
Management of Communication Systems, Technical University
of Sofia, 8 Kliment Ohridski blvd., 1000 Sofia, Bulgaria,
e-mail: [email protected]
C
D
Gate
D rive
-
The basic methods of control used in the BUCK DC-DC
converters are voltage mode control (VMC), peak current
mode control (CMC) and average current mode control
(ACMC). Their advantages and disadvantages are
systematically summarized in [1,2,3]:
Voltage Mode Control:
The advantages are: stable modulation – less sensitive to
noise, single feedback path, it can work over a wide range
of duty cycles. The disadvantages are: loop gain
proportional to Vin, LC double pole often drives type PID
compensation, continuous current mode (CCM) and
discontinuous current mode (DCM) differences – a
compensation challenge, slow response to input voltage
changes, current limiting must be done separately.
Current Mode Control:
The advantages are: power plant gain offers a single-pole
roll-off, line rejection, cycle-by-cycle current limiting
protection, current sharing. The disadvantages are: noise,
minimum on-time, current probe (Rsense, current
transformers).
Peak versus Average Current Mode Control: The disadvantages of Peak CMC are: poor noise
immunity (at switching on), slope compensation required
Vout
L
Q
Vs th
Vre f
Vsthp-p
0
Fig.1. Simplified circuit of BUCK DC-DC with ACMC
In the classical theory of automated control, a closed
loop system is represented by its mathematical description
[4]. This approach, applied to BUCK DC-DC converter
with ACMC, is illustrated in Fig. 2.
The designations for the separate blocks are: WMod –
transfer function of the BUCK DC-DC converter, WLCR –
transfer function of the output filter, WCR – transfer
function of the current regulator (a PI regulator is used),
WVR – transfer function of the voltage regulator (a PID
regulator is used). Applying the rules for the equivalent
transformations, (Fig.2a, Fig.2b and Fig.2c), the system is
reduced to a single block with equivalent transfer function
We.
The mathematical description of the transfer functions of
the separate blocks is shown as follows [5,6]:
Parallel Compensation
Vre f
WMod
WLCR
Vout
WCR
WVR
a)
Vre f
WPC
WLCR
WVR
b)
Vout
Vref
We
Vout
c)
Fig.2. Equivalent transformations of the system
219
ANNUAL JOURNAL OF ELECTRONICS, 2014
The transfer function of the Modulator:
WMod ( s) =
Vin
Vsthp − p
(1)
- inductor current ripple: ΔIL=0.5A;
- output voltage ripple: ΔVout = 0.25V;
- maximum change in load current: ΔILoad-max=4A.
First, the smoothing filter is designed by the following
equations[6]:
The transfer function of the output filter:
WLCR
1 + sRC C
=
1 + s ( RL + RC ) C + s 2 LC
(2)
where:
RL – direct-current resistance (DCR) of the filter inductor,
RC – electrical series resistance (ESR) of the filter
capacitor.
The transfer function of the PI current regulator:
WCR ( s ) =
s+
1
RC 2 .CC 2
1
⋅
RC1 .CC1 ⎛
C + CC 2 ⎞
s. ⎜ s + C1
⎟
RC 2 .CC1 .CC 2 ⎠
⎝
Vin − Vout Vout 1
=26.6 µH
.
.
ΔI L
Vin Fsw
We choose L=33µH.
L≥
C≥
2
LΔI Load
− max
=267µF
2.Vout ΔVout
We choose C=330 µF with ESR=25 mΩ.
The calculated L and C values define the cutoff
frequency:
(3)
FLC =
⎛
⎞
1 ⎞⎛
1
⎜s +
⎟⎜ s +
⎟
+
R
C
R
R
C
(
)
RV 1 + RV 3 ⎝
V 2 V 2 ⎠⎝
V1
V3
V3 ⎠
WVR ( s ) =
(4)
RV 1 RV 3CV 1 ⎛
CV 1 + CV 2 ⎞⎛
1 ⎞
s⎜s +
⎟⎜ s +
⎟
RV 2CV 1CV 2 ⎠⎝ RV 3CV 3 ⎠
⎝
The transfer function of the Parallel Compensation:
WMod ( s )
1 + WMod ( s ) .WCR ( s )
1
2π LC
= 1.5kHz
and ESR zero frequency:
The transfer function of the PID voltage regulator:
WPC ( s ) =
(5)
FESR =
1
=
=19.3kHz
2πC.ESR
B. Compensator calculation of the PI current regulator
A PI type compensator as a current regulator is shown in
Fig. 3a. The location of its zero crossover frequencies is
shown in Fig. 3b. The recommended values are [6]:
FZ1=0.75×FLC=1.125 kHz and FP2=0.5×Fsw=125 kHz.
The desired bandwidth of the system (F0=25 kHz) is
chosen bigger than FESR.
The equivalent transfer function:
Cc1
We ( s ) =
(7)
WMod ( s)WLCR ( s )
=
1 + WPC ( s )WLCR ( s)WVR ( s)
Rc2
Vi-cs
Wlcr
-40dB
Fesr
Flc
Cc2
-20dB
Rc1
Wcr -20dB
-20dB
-
WMod ( s )WLCR ( s )
1 + sWMod ( s ) + WMod ( s )WLCR ( s )WVR ( s )
(6)
Vi-ref
Vi-comp
+
=
Fz1
We 0.75Flc
a)
In [7], the mathematical description of the transfer
functions of the output filter and the regulators is replaced
by their real circuits. This approach, combined with the
SPICE simulation, simplifies the stability investigation of
the system. It is applied in the present paper.
II. STABILITY INVESTIGATION OF BUCK DC-DC
CONVERTER
Fo
-20dB
Fig.3. PI type compensator as a current regulator
The recommended parameter value [6] of the resistor RC1
is between 1 kΩ and 5 kΩ. It is chosen RC1=3.9 kΩ.
The parameter value of the resistor RC2 is calculated by
the equation:
RC 2 =
A. Calculation of the LC filter parameters
In order to perform stability investigation of the BUCK
DC-DC regulator system, it is necessary to have the
parameters of the mode in which it will work. The mode of
operation includes the following parameters [6]:
- switching frequency: Fsw=250 kHz;
- input voltage: Vin=15V;
- output voltage: Vout = 5V;
- maximum output current: ILoad-max = 5A;
b)
Fp2
0.5Fsw
FESR F0 Vsthp − p
⋅
R = 278kΩ
(FLC )2 Vin C1
(8)
We choose RC2=270 kΩ.
The relationship between the parameter values of the
passive components of the regulator and the poles of the
compensator is given by equations [6]:
220
Fz1 =
1
2πRC 2CC 2
(9)
ANNUAL JOURNAL OF ELECTRONICS, 2014
Am od GAIN = 3
Rcs
DS
Cc1 {Cc1v}
1u
Rdcr 10m
L
33uH
C
330uF
R
1
+
-
2πRC 2 CC1
By the above equations standard values are calculated
and chosen: CC2=4.7 pF and CC1=680 pF.
(Fig. 5), the values of the frequency FZ1 and FP2 are
obtained, which ensure the system stability.
+
-
(10)
V
1
FP 2 =
C. Compensator calculation of the PID voltage regulator
Rc2 {Rc2v}
Ki
GAIN = 1e 6
Ifb 0
Out
Cc2 {Cc2v}
A PID type compensator as voltage regulator is shown in
Fig. 4a. The location of its zero crossover frequencies is
shown in Fig. 4b. The recommended values are [6]:
-
UCR
Rc1
OUT
V
+
Cv1 100p
V
Cv2 10n Rv2 13k Cv3 27n Rv3 47
Rv1
The desired bandwidth of the system (F0=15 kHz) is
chosen less than FESR.
UVR
3.9k
-
+
Re f
0
PARAM ET ERS:
V s thpp = 5
Rc1 = 3.9e 3
Vin = 15
Flcr = 1.5e 3
Fs w = 250e 3
Fe s r = 19.3e 3
pi = 3.1415926
n = 0.75
m = 0.5
Fz1 = {n*Flcr} Fp2 = {m *Fs w }
Fo = {1.25*Fe s r}
Rc2v = {(Fe s r*Fo*V s thpp*Rc1)/(Flcr*Flcr*Vin)}
V 1 5Vac
OUT
0
V
3.9k
Ire f
FZ1=0.75×FLC=1.125 kHz; FZ2=FLC=1.5 kHz;
FP2=FESR=19.3 kHz and FP3=0.5×Fsw=125 kHz.
Re s r
25m
0
Cc2v = {1/(2*pi*Fz1*Rc2v)}
Cc1v = {1/(2*pi*Fp2*Rc2v)}
V
Cv1
Rv3
Vout
Cv3
Rv2
Wlcr
-40dB
Flc
Fesr
Cv2
Wvr -20dB
Rv1
-
VReg
Vv-comp
+
Vv-ref
Fig. 5. Equivalent circuit for stability investigation
-20dB
A recalculation of the capacitor values CC2 and CC1 is
performed in the compensation network of the PI regulator
and standard values are chosen: (CC2 = 390 nF and
CC1 = 2.7 nF). It is seen from the Nyquist plot in Fig. 6b
that the system is stable.
-20dB
Fz2
Fp2
Fp3
Fz1
We 0.75Flc
-20dB 0.5Fsw
b)
a)
Fo
-40dB
Fig.4. PID type compensator as a voltage regulator
The recommended parameter value of the resistor RV1 is
between 1 kΩ and 5 kΩ. We choose RV1=3.9 kΩ.
The parameter value of the resistor RV2 is calculated by
the equation:
RV 2 =
F0 Vsthp− p
⋅
RV 1 = 13kΩ
FLC Vin
(11)
We choose RV2=13 kΩ.
The relationship between the parameter values of the
passive components of the regulator and the poles of the
compensator is given by equations:
1
FZ 1 =
2πRV 1CV 1
FZ 2 =
1
2πCV 3 ( RV 1 + RV 3 )
FP 2 =
FP 3 =
1
2πCV 3 RV 3
1
.
2πRV 1CV 2
(12)
(13)
a) FZ1=0.75FLC; FP1=0.5FSW
b) FZ1=0.001FLC; FP1=0.001FSW
Fig.6. Nyquist plot of the system
Е. Magnitude vs. frequency responses of the basic blocks
of the converter
The Magnitude-vs. frequency responses of the building
blocks of the BUCK DC-DC converter with Average
Current Mode Control are obtained using the simulation
circuit shown in Fig. 7.
(14)
(15)
By the equations (11) to (15) standard value are
calculated and chosen for CV1=100 pF; CV2=10 nF;
CV3=27 nF; RV3=47 Ω.
D. Stability investigation equivalent circuit
The equivalent circuit for stability investigation is shown
in Fig. 5. The Nyquist plot is shown in Fig. 6a with
calculated parameters in correspondence with the
conditions in Chapter II.A and II.B. It is seen that the
system is unstable (Fig. 6a). Using Parametric Analysis
221
Fig.7. Simulation circuit for obtaining the magnitude-vs.
frequency responses of the building blocks
ANNUAL JOURNAL OF ELECTRONICS, 2014
Eg E
Vg1
+
-
Qbuck
IRFZ44
Rg 10
+
-
SWg
GAIN = 1
TOPEN = 5us
TTR AN = 0.1u
0
L
Vin
Vdc
15Vdc
Cd
Dbuck
2n
SW1
TC LOSE = 1.5ms
33uH
Vout
V
I
V
C
Dbreak
330uF
Rout
Rch
3.33
Rd
0.025
HIcs H
+6V
0 TOPEN = SW2
1.9ms
+
-
+15V
1.43
Re s r
39
Vcc
Vcr
15Vdc
8Vdc
GAIN = 1
0
Cc1 2.7nF
Cv1 100pF
0
Cc2
Rc2
390nF
Cv2
270k
Rv2
10nF
C3
100k
Rv3
27nF
47
LM7171
6
-
2
+
Ic_fb
R1 10k
5
OUT
V-
Vg1
V+
U3
7
+15V
3
R2 10k
4
0
1
V
2
5
V
3
+6V
-
Rv1
4
3.9k
Vout_fb
Vcc
out
gnd
Ic_re f
+
U1
V LMH6657
0
R fb
3.9k
V
3
0
2
Vout_re f
V
0
0
3.9k
1
+
U2
LMH 6657
V
Rc1
4
Vcc
out
gnd
Vsth
V1 = 1V
V2 = 6V
TR = 3.8us
TF = 0.1us
TD = 0
PW = 0.1us
PER = 4us
+6V
-
Vdc
0
V1 = 0V
TR = 200us
TD = 0
PW = 7ms
V2 = 2.5V
TF = 2us
PER = 8ms
Fig. 9. The full electrical circuit of the BUCK DC-DC converter
with Average CMC, corresponding to a stable mode of operation
Fig.8. Simulation results for the magnitude-vs. frequency
responses
The circuit of the PI regulator, corresponding to unstable
mode of operation, is simulated by Bl1(n = 0.75 and
m = 0.5).
The circuit of the PI regulator, corresponding to stable
mode of operation, is simulated by Bl2(n = 0.001 and
m = 0.001).
The simulation results are shown in Fig. 8. It is seen that
a stable mode of operation is achieved, placing the zero and
the pole of the PI regulator (FZ1 and FP2) in the low
frequency range.
III. TRANSIENT STABILITY INVESTIGATION
OF BUCK DC-DC CONVERTER
The full electrical circuit of the BUCK DC-DC converter
with Average Current Mode Control is shown in Fig. 9,
using the obtained parameter values of the PI regulator,
which ensure a stable mode of operation.
The simulation results in the time domain are shown in
Fig. 10. The circuit is simulated for two stepping variations
of the load current (from 1.5А to 5А and from 5А to 1.5А).
The simulation results for the transient responses confirm
the system stability.
IV. CONCLUSION
Stability of the BUCK DC-DC converter with Average
Current Mode Control has been investigated. The optimal
values of the compensation network elements for the
current regulator are obtained corresponding to a stable
system. A parametric analysis in the frequency domain
using Cadence PSpice simulator is applied for this purpose.
Stability investigation is performed using frequency
criterion (Nyquist plot), as well as using simulation in the
time domain. The obtained simulation results confirm the
validity of the proposed procedure for optimal value
determination of the compensation network elements for
the current regulator.
Fig.10. Simulation results in the time domain
REFERENCES
[1] http://www.montefiore.ulg.ac.be/~geuzaine/ELEC0055/
[2] P.Cooke. Modeling average current control, Proc. APEC,
New Orleans, 2000, Vol.1, pp. 256-262
[3] L. Dixon. Average Current Mode Control of Switching Power
Supplies, www.ti.com/lit/an/slua079/slua079.pdf
[4] K. Ishtev. Theory of automatic control, Technical University
of Sofia, 2007.
www.ti.com/lit/an/slva274a/slva274a.pdf
[5] D. Mattingly. Designing Stable Compensation Networks for
Single Phase Voltage Mode Buck Regulators, Intersil, Technical
Brief, December 2003, TD 417.1
www.intersil.com/data/tb/tb417.pdf
[6] A. M. Rahimi, P. Parto, P. Asadi. Compensator Design
Procedure for Buck Converter with Voltage-Mode ErrorAmplifier, International Rectifier, Application Note AN-1162
www.irf.com/technical-info/.../an-1162.pdf
[7] R. Sheehan, Understanding and Applying Current Mode
Theory, Power Electronics Technology Exhibition and
Conference, October 30 – November 1, 2007, Dallas
http://www.ti.com/lit/an/snva555/snva555.pdf
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