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Transcript
A Switched Current, Switched Capacitor Temperature Sensor in 0.6u CMOS. Mike Tuthill Analog Devices, Raheen, Limerick, Ireland. email: [email protected]. Abstract A Temperature to Digital Converter is described which uses a Sensor based on the principle of switching accurately scaled currents in the parasitic substrate PNP in a standard fine-line CMOS process. The resulting PTAT δVBE signal is amplified in an Auto-Zeroed Switched-Capacitor circuit, sampled and converted to a Digital output by a low power 10 Bit ADC providing a resolution of 0.25 degree from -55 to 125 degrees with an error of less than 1 degree. The paper will focus on the design of the Sensor. Introduction A multi-channel ADC has been developed for applications where a customer needs to monitor several voltages in his system and also needs to monitor temperature. To maintain temperature accuracy, power dissipation must be minimized to prevent self-heating while still providing the required resolution and speed for the other channels. The resulting product definition was a 100 KSPS, 10 Bit ADC with 4 input channels plus temperature. The supply range is 2.7 to 5.5v with a maximum supply current of 1mA. An auto-power-down mode may be used when full speed is not required, such as when measuring temperature, giving an average power dissipation of 1 micro-Watt at 10 conversions per second. Integrated Temperature Sensors The technique of measuring temperature by comparing the difference in Base-Emitter voltages of two transistors is well known [1]. This technique normally needs isolated Bipolar transistors but has also been implemented in CMOS by using the parasitic substrate PNP in an N-well process at different current densities [2]. The resulting PTAT signal may be written as: δVBE = (kT/q).ln[(Ic1.A2)/(Ic2.A1] where A is a scale factor relating to the emitter area, k is Boltzmann’s constant, q is electronic charge and T is temperature in degrees Kelvin. For the popular current density ratio of 8 this gives δVBE = 53mV approx at room temperature. Thus the circuitry that processes this signal on chip must have a low offset voltage and good noise performance. However, even with perfect follow-on circuitry, a significant error source remains in the VBE mismatch of the substrate PNPs at different current densities. For the previous example, a mere 1.06mV mismatch produces a 2% error in degrees Kelvin or 6 degrees Centigrade at ambient temperature. This error is also a scale-factor error which can not be removed by a single temperature adjustment. As a continuous output is not required from a temperature sensor when used with an ADC, a single PNP may be used at switched currents as in Fig.1, thus removing this matching requirement. The δVBE signal is (kT/q).ln(N), where N is the current ratio. This signal is subtracted from VBE and amplified in the switched capacitor circuit. The absolute value of the current used is not critical, only the ratio is important and so precision, low temperature coefficient resistors are not required. Fig.2 shows a development of the basic circuit where two PNPs are used to generate a 2.δVBE signal from one switching action of the current sources and while maintaining a constant supply current. As the VBE of one transistor switches from a low to a high value, the VBE of the other transistor switches from high to a low. The two δVBE signals are summed in a differential switched capacitor circuit. Although two transistors are now used, there is no matching requirement between them. Only the δVBE of each transistor at the switched currents is summed in the amplifier. Generating a 2.δVBE signal from currents I and N(I) provides the same noise performance as the single transistor circuit if run at I and (N)2.I and so provides a significant improvement in power dissipation. The amplifier is auto-zeroed to remove offset and 1/f noise. These switches, S5-S8, are included in Fig.3. A further improvement in performance may be achieved by taking multiple 2.δVBE samples by switching the I and N(I) currents back and forth several times and summing the samples. This has the effect of averaging the temperature over the time taken. This is done by adding the right-hand-side switches in Fig.4. The current is switched back and forth four times as shown giving a further 2x improvement in noise. This technique requires more complex offset cancellation as the amplifier must be chopped in phase with the current switching. The output voltage of the final circuit is Voutdiff = (8.k/q).ln(N).(Cin/Cf).(T), volts/deg. Kelvin. Current Ratio There is a degree of freedom in the choice of current ratio and capacitor ratio for a given sensor sensitivity. The output is to be measured by a 10 Bit ADC using a 2.5v reference voltage and should have a resolution of 0.25 degrees per LSB or 4 LSBs per degree. The resulting expression for capacitor ratio may be calculated as follows: (8.k/q).ln(N).(Cin/Cf) = (4).(2.5/1024) Cin/Cf = [(1.25).(q)]/[(1024).(k).ln(N)] Cin/Cf = [(1.25).(1.602192e-19)]/[(1024).(1.380623e-23).ln(N)] For N=8, this gives Cin/Cf = 6.812443, difficult to manufacture accurately. A search for a better ratio leads to the discovery that with N=17, the capacitor ratio is exactly 5.000003, less than 1 ppm from an integer number that’s easy to lay out and manufacture with good repeatability. A value of 10pF is chosen for Cin based on kT/C noise considerations. After SPICE optimization, the currents are chosen as 2uA and 34uA as a compromise between speed, power, noise and accuracy. Current Sources The 17:1 ratio’ed current sources are made using an array of unit PMOS devices laid out with the same care and techniques as used for 8 and 10 Bit current-source DACs, with a full ring of dummy devices. Thus the matching data on such structures can be predicted and is well within the requirements of the temperature sensor as verified in simulations. For this reason current- copier techniques were not considered necessary. Also, a different unit current source is chosen for each of the four switching phases thus averaging the error in the current source ratio. This is shown in Fig 5. I1 is chosen as the unit for the first δVBE sample, then I2 and so on. The four unit devices are in the centre of the current source array, surrounded by the rest. Offset With the values of N and Cin/Cf, the sensor output is in Volts/degree Kelvin. To convert this to Volts/degree Centigrade, an offset must be subtracted to centre the output within the range of the ADC for the required temperature range of -55 to 125 degrees. This offset is chosen such that at ambient temperature, 25 degrees, the ADC output is at mid-scale, 1.25v, resulting in code 192 at -55C and 912 at 125C. Code 0 would occur at -103 and full-scale at 152.75 degrees. Fig.5 shows how this is done by adding two further unit capacitors and switches and using an offset voltage tapped from the ADC reference. This offset voltage is adjusted at probe by fuse-trimming to give the correct digital output at the measured ambient temperature. Scale factor must be good by design as calibration at multiple temperatures is too expensive. ADC + Reference The ADC used is a conventional, switched capacitor, SAR type with true differential sampling. A precision low tc external 2.5v reference may be connected to the REFIN pin or the part may be run on internal reference. This internal bandgap reference is a switched current, switched capacitor circuit based on the same techniques as described for the sensor where a scaled δVBE is added to a VBE in the correct proportion to give the lowest variation over temperature. Operation with internal reference is enabled by simply grounding the REFIN pin. Performance + Conclusion The 4-channel ADC plus temperature-to-digital converter is fabricated on 0.6 micron DPDM CMOS with a die area of 1.62mm x 2.05mm. The die area of the sensor alone is 0.7mm x 0.35mm, dominated by the two 10pF poly-poly capacitors. Supply voltage is 2.7 to 5.5v with a supply current of 0.9mA with external reference and 1.25mA when the internal reference is enabled. The ADC achieves 61dB SNR and 76dB THD when sampling the voltage input channels at 100KSPS. Conversion time when measuring temperature is increased to 25usec. The chip is packaged in 16 lead SOIC and TSSOP with a single channel version in 8ld SOIC. A serial interface is used to minimize pin count. The variation in sensor error over temperature is within +/-1 degree from -55 to 150 degrees. When the part is run in auto-shut-down mode the supply current is reduced to approx 0.2uA, the drain current of one weak PMOS device in the power-on reset circuit. When asked for a conversion, the part powers up to full supply current in 2usec, performs a conversion on temperature in 25usec and then goes back to sleep. The resulting average power dissipation depends on the conversion rate and is measured at 1 micro-Watt at 3v and 10 conversions/sec. References [1] M. Timko, “A Two-Terminal IC Temperature Transducer,” IEEE Journal of Solid-State Circuits, Vol. SC-11, pp.784-788, December,1976. [2] A.Bakker, J.H. Huijsing, “Micropower CMOS Temperature Sensor with Digital Output”, IEEE Journal of Solid-State Circuits, Vol.31, No.7, pp.933-937, July 1996. Fig.1: Single δVBE Fig.2: 2xδVBE Differential Fig.3: 2xδVBE Differential With Offset Cancellation. 8.δVBE.(CIN/CF) Fig.4: Multi-Phase Current Switching. I1 I2 I3 I4 Fig.5: Switched Unit Current Sources with Offset for Vout=1.25 at T=25deg.