Download Integer Arithmetic

Integer Arithmetic
198:211
Computer Architecture
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In a computer, all numbers are represented with a finite number of bits
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Lecture 8 & 9
Fall 2012
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Topics:
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Integer Arithmetic Chapter 2.3
Overflow
Integer Multiplication and Division
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Range of values for unsigned int is
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All numbers have range +/- 2W , including results of
operations on 2 or more numbers
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When two (+ve or –ve) numbers are added result
may end up in the red region
The answer will be wrong. Need to detect
On some occasions, left to the programmer to detect
On other occasions, hardware will provide the
necessary information to detect overflow
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(2 bytes)
(4 bytes)
0 to 4 294 967 296
Range of vales for int is
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Implication of finite number
of bits
0 to 65 535
Range of values for short int is
-32768 to +32767
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2 bytes =16 bits, 4 bytes =32 bits
Max integer value is given by 216 or 232
Lets look at unsigned numbers
Range of values for unsigned short int is
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This determines maximum value that can be represented
int x, short int sx;!
What is sizeof(x), sizeof(sx)?!
- 2 147 483 648 to 2 147 483 647
Unsigned Binary addition
5 0101
+ 6 0110
---------------
11
1011
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6 0110
- 5 0101
---------------
1
0001
8 1000
+ 10 1010
---------------
18  1 0010
2
0010
Sum of 4 bit operands may require 5 bits in the result.
If we limit the result to only 4 bits, then ignore MSB (value
is 2w )
The result is actually U+V – 2w
Same as (U+V) mod 2w
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Unsigned binary addition
unsigned short int
unsigned short int
unsigned short int
ux=6;uy=5;
ans=uy-ux;
printf (“Value
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of
answer is %u\n", ans);
Should this operation even be allowed?
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-5 1011
+ -2 1110
---------------
-7 1 1001 ignore carry out
sum is s+x < s or s+ x < x
Overflow
Recall, 2s complement –ve numbers are represented with MSB=1
MSB has a special meaning in 2s Complement
Addition of 2s complement is just binary addition with carry ignored
Subtraction, invert the sign of the subtrahend and add
Carry out - a bit carried out of MSB
Carry in – a bit inserted into MSB
-7 1001
+5
0101
---------------
-2
1110
s+x >= s and s+x >=x
Overflow has occurred if
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In C, –y is represented as 2s complement
2’s complement addition
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An overflow occurs when the result cannot fit within the word-size
limits of the result data type
When executing C programs, overflows are not signaled as errors!
It is onus on the programmer to determine if an overflow has
occurred or make sure that overflow does not occur by limiting the
ranges of the operands
When two unsigned numbers s, x are added
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Guess
Why does this happen?
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What will happen?
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What should happen?
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Overflow
ux;
uy;
ans;
4
0100
- (-2)
0010
---------------
6
0110
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When two numbers of w bits are added, the result could need w+1
bits.
Since, MSB of 1 represents negative numbers, a carry into the
MSB creates problems
Example 1: Positive Overflow
6
0110
+5
0101
---------------
-5
1011
Carry out 0
Carry in 1
Example 1: need to add 2w to compensate
Example 2: Negative Overflow
-6
1 0 1 0
+ (-6)
1 0 1 0
----------------------
4
1 0 1 0 0
Carry out 1
Carry in 0
Example 2: need to add -2w to compensate
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Overflow
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In example 1, we added two positive numbers, that resulted a carry
into the MSB
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3
0011
+2
0010
---------------
+5
0101
result was a –ve number
(in 2’s complement), MSB of 1 means negative number
Positive overflow
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Result was a +ve number
A carry out of MSB leaves MSB bit as 0. A MSB of 0 means a positive
number in 2’s complement
Negative overflow
Detecting overflow
5
0101
-3
1101
---------------
+2 1 0010
Carry out 1
Carry in 1
Carry out 0
Carry in 0
In example 2, we added two negative numbers, that resulted a
carry out of MSB (ignore)
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Normal case
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-4
1100
5 0101
---------------
1
1 0001
-2
1110
-3
1101
---------------
-5
1 1011
Carry out 1
Carry in 1
Carry out 1
Carry in 1
Adding a +ve number and a –ve number will not cause a problem
Adding two +ve numbers without carry in and carry out is also OK
Adding two –ve numbers with carry in and carry out is also OK
Detecting overflow
Opera&on First operand Second operand X+Y Overflow condi&on Overflow occurs when
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Adding two positive numbers and the result is
negative and vice versa
Subtracting a negative number from a positive
number and the result is negative
Subtracting a positive number from a negative
number and the result is positive
≥0
≥0
<0
X+Y <0
<0
≥0
≥0
X-­‐Y <0
<0
<0
≥0
X-­‐Y ≥0
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Actions on overflow
Unsigned multiplication
Detect in hardware
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Complier generated code for a Language can
make use of these flags to inform programmer
Ignore overflow and leave it to programmer to
implement checks to detect overflow
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When two numbers, each w bits long are multiplied, the result
can be 2*w bits long
If the result also needs to be w bits long, then w bits need to
be discarded
The w Most Significant Bits (MSBs) are discarded
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Unsigned Multiplication
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unsigned int ux, uy, up;
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True Product: 2*w bits" u · v
Discard w bits: w bits"
*
u
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v
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• • •
UMultw(u , v)
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• • •
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Standard Multiplication Function
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true product in 2*w bits
if product is also w bits ling, Ignore high
order w bits
Else, the result needs to be 2*w bits long
Multiplication terms (recall
grade school)
Unsigned Multiplication in C
Operands: w bits"
up = ux * uy
Truncates product to w-bit number up = UMultw(ux, uy)
Modular arithmetic: up = (ux ⋅ uy) mod 2w
Decimal Multiplication
Multiplicand
Multiplier
Partial products
Final sum
Each digit in the multiplier has
different place values
The partial product is shifted
left for each consecutive digit
in the multiplier
123 x 101
123
000
123
-----------------------
12423
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Implements Modular Arithmetic
UMultw(u , v)
= u · v mod 2w
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Binary (unsigned) Multiplication
1 0 1 x 1 0 1 0 1 1 1 1 Algorithm
Step1: Check LSB of multiplier
Decision Step 2: If 1, then add multiplicand to
result
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If 0, add 0 to result
l  Step 3: Shift multiplicand left by 1 bit
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1 1 1 l 
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Multiply by 2
Step 4: Shift multiplier right by 1 bit
l  Stop Condition: Repeat steps for number of
bits in the multiplier
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Binary multiplication
Binary multiplier
M=#bits in multiplier
RESULT=0
16 bits (note: multiplicand is 8 bits but needs 16 bits for shifts)
Multiplicand
Shift left
LSBPTR=LSB[MULTIPLIER]
N
Y
IS LBSPTR=0?
8 bits
Add multiplicand to RESULT
ADDER
Shift left 1 bit Multiplicand
Shift right 1 bit Multiplier
M--;
STOP
Control
Multiplier
Shift right
Result
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Y
16 bits
IS M=0?
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Signed Multiplication
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ANS=X*Y
ANS is +ve if X and Y have the same sign else ANS is –ve
Hence
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Sign extension
Determine sign of product based on sign of multiplicand and
multiplier
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Next, 2s complement multiplication
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With sign extension
-3 * -3
111101 x
111101
Ans= 2*w LSBs
Takes the first 6 Least
Significant digits
Note
1 +1 = 10
1 +1 +1 =11
1+ 1+ 1+1=100
1+1+1+1+1+1=101
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Convert multiplier, multiplicand to positive numbers
Multiply unsigned numbers as before
Compute sign, convert product accordingly
2s complement multiplication
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Signed integer 4-­‐bit representa&on 8-­‐bit representa&on 16-­‐bit representa&on +1 0001 00000001 0000000000000001 -­‐1 1111 11111111 1111111111111111 Another 2s Complement
multiplier
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111101 x
111101 1 1 1 1 0 1 0 0 0 0 0 0 l 
1 1 1 1 0 1 1 1 1 1 0 1 l 
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. . . . . 0 0 0 1 0 0 1 Perform sign extension on shifts
Use a combined register for multiplier and
result
l  101 x 010
1 1 1 1 0 1 1 1 1 1 0 1 Converting a 2s complement number to a larger data type (short to long)
For +ve numbers, you can pad as many 0s to the MSB as you want
without changing value
For 2’s complement, in order to change from 4 bits to 8 bits or from 8 bits
to 16 bits, append additional bits on the left side of the number. Fill each
extra bit with the value of the number's most significant bit (the sign bit).
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000
000
101
110
111
010
001
001
100
010
-3 x 2
LSB is 0, add 0, and shift right 1 bit
LSB is 1, add multiplicand and
shift right 1 bit (with sign extension)
LSB is 0, add 0, and shift right 1 bit
STOP
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Binary multiplier (with sign
extension)
Fast Multipliers
8 bits (No Shift)
Number of tricks used to improve
multiplication
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Multiplicand
ADDER
Result
Multiplier
16 bits
Shift right
Control
Integer division
Integer division
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Repeated subtraction
l  Shift and subtract
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262
240
22
12
10
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#times=[#of digits(DIVIDEND) -#ofdigits(DIVISOR)] +1
Align divisor to dividend (by shifting left), so that MSB of dividend and divisor has the same place value
STEP: Find the largest integer k s.t k*divisor <= dividend
Make k LSB of quotient
Remainder = dividend – k*divisor
Shift left 1 bit quotient (multiply by 10)
Shift right 1 bit divisor (divide by 10)
#times--;
Repeat Until #times=0
Answer is Q, Remainder
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Integer Division (shift and
subtract)
Repeated subtraction
Q=0; R=Dividend, D=Divisor!
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While (D<=R)!
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{Q++; R=R-D;}!
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printf(Q(in binary),R)!
l  0111 divided by 11!
l  Q=0; R=0111, D=11!
l  I1:
Q=1; R=0111-11=0100!
l  I2;
Q=2; R=0100-11=0001!
l  Exit!
l  Q=0010, R=0001!
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1
1
0
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Shift right and LSB(Q)=1
0
1
0
1
0
Shift right and LSB(Q)=1
0
0
1
0
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Binary division (Algorithm 1)
Remainder=dividend
Subtract Divisor from remainder
R=R-D
Condition: if remainder ≥ divisor
Use subtraction: (remainder – divisor) ≥ 0
Y
N
Reminder<0
Remaindern+1 = Remaindern – divisor
Restore Remainder
By adding Divisor
R=R+D
Have to restore original remainder
Called restoring division
l  Dividend = Q x Divisor + remainder
l  Size(dividend in bits) = Size(Q) +
Size(Divisor)
Shift right and LSB(Q)=0
1
1
0
What if it doesn’t fit?
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Shift right and LSB(Q)=0
1
0
0
0
OK, so if it fits, what do we do?
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0
0
0
How does hardware know if division fits?
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1
1
1
1
1
0
Integer Division
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Again, back
to 3rd grade (56 ÷ 6 = 9 rem 2)
1
0
0
1
Shift left 1 bit Quotient
Set LSB(quotient)=0
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Shift left q bit quotient
Set LSB(quotient)=1
Shift right 1 bit divisor
Y
31
STOP
N
#of itertation>remainder size in bits
32
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Restoring Division Example
Restoring Division Example
Iteration
Iteration
0
1
2
3
Step
Divisor
Remainder
Initial values
0010 0000
0000 0111
1: Rem = Rem - Div
0010 0000
1110 1110
Check: Rem < 0 +D, sll Q LSB(Q)=0
Q=0000
Shift Div right
0001 0000
0000 0111
2: Rem = Rem - Div
0001 0000
Step
Divisor
Remainder
1: Rem = Rem - Div
0000 0100
0000 0011
Check: Rem>= 0, sll Q LSB(Q)=1
Q=0001
Shift Div right
0000 0100
0000 0011
00000010
0000 0011
1: Rem = Rem - Div
0000 0010
0000 0001
Check Rem >= 0 , sll Q LSB(Q)=1
Q=0011
Shift Div right
0000 0010
0000 0001
Q=0000
4
1111 0111
Check Rem < 0 +D, sll Q LSB(Q)=0
Q=0000
Shift Div right
0000 0111
0000 1000
3: Rem = Rem - Div
00001000
1111 1111
3a: Rem < 0 +D, sll 1Q LSB(Q)=0
Q=0000
Shift Div right
00001000
0000 0111
00000100
0000 0111
5
00000001
Q=0011, R=0001
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32 bit Binary Division
Divisor
Shift right
64 bits
Quotient
Shift left
64-bit ALU
32 bits
Remainder
Write
Control
test
64 bits
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