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Transcript
Chapter 16 Analog to Digital and Realtime Clocks Digits are a human invention; nature does not count or measure using numbers. We measure natural forces and phenomena using digital representations, but the forces and phenomena themselves are continuous. Time, pressure, voltage, current, temperature, humidity, gravitational attraction, all exist as continuous entities which we measure in volts, pounds, hours, amperes, or degrees, so as to better understand them and to be able to perform numerical calculations. In this sense, natural phenomena occur in analog quantities. Sometimes they are digitized so as to facilitate measurements and manipulations. For example, a potentiometer in an electrical circuit allows reducing the voltage level from the circuit maximum to ground, or zero level. In order to measure and control the action of the potentiometer, we need to quantify its action by producing a digital value within the physical range of the circuit; that is, we need to convert an analog quantity that varies continuously between 0 and 5 volts, to a discrete digital value range. If, in this case, the voltage range of the potentiometer is from 5 to 0 volts, we can digitize its action into a numeric range of 0 to 500 units, or measure the angle or rotation of the potentiometer disk in degrees from 0 to 180. The device that performs either conversion is called an A/D or analog-to-digital converter. The reverse process, digital-to-analog, is also necessary, although not as often as A/D. In this chapter we explore A/D conversions in PIC software and hardware. The second topic of this chapter is the measurement of time in discrete (albeit, digital) units. In this context we speak of “realtime” as years, days, hours, minutes, and so on. So a realtime clock measures time in hours, minutes, and seconds, and a realtime calendar measures it in years, months, weeks, and days. Since time is a continuum that escapes our comprehension, we must divide it into measurable chunks that can be manipulated and calculated. However, not all time units are in proportional relation with one another. There are 60 seconds in a minute and 60 minutes in an hour, but 24 hours in a day and 28, 29, 30, or 31 days in a month. Furthermore, the months and the days of the week have traditional names. Finally, the Gregorian calendar requires adding a 29th day to February on any year that is evenly divisible by 4. The device or software to perform all of these time calculations is referred to as a realtime clock. In this chapter we discuss the use of realtime clocks in PIC circuits. 543 Chapter 16 544 Binary output 3 2 1 0 <= bits +5V Analog input A/D Converter Figure 16-1 A/D Converter Block Diagram 16.0 A/D Converters In electronics, the typical A/D or ADC converter is a device that takes a voltage input and returns a binary digital number. Figure 16-1 is a block diagram of an A/D converter. The electronic A/C converter requires an input in the form of an electrical voltage. Non-electric quantities must be changed into a voltage level before the conversion can be performed. The device that performs this conversion is called a transducer. For example, a digital barometer must be equipped with a transducer that converts the measurement into voltage levels. The voltage levels can then be fed into an A/D converter and the result output in digital form. 16.0.1 Converter Resolution An ideal A/D converter outputs into an infinite number of discrete steps that exactly represent the analog quantity. Needless to say, such a device cannot exist, and a real A/D converter must be limited to a numeric range. For example, the device in Figure 16-1 outputs a voltage range of 0 to +5 volts in four binary digits that represent values between 0 and 15. Another A/D converter may produce output in eight binary digits, and another in sixteen binary digits. The number of discrete values in the conversion is called the resolution. The converter’s resolution is usually expressed in bits. Figure 16-2 represents an A/C converter with a voltage range of 0 to +5 volts and a resolution of three bits. Suppose that a value of 2.5 volts were input into the A/D converter in Figure 16-2. Since the output has a resolution in the range 0 to 7, the converter’s output would be either 4 or 5. The non-linear characteristic of the output determines a quantization error that increases as the converter resolution decreases. Converters used in PIC circuits have a resolution of either 8, 10, or 12 bits. In each case the output range, or quantization level, is 0 to 255, 0 to 1023, or 0 to 4095. The voltage resolution of the converter is its maximum voltage range divided by the number of quantization levels. A device with a voltage range of 5 volts and a range of 255 levels has a voltage resolution of: Analog to Digital and Realtime Clocks 545 +5 V o l 2.5 t s 0 1 2 3 4 5 6 7 Binary output Figure 16-2 Converter Quantization Error voltage resolution = 5 = 0.01960 volts = 19.60 mV 255 16.0.2 ADC Implementation The analog-to-digital converter performs accurately only if the input voltage is within the converter’s valid range. This range is usually selected by setting high and low voltage references on converter pins. For example, if +4 volts is input into the converter’s positive reference pin and +2 volts into the negative reference pin, then the converter’s voltage range lies between these values. In many PIC applications the converter range is selected as the system’s supply voltage and ground, that is, +5 and 0 volts. When a different range is externally referenced, there is a general restriction that the range cannot exceed the system’s positive and negative limits (Vdd and Vss). Also, a minimum difference is required between the high and low voltage references. The output of the ADC is a digital representation of the original analog signal. In this context, the term quantization refers to subdividing a range into small but measurable increments. The quantization process can introduce a quantization error, which is similar to a rounding error. The time required for the holding capacitor on the ADC to charge is called the acquisition time. The holding capacitor on the ADC must be given sufficient time to settle to the analog input voltage level before the actual conversion is initiated. Otherwise, the conversion is not accurate. The acquisition time is determined by the impedance of the internal multiplexer and that of the analog source. The exact acquisition time can be determined from the device’s data sheet, although 10K ohms is the maximum recommended source impedance for 8- and 10-bit converters and 2.5K ohms for 12-bit converters. Chapter 16 546 Most analog-to-digital converters in PIC applications, either internal or external, are of the successive approximation type. The successive approximation algorithm performs a conversion on one bit at a time, beginning with the most significant bit and ending with the least significant bit. To determine each bit in the range, the value of the input signal is tested to see if it is in the upper or lower portion of this range. If in the upper portion, the conversion bit is a 1, otherwise it is a 0. The next most significant bit is then tested in the lower half of the remaining range. The process is continued until the least-significant bit has been determined. 16.1 A/D Integrated Circuits Several popular integrated circuits are used to perform as A/D converters, among them the ADC0831, the LTC1298, and the MAX 190 and MAX 191. The variations consist in the resolution and interfacing of the different ICs. Of these, the ADC0831, from National Semiconductor, is an 8-bit resolution, serial interface A/D quite suited to applications for small, mid-range PICs such as the 16F84. The input range of the 0831 is 0 to 5 volts, which matches the TTL voltage levels used in PIC circuits. The 0831 pin diagram is shown in Figure 16-3. ADC0831 PINOUT _CS 1 Vin+ 2 Vin- 3 GND 4 ADC0831 8 Vcc 7 CLK 6 DO 5 Vref _CS Vin+ VinGND Vref DO CLK Vcc - Chip Select (active low) Analog voltage input + Analog voltage input Ground Voltage reference Data out Clock signal +5V power Figure 16-3 ADC0831 Pin Diagram The ADC0831 uses three control lines, labeled DO (data out), CLK (clock), and _CS (chip select) in Figure 16-3. Interfacing the ADC0831 requires three I/O lines. Of these, two can be multiplexed with other functions or with other ADC0831. Actually, only the chip-select (CS) pin requires a dedicated line. This allows for several ADCs to be multiplexed on the CLK and DO lines as long as each one has its own CS connection to the microcontroller. In this case, the controller determines which device is being read by the port to which CS line is connected. The input voltage range of the ADC0831 is determined by the Vref (positive voltage reference line) and Vin- (negative voltage reference line) pins. Vref is used to set the maximum level and Vin- the minimum. Since the ADC0831 has an 8-bit range, the voltage reading that matches the Vref value is read as 255 and the one that matches the Vin- value is read as 0. The minimum difference between the voltage limits is of 1 volt. Analog to Digital and Realtime Clocks 547 Osc 4Mhz R/W +5V RESET R=10K RS 1 2 3 4 5 6 7 8 9 RA4/TOCKI OSC1 MCLR OSC2 16 15 16F84Vdd 14 Vss RB0/INT RB7 RB1 RB6 RB2 RB5 RB3 RB4 LCD 2 rows x 16 17 RA0 RA3 E 18 RA1 RA2 14 +5V 13 12 11 10 RS +5v Pot 1 +5v 5K 1 _CS 2 ADC0831 Vcc Vin+ CLK Vin- DO GND Vref 3 4 E 8 7 R/W 6 5 +5v +5V 1 HD44780 Figure 16-4 ADC0831 Demonstration Circuit 16.1.1 ADC0331 Sample Circuit and Program A simple circuit to illustrate the action of an analog-to-digital converter consists of connecting a potentiometer with the positive voltage reference line, as shown in Figure 16-4. In the circuit the potentiometer was selected so as to produce a voltage range between 0 and +5 volts. Vref was wired to the circuit’s +5 V source and Vin- was wired to ground. The potentiometer variable line was connected to the ADC0831 Vin+ line and the other ADC lines to the corresponding 16F84 Port-B pins. The sample program is named ADF84, and can be found in the book’s online software. The ADF84 program uses the ADC0831 to convert the analog voltage from the potentiometer, in the range +5 to 0 volts, into a digital value in the range 0 to 255. The value read is then displayed on the LCD. The initialization routine defines 548 Chapter 16 Port-B, line 0 as input since this is the one connected to the DO line. The remaining lines in ports A and B are defined as output. ADC0831 processing consists of a single procedure that reads the analog line and returns an 8-bit digital value. The processing required is performed in the following steps: 1. The data return register (named rcvdata) is cleared and the bit counter register is initialized to count 8 bits. 2. The ADC0831 is prepared by bringing the CS line low and pulsing the CLK line. 3. The CLK line is pulsed and one bit is read from the low-order bit (DO line) of Port-B. 4. The bit is shifted into the data return register and the bit counter is decremented. 5. If the bit counter is exhausted, execution ends and the ADC is turned off. Otherwise processing continues at step 3. The following procedure, from the ADF84 program, reads digital data from the ADC0831: ;============================ ; procedure to read and ; convert analog line ;============================ ; ON ENTRY: ; Code assumes that the ADC0831 DO line is initialized for ; input, while CLK and CS lines are output ; From ADC0831 wiring diagram. All lines in Port-B ; DO = RB0 ==> INPUT ; CLK = RB1 <== OUTPUT ; CS = RB2 <== OUTPUT ; ON EXIT: ; Returns 8-bit digital value in the register rcvdata ; ana2dig: ; Clear data register and init counter for 8 bits clrf rcvdata ; Clear register movlw 0x08 ; Initialize counter movwf bitCount ; Prepare to read analog line bcf PORTB,CS ; CS pin low to enable ADC nop ; Delay for 4MHz clock bsf PORTB,CLK ; Set CLK high Nop bcf PORTB,CLK ; Reset CLK to start conversion nop nextB: ; Pulse CLK line to read bit from ADC bsf PORTB,CLK ; CLK high nop bcf PORTB,CLK ; CLK low Nop ; Read analog line and store data, bit by bit Analog to Digital and Realtime Clocks movf movwf rrf rlf 549 PORTB,w ; store1 ; store1,f ; rcvdata,f Read all Port-B bits Store value for later Rotate bit into carry flag ; Rotate carry flag into result ; register decfsz bitCount,f ; Bump counter, skip next ; if counter zero goto nextB ; Value read is stored in rcvdata register bsf PORTB,CLK ; Final clock pulse Nop bcf PORTB,CLK nop bsf PORTB,CS ; Turn off ADC call long_delay ; Time to settle Return 16.2 PIC On-Board A/D Hardware A few years ago, A/D conversions always required the use of devices such as the ones described in the previous sections. Nowadays, many PIC microcontrollers come with onboard A/D hardware. One of the advantages of using onboard A/D converters is saving interface lines. The circuit shown in Figure16-4 requires devoting three lines to the interface between the ADC0831 and the PIC 16F84. On the other hand, a similar circuit can be implemented in a PIC with internal A/C conversion by simply connecting the analog device to the corresponding PIC port. In the PIC world, where I/O lines are often in short supply, this advantage is not insignificant. At the time we are writing, PICs equipped with A/D converters have either 8- or 10-bit resolution and can receive analog input in 2 to 16 different channels. The 16F877 with eight analog input channels at a 10-bit resolution is discussed. Nowadays, these PICs are easy to obtain. On the other hand, if the resolution required exceeds 10-bits then the designer has to resort to an independent A/D IC, such as the LTC1298, which has a 12-bit resolution, or to others with even higher numbers of output bits. 16.2.1 A/D Module on the 16F87x The PICs of the 16F87x family are equipped with an analog-to-digital converter module. The number of lines depends on the specific version of the device: 28-pin devices have five A/D lines and all others have eight lines. The converter uses a sample and hold capacitor to store the analog charge and performs a successive approximation algorithm to produce the digital result. The converter resolution is 10 bits, which are stored in two 8-bit registers. One of the registers has only four significant bits. The A/D module has high- and low-voltage reference inputs that are selected by software. The module can operate while the processor is in SLEEP mode, but only if the A/D clock pulse is derived from its internal RC oscillator. The module contains four registers accessible to the application: Chapter 16 550 • ADRESH - Result High Register • ADRESL - Result Low Register • ADCON0 - Control Register 0 • ADCON1 - Control Register 1 Of these, it is the ADCON0 register that controls most of the operations of the A/C module. Port-A pins RA0 to RA5 and Port-E pins RE0 to RE2 are multiplexed as analog input pins into the A/C module. In the 28-pin versions of the 16F87x, port pins RA0 to RA5 provide the five input channels. In all other implementations of the 16F87X, Port-E pins RE0 to RE2 provide the three additional channels. Figure 16-5 shows the registers associated with A/D module operations. REGISTER NAME INTCON 7 GIE 6 5 4 3 2 1 0 bits PEIE PIR1 ADIF PIE1 ADIE ADRESH A/D Result Register High Byte ADRESL A/D Result Register Low Byte ADCON0 ADSC1 ADSC0 ADCON1 ADFM CHS2 CHS1 CHS0 GO/DONE PCFG3 PCFG2 ADON PCFG1 PCFG0 Figure 16-5 Registers Related to A/C Module Operations The ADCON0 Register The ADCON0 register is located in bank 0, at address 0x1f. Seven of the eight bits are meaningful in A/D control and status operations. Figure 16-6 is a bitmap of the ADCON0 register. In Figure 16-6, bits 7 and 6, labeled ADSC1 and ADSC0, are the selection bits for the A/D conversion clock. The conversion time per bit is defined as TAD in PIC documentation. A/D conversion requires a minimum of 12 TAD in a 10-bit ADC. The source of the A/D conversion clock is software selected. The four possible options for TAD are: 1. Fosc/2 2. Fosc/8 3. Fosc/32 4. Internal A/D module RC oscillator (varies between 2 and 6 µs) Analog to Digital and Realtime Clocks bits: 7 ADSC1 6 ADSC0 5 CHS2 551 4 3 CHS1 CHS0 2 GO/DONE 1 0 ADON bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits 00 = FOSC/2 01 = FOSC/8 10 = FOSC/32 11 = FRC (internal A/D module RC oscillator) bit 5-3 CHS2:CHS0: Analog Channel Select bits 000 = channel 0, (RA0=AN0) 001 = channel 1, (RA1=AN1) 010 = channel 2, (RA2=AN2) 011 = channel 3, (RA3=AN3) 100 = channel 4, (RA5=AN4) 101 = channel 5, (RE0=AN5) | not active 110 = channel 6, (RE1=AN6) | in 28-pin 111 = channel 7, (RE2=AN7) | 16F87x PICS bit 2 GO/DONE: A/D Conversion Status bit If ADON = 1: 1 = A/D conversion in progress (setting this bit starts the A/D conversion) 0 = A/D conversion not in progress (this bit is automatically cleared by hardware when the A/D conversion is complete) bit 1 Unimplemented: Read as '0' bit 0 ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shut-off and consumes no power Figure 16-6 ADCON0 Register Bitmap The conversion time is the analog-to-digital clock period multiplied by the number of bits of resolution in the converter, plus the two to three additional clock periods for settling time, as specified in the data sheet of the specific device. The various sources for the analog-to-digital converter clock represent the main oscillator frequency divided by 2, 8, or 32. The third choice is the use of a dedicated internal RC clock that has a typical period of 2 to 6 µs. Since the conversion time is determined by the system clock, a faster clock results in a faster conversion time. The A/D conversion clock must be selected to ensure a minimum Tad time of 1.6 µs. The formula for converting processor speed (in MHz) into Tad microseconds is as follows: Tad = 1 Tosc Tdiv Chapter 16 552 Where Tad is A/D conversion time, Tosc is the oscillator clock frequency in MHz, and Tdiv is the divisor determined by bits ADSC1 and ADSC0 of the ADCON0 register. For example, in a PIC running at 10MHz if we select the Tosc/8 option (divisor equal 8) the A/D conversion time per bit is calculated as follows: Tad = 1 = 1.6 5 Mhz 8 In this case, the minimum recommended conversion speed of 1.6 µs is achieved. However, in a PIC with an oscillator speed of 10MHz, this option produces a conversion speed of 0.8 µs, less than the recommended minimum. In this case we would have to select the divisor 32 option, giving a conversion speed of 3.2 µs. Table 16.1 A/C Converter Tad at Various Oscillator Speeds OPERATION ADCS1:ADCS0 20MHZ TAD IN MICROSECONDS 10MHZ 5MHZ Fosc/2 00 0.1 0.2 0.4 Fosc/8 01 0.4 0.8 1.6 Fosc/32 10 1.6 3.2 6.4 RC 11 2-6 2-6 2-6 Note: values in bold are within the recommended limits 1.25MHZ 1.6 6.4 25.6 2-6 In Table 16.1, converter speeds of less than 1.6 µs or higher than 10 µs are not recommended. Recall that the Tad speed of the converter is calculated per bit, so the total conversion time in a 10-bit device (such as the 16F87x) is approximately the Tad speed multiplied by 10 bits, plus 3 additional cycles. Therefore, a device operating at a Tad speed of 1.6 µs requires 1.6 µs * 13, or 20.8 µs for the entire conversion. Bits CHS2 to CHS0 in the ADCON0 register (see Figure 16-6) determine which of the analog channels is selected. This is required, since there are several channels for analog input but only one A/2 converter circuitry. So the setting of this bit field determines which of six or eight possible channels is currently read by the A/C converter. An application can change the setting of these bits in order to read several analog inputs in succession. Bit 2 of the ADCON0 register, labeled GO/DONE, is both a control and a status bit. Setting the GO/DONE bit starts A/D conversion. Once conversion has started, the bit indicates if it is still in progress. Code can test the status of the GO/DONE bit in order to determine if conversion has concluded. Bit 0 of the ADCON0 register turns the A/D module on and off. The initialization routine of an A/D-enabled application turns on this bit. Programs that do not use the A/D conversion module leave the bit off to conserve power. The ADCON1 Register The ADCON1 register also plays an important role in programming the A/D module. Bit 7 of the ADCON1 register is used to determine the bit justification of the digital re- Analog to Digital and Realtime Clocks 553 sult. This is possible because the 10-bit result is returned in two 8-bit registers; therefore, the six unused bits can be placed either on the left- or the right-hand side of the 16-bit result. If ADCON1 bit 7 is set then the result is right-justified; otherwise it is left-justified. Figure 16-7 shows the location of the significant bits. ADRESH ADRESL V V V V V V V V V V 0 0 0 0 0 0 Left-justified (ADFM bit = 0) ADRESH ADRESL 0 0 0 0 0 0 V V V V V V V V V V Right-justified (ADFM bit = 1) Legend: V = valid digit 0 = digit always cleared Figure 16-7 Left- and Right-justification of A/D Result One common use of right justification is to reduce the number of significant bits in the conversion result. For example, an application on the 16F877 that uses the A/D conversion module requires only 8-bit accuracy in the result. In this case, code can left-justify the conversion result, read the ADRESH register, and ignore the low-order bits in the ADRESL register. By ignoring the two low-order bits, the 10-bit accuracy of the A/D hardware is reduced to eight bits and the converter performs as an 8-bit accuracy unit. The bit field labeled PCFG3 to PCFG0 in the ADCON1 register determines port configuration as analog or digital and the mapping of the positive and negative voltage reference pins. The number of possible combinations is limited by the four bits allocated to this field, so the programmer and circuit designer must select the option that is most suited to the application when the ideal one is not available. Table 16.2 (in the following page) shows the port configuration options. For example, there is a circuit that calls for two analog inputs, wired to ports RA0 and RA1, with no reference voltages. In Table 16.2 we can find two options that select ports RA0 and RA1 and are analog inputs: these are the ones selected with PCFG bits 0100 and 0101. The first option also selects port RA3 as analog input, even though not required in this case. The second one also selects port RA3 as a positive voltage reference, also not required. Either option works in this case; however, any pin configured for analog input produces incorrect results if used as a digital source. Therefore, a channel configured for analog input cannot be used for non-analog purposes. On the other hand, a Chapter 16 554 Table 16.2 A/D Converter Port Configuration Options PCFG3: An7 PCFG0 Re2 0000 A 0001 A 0010 D 0011 D 0100 D 0101 D 011x D 1000 A 1001 D 1010 D 1011 D 1100 D 1101 D 1110 D 1111 D An6 Re1 A A D D D D D A D D D D D D D An5 Re0 A A D D D D D A A A A D D D D An4 Ra5 A A A A D D D A A A A A D D D An3 Ra3 A Vre+ A Vre+ A Vre+ D Vre+ A Vre+ Vre+ Vre+ Vre+ D Vre+ An2 An1 Ra2 Ra1 A A A A A A A A D A D A D D Vre- A A A A A Vre- A Vre- A Vre- A D D Vre- D An0 Ra0 Vref+ A VDD A RA3 A VDD A RA3 A VDD A RA3 D VDD A RA3 A VDD A RA3 A RA3 A RA3 A RA3 A VDD A RA3 VrefVSS VSS VSS VSS VSS VSS VSS RA2 VSS VSS RA2 RA2 RA2 VSS RA2 CHAN/ Refs 8/0 7/1 5/0 4/1 3/0 2/1 0/0 6/2 6/0 5/1 4/2 3/2 2/2 1/0 1/2 Legend: D = digital input A = analog input CHAN/Refs = analog channels/voltage reference inputs channel configured for digital input should not be used for analog data since extra current is consumed by the hardware. Finally, channels to be used for analog-to-digital conversion must be configured for input in the corresponding TRIS register. SLEEP Mode Operation The A/D module can be made to operate in SLEEP mode. As mentioned previously, SLEEP mode operation requires that the A/D clock source be set to RC by setting both ADCS bits in the ADCON0 register. When the RC clock source is selected, the A/D module waits one instruction cycle before starting the conversion. During this period, the SLEEP instruction is executed, thus eliminating all digital switching noise from the conversion. The completion of the conversion is detected by testing the GO/DONE bit. If a different clock source is selected, then a SLEEP instruction causes the conversion-in-progress to be aborted and the A/D module to be turned off. 16.2.2 A/D Module Sample Circuit and Program The circuit in Figure 16-8 is designed to demonstrate the use of the A/D converter module in PICs of the 16F87x family. Analog to Digital and Realtime Clocks 555 +5v R=10K RESET +5v Pot 1 5K 1 !MCLR/VPP 2 16F877 RB7/PGD RA0/AN0 RG6/PGC RA1/AN1 RB5 RA2/AN2.VREF- RB4 RA3/AN3/VREF+ RB3/PGM 3 4 5 6 RA4/TOCKI RB2 RA5/AN4/SS RB1 7 8 RE0/!RD/AN5 RB0/INT RE1/!WR/AN6 VDD RE2/!CS/AN7 VSS 9 10 +5v 11 VDD RD7/PSP7 VSS RD6/PSP6 OSC1/CLKIN RD5/PSP5 OS2/CLKOUT RD4/PSP4 12 13 14 15 10 MHz Osc RC0/T1OSO/T1CKI RC7/RX/DT RC1/T1OSI/CCP2 RC6/TX/CK 16 17 RC2/CCP1 RC5/SD0 18 RC3/SCK/SCL RC4/SDI/SDA 19 RD0/PSP0 RD3/PSP3 RD1/PSP1 RD2/PSP2 20 40 39 38 37 36 LCD 2 rows x 20 35 34 33 32 14 31 30 29 28 27 26 25 RS 24 23 22 E 21 R/W +5 V 1 HD44780 Figure 16-8 Demonstration Circuit for A/D Conversion Module Comparing Figure 16-8 with Figure 16-4, which uses the ADC0831 IC, we notice the economy of resources that results from selecting a PIC with an onboard A/D module. In the circuit of Figure 16-4 three microcontroller I/O ports must be used to connect the converter IC to the PIC. In the circuit of Figure 16-8, the potentiometer is connected directly to a single PIC port, saving two I/O lines. Considering the number of different PIC architectures that are equipped with onboard A/D converters, the circuit designer should explore this possibility before deciding on using a separate converter IC. At the same time, recall that two of the three input lines used by converter ICs can be shared. In a design with more than one converter IC the use of input lines is not a 3 to 1 ratio. The circuit in Figure 16-8 consists of a 5K potentiometer wired to analog port RA0 of a 16F877 PIC. The LCD display is used to show three digits, in the range 0 to 255, 556 Chapter 16 that represent the relative position of the potentiometer’s disk. The program named A2DinLCD, in the book’s online software, uses the built-in A/D module. Programming the A/D module consists of the following steps: 1. Configure the PIC I/O lines to be used in the conversion. All analog lines are initialized as input in the corresponding TRIS registers. 2. Select the ports to be used in the conversion by setting the PCFGx bits in the ADCON1 register. Selects right- or left-justification. 3. Select the analog channels, select the A/D conversion clock, and enable the A/D module. 4. Wait the acquisition time. 5. Initiate the conversion by setting the GO/DONE bit in the ADCON0 register. 6. Wait for the conversion to complete. 7. Read and store the digital result. The following procedure from the A2DinLCD program initialized the A/D module for the required processing: ;============================ ; init A/D module ;============================ ; 1. Procedure to initialize the A/D module, as follows: ; Configure the PIC I/O lines. Init analog lines as input ; 2. Select ports to be used by setting the PCFGx bits in the ; ADCON1 register. Selects right- or left-justification. ; 3. Select the analog channels, select the A/D conversion ; clock, and enable the A/D module. ; 4. Wait the acquisition time. ; 5. Initiate the conversion by setting the GO/DONE bit in the ; ADCON0 register. ; 6. Wait for the conversion to complete. ; 7. Read and store the digital result. InitA2D: Bank1 ; Select bank for TRISA register movlw b’00000001’ movwf TRISA ; Set Port-A, line 0, as input ; Select the format and A/D port configuration bits in ; the ADCON1 register ; Format is left-justified so that ADRESH bits are the ; most significant ; 0 x x x 1 1 1 0 <== value installed in ADCON1 ; 7 6 5 4 3 2 1 0 <== ADCON1 bits ; | |__|__|__|____ RA0 is analog. ; | Vref+ = Vdd ; | Vref- = Vss ; |_________________________ 0 = left-justified ; ADCON1 is in bank 1 Analog to Digital and Realtime Clocks 557 movlw movwf ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; b’00001110’ ADCON1 ; RA0 is analog. All others digital ; Vref+ = Vdd Select D/A options in ADCON0 register For a 10Mhz clock the Fosc32 option produces a conversion speed of 1/(10/32) = 3.2 microseconds, which is within the recommended range of 1.6 to 10 microseconds. 1 0 0 0 0 0 0 1 <== value installed in ADCON0 7 6 5 4 3 2 1 0 <== ADCON0 bits | | | | | | |____ A/D function select | | | | | | 1 = A/D ON | | | | | |__________ A/D status bit | | |__|__|_____________ Analog Channel Select | | 000 = Chanel 0 (RA0) |__|______________________ A/D Clock Select 10 = Fosc/32 ADCON0 is in bank 0 Bank0 movlw b’10000001’ movwf ADCON0 ; Channel 0, Fosc/32, A/D enabled Delay for selection to complete call delayAD ; Local procedure return Once the module is initialized, the analog line is read by the following procedure: ;============================ ; read A/D line ;============================ ; Procedure to read the value in the A/D line and convert ; to digital ReadA2D: ; Initiate conversion Bank0 ; Bank for ADCON0 register bsf ADCON0,GO ; Set the GO/DONE bit ; GO/DONE bit is cleared automatically when conversion ends convWait: btfsc ADCON0,GO ; Test bit goto convWait ; Wait if not clear ; At this point conversion has concluded ; ADRESH register (bank 0) holds 8 MSBs of result ; ADRESL register (bank 1) holds 4 LSBs. ; In this application value is left-justified. Only the ; MSBs are read movf ADRESH,W ; Digital value to w register return 558 Chapter 16 The delay routine required in this case is coded as follows: ;======================= ; delay procedure ;======================= ; For a 10Mhz clock the Fosc32 option produces a conversion ; speed of 1/(10/32) = 3.2 microseconds. At 3.2 ms per bit ; 13 bits require approximately 41 ms. The instruction time ; at 10Mhz is 10 ms. 4/10 = 0.4 ms per instruction. To delay ; 41 ms a 10Mhz PIC must execute 11 instructions. Add one ; more for safety. delayAD: movlw .12 ; Repeat 12 machine cycles movwf count1 ; Store value in counter repeat11: decfsz count1,f ; Decrement counter goto repeat11 ; Continue if not 0 return 16.3 Realtime Clocks In the context of microcontrollers and embedded systems, realtime clocks (also called RTCs) are integrated circuits designed to keep track of time in conventional hours, that is, in years, days, hours, minutes, and seconds. Many realtime clock ICs are available with various characteristics, data formats, modes of operation, and interfaces. Most of the ones used in PIC circuits have a serial interface in order to save access ports. Most RTC chips provide a battery connection so that time can be kept when the system is turned off. In the sections that follow, we discuss one popular RTC chip: the NJU6355, but this is by no means the only option for embedded systems. 16.3.1 The NJU6355 Realtime Clock The NJU6355 series is a serial I/O realtime clock used in microcontroller-based embedded systems. The IC includes its own quartz crystal oscillator, counter, shift register, voltage regulator, and interface controller. The PIC interface requires four lines. Operating voltage is TTL level so it can be wired directly on the typical PIC circuit. The output data includes year, month, day-of-week, hour, minutes, and seconds. Figure 16-9 is the pin diagram for the NJU6355. NJU6355 output is in packed BCD format, that is, each decimal digit is represented by a 4-bit binary number. The chip’s logic correctly calculates the number of days in each month as well as the leap years. All unused bits are reported as binary 0. Figure 16-10 is a bitmap of the formatted timer data.