Download 2.3.4.2 Working Principle of MOSFET

ABSTRACT
This paper explains the implementation of single phase 7 level inverter with Dc link
Switches based on POD technique .The proposed multi level inverter is capable of generating
7 level output with less component count .This technique uses single carrier wave and two
sine waves for pulse generation .The entire system is designed and implemented using
MATLAB/Simulink .The inverter is connected to a R-Ioad and performance are analyzed
.Hardware is implemented using PIC16F877A micro controller.
Keywords- Electro Magnetic Interference (EMI); Micro controller; Multilevelinverter; POD technique; Pulse width modulation (PWM).
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CHAPTER 1
INTRODUCTION
1.1 Introduction to Inverters
The converters have to be designed to obtain a quality output voltage or a current
waveform with a minimum amount of ripple content. In high power and high voltage
applications the conventional two level inverters, however, have some limitations in
operating at high frequency mainly due to switching losses and constraints of the power
device ratings. Numerous industrial applications have begun to require high power
apparatus in recent years. For the control of electric power or power conditioning the
conversion of electrical power from one form to another is necessary and the switching
characteristics of the power devices permits these conversions. Inverters are the devices
that are used for conversion of DC to AC. The output voltage of an inverter can be fixed
type or variable type at fixed or variable frequency. A variable output voltage can be
obtained by varying the input dc voltage and maintaining the gain of the inverter constant.
On the other hand, if the dc voltage is fixed variable output voltage can be obtained by
varying the gain of the inverter. Inverter gain is defined as the ratio of ac output voltage to
dc input voltage. In the conventional two level inverters the input DC is converted into the
AC supply of desired frequency and voltage with the aid of semiconductor power
switches. Depending on the configuration, four or six switches are used. A group of
switches provide the positive half cycle at the output which is called as positive group
switches and the other group which supplies the negative half cycle is called negative
group.
Inverters can be broadly classified into two types. They areVoltage Source Inverter (VSI)
Current Source Inverter (CSI)
1.1.1 Voltage Source Inverter
When the DC voltage remains constant, then it is called voltage inverter (VSI) or voltage fed
inverter (VFI). When input current is maintained constant, then it is called current source
inverter (CSI) or current fed inverter (CFI). Sometimes, the DC input voltage to the inverter
is controlled to adjust the output. Such inverters are called variable DC link inverters. The
inverters can have single phase or three-phase output.
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A voltage source inverter is fed by a stiff dc voltage, whereas a current source inverter is fed
by a stiff current source.

A voltage source can be converted to a current source by connecting a series
inductance and then varying the voltage to obtain the desired current.

A VSI can also be operated in current-controlled mode, and similarly a CSI can also
be operated in the voltage control mode.

The inverters are used in variable frequency ac motor drives, uninterrupted power
supplies, induction heating, static VAR compensators, etc.
The following sections give us the comparative study between VSI and CSI
Figure 1-1: Voltage source inverter
VSI is fed from a DC voltage source having small or negligible impedance.

Input voltage is maintained constant.

Output voltage does not dependent on the load.

The waveform of the load current as well as its magnitude depends upon the nature of
load impedance.

VSI requires feedback diodes.

The commutation circuit is complicated.
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1.1.2 Current Source Inverters
Figure 1-2: Current source inverter

CSI is fed with adjustable current from a DC voltage source of high impedance.

The input current is constant but adjustable.

The amplitude of output current is independent of the load.

The magnitude of output voltage and its waveform depends upon the nature of the
load impedance.

The CSI does not require any feedback diodes.

Commutation circuit is simple as it contains only capacitors.
1.2 Limitations of conventional inverters:

The classical two level inverter produces output with level either 0 or +Vdc or
-Vdc

They cannot be used in high power and high voltage applications because of
higher frequency and there will switching losses.

The output voltage waveform of ideal inverter should be sinusoidal but the
waveform of conventional inverters is non-sinusoidal and contains certain
harmonics.

Large capacitor will be connected across the DC voltage source which is costly
and requires more space.
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
Power BJT, Power MOSFET, IGBT and GTO with self-commutation can be used
in the circuit.
In order to overcome these drawbacks multilevel inverters are introduced.
1.3 Multilevel Inverters
1.3.1 Introduction
Multilevel inverters have attracted much attention in high power electronics applications
as the solution of needs for higher power ratings and the reduction of the output harmonic
distortion, voltage stress (dv/dt) and EMI phenomenon. Multilevel began with the 3-level
converter, then several multilevel converter topologies has been developed. Multi-level
inverters provide more than 2 voltage levels. The basic principle of a multilevel inverter is
to connect semiconductor switches in series so that the converter can operate with power
ratings of several megavolt amperes and at medium voltage levels (1kv to 35kv) that
exceed the individual switch voltage ratings. The output voltage waveform will be
synthesized from several levels of capacitor voltage sources. As the number of levels
increases, the obtained output waveform approaches the sinusoidal wave with less
distortion, less switching frequency, higher efficiency etc.
1.3.2 Basic Principle of Operation
Fig 1.1 shows the schematic of a pole in a multilevel inverter where Vo indicates an output
phase voltage where any voltage level can be obtained depending on the selection of node
voltage V1, V2, etc, hence this pole can be referred as single pole multiple throw switch.
Series connected capacitor acts as the energy tank for the inverter, providing some nodes
to which the multilevel inverter can be connected by connecting the switch to one node at
a time, one can obtain the desired output.
Fig 1.3 Schematic Of Single Pole Of Multilevel Inverter By A Switch
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For an m-level inverter needs (m-1) capacitors.
The most attractive features of multilevel inverters are as follows.





They can generate output voltages with extremely low distortion and lower dv/dt. 

They draw input current with very low distortion. 

With a lower switching frequency they can be operated. 

A multilevel inverter can eliminate the need for the step-up transformer and reduce
the harmonics produced by the inverter. 

With additional voltage levels, the voltage waveform has more free-switching 
angles, which can be preselected for harmonics elimination.
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CHAPTER 2
MULTILEVEL INVERTERS
The Inverter is an electrical device which converts direct current (DC) to alternate current
(AC). The inverter is used for emergency backup power in a home. The inverter is used in
some aircraft systems to convert a portion of the aircraft DC power to AC. The AC power is
used mainly for electrical devices like lights, radar, radio, motor, and other devices.
Now a day’s many industrial applications have begun to require high power. Some appliances
in the industries however require medium or low power for their operation. Using a high
power source for all industrial loads may prove beneficial to some motors requiring high
power, while it may damage the other loads. Some medium voltage motor drives and utility
applications require medium voltage. The multi-level inverter has been introduced since 1975
as alternative in high power and medium voltage situations. The Multi-level inverter is like an
inverter and it is used for industrial applications as alternative in high power and medium
voltage situations. Multi-level inverters are the modification of basic bridge inverters. They
are normally connected in series to form stacks of level.
Figure 2-1: Typical Inverter Display panel
The topological structure of multilevel inverter must cope with the following points
It should have less switching devices as far as possible.

It should be capable of enduring very high input voltage such as HVDC transmission
for high power applications.
Each switching device should have lower switching frequency owing to multilevel

approach.
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2.1 Comparison and advantage of Multilevel Inverters
Table 2-1: Comparison between Conventional Inverters and Multilevel Inverters
2.1.1 Advantages of Multilevel Inverter:
The multilevel converter has a several advantages such as
Common Mode Voltage:
The multilevel inverters produce common mode voltage, reducing the stress of the motor and
don’t damage the motor.

Input Current:
Multilevel inverters can draw input current with low distortion.

Switching Frequency:
The multilevel inverter can operate at both fundamental switching frequencies that are higher
switching frequency and lower switching frequency. It should be noted that the lower
switching frequency means lower switching loss and higher efficiency is achieved.
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
Reduced harmonic distortion:
Selective harmonic elimination technique along with the multi-level topology results the total
harmonic distortion becomes low in the output waveform without using any filter circuit.
2.2 Types of Multilevel Inverters
Figure 2.2 Types of multilevel inverters
Multilevel inverters are classified on the basis of the circuit structure and are of three types
2.2.1 Diode-clamped Multilevel Inverter
The main concept of this inverter is to use diodes and provides the multiple voltage levels
through the different phases to the capacitor banks which are in series. A diode transfers a
limited amount of voltage, thereby reducing the stress on other electrical devices. The
maximum output voltage is half of the input DC voltage. It is the main drawback of the diode
clamped multilevel inverter. This problem can be solved by increasing the switches, diodes,
capacitors.
Due to the capacitor balancing issues, these are limited to the three levels. This type of
inverters provides the high efficiency because the fundamental frequency used for all the
switching devices and it is a simple method of the back to back power transfer systems.
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Figure 2-3: Topology of the diode-clamped inverter (a) three-level inverter, (b) Five -level
inverter
Table 2-2: Switching sequence for 5 level Diode Clamped Inverter
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 Applications of Diode Clamped Multilevel Inverter:

Static VAR compensation

Variable speed motor drives

High voltage system interconnections

High voltage DC and AC transmission lines
 Advantages

When the number of levels is high enough, harmonic content will be low enough to
avoid the need for filters.

Efficiency is high due to all devices which are being switched at the fundamental
frequency.

We are able to control the reactive power flow.

The control method is easy for a back to back intertie system.
 Disadvantages

Excessive clamping diodes are being required when the number of levels get high.

It is hard to do a real power flow control for individual converter.
2.2.2 Flying Capacitor Multilevel Inverter
Figure 2-4: Topology of the Flying Capacitor Multilevel inverter (a) three-level inverter,
(b) Five -level inverter
The main concept of this inverter is to use capacitors. It is of series connection of capacitor
clamped switching cells. The capacitors transfer the limited amount of voltage to electrical
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devices. In this inverter switching states are like in the diode clamped inverter. Clamping
diodes are not required in this type of multilevel inverters. The output is half of the input DC
voltage. It is drawback of the flying capacitors multi-level inverter. It also has the switching
redundancy within phase to balance the flaying capacitors. It can control both the active and
reactive power flow. But due to the high frequency switching, switching losses will takes
place.
 Applications of Flying Capacitors Multilevel Inverter:

Induction motor control using DTC (Direct Torque Control) circuit.

Static VAR generation.

Both AC-DC and DC-AC conversion applications.

Converters with Harmonic distortion capability.

Sinusoidal current rectifiers.
 Advantages:

Huge amount of storage capacitors will provide additional ride through capabilities
during power rage.

Switch combination redundancy are provided for balancing different voltage levels.

When the number of levels is high enough, the harmonic content will be low enough
not to use the filter.

We are able to control both the real and reactive power flow, and making a possible
voltage source converter candidate for high voltage dc transmission.
 Disadvantages:

When the number of converter levels get high, a huge amount of storage capacitor is
required. Those high level systems are more difficult to

package and those bulky capacitors are expensive. The switching frequency and
switching losses will soar high for real power transmission and the converter control
will get very complicated.
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Table 2-3: Switching sequence for 5 level Inverter
2.2.3 Cascaded Multilevel Inverter
A cascade multilevel inverter is a power electronic device built to synthesize adesired AC
voltage from several levels of DC voltages. Such inverters have been the subject of research
in the last several years, where the DC levels were considered to be identical in that all of
them were either batteries, solar cells, etc. A multilevel converter was presented in which the
two separate DC sources were the secondary of two transformers coupled to the utility AC
power. In contrast, in this paper, only one source is used without the use of transformers. The
interest here is interfacing a single DC power source with a cascade multilevel inverter here
the other DC sources are capacitors. Currently, each phase of a cascade multilevel inverter
requires ‘n’ DC sources for 2n+1 levels in applications that involve real power transfer.
Figure 2-5: Cascade MLIS a) Inverter Single Stage b) 5 level Cascaded Inverter c) 7 level
Cascaded Inverter
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 Applications of Cascaded Multilevel Inverter:

Motor drives

Active filters

Electric vehicle drives

DC power source utilization

Power factor compensators

Back to back frequency link systems

Interfacing with renewable energy resources.
 Advantages:

The modularized structure allows easy packaging and storage.

The quantity of possible voltage levels is more than DC and FC type.
 Disadvantages:

Separated DC sources or capacitor are required for each module.

A more complex controller is required due to the amount of capacitors, which need
to be balanced.
2.2.4 Comparison of Multilevel Topologies
Table 2-4: Comparison of multilevel inverter Topologies
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The diode clamped inverters particularly the three-level structure have a wide popularity in
motor drive applications besides other multilevel inverter topologies. However, it would be a
limitation of complexity and number of clamping diodes for the DCMLIs, as the level
exceeds. The FCMLIs are based on balancing capacitors on phase buses and generate
multilevel output voltage waveform clamped by capacitors instead of diodes. The FCMLI
topology also requires balancing capacitors per phase at a number of (m-1)*(m-2)/2 for an
m-level inverter and it will cause to increase the number of required capacitor in high
level inverter topologies and complexity of considering DC-link balancing. Nowadays, the
multilevel inverters have become more attractive for researchers and manufacturers due to
their advantages over conventional three-level pulse width-modulated (PWM) inverters.
They offer improved output waveforms, smaller filter size, low EMI, lower total harmonic
distortion (THD). Multilevel inverter topology has the least components for a given number
of levels. Cascaded H-Bridge-MLI topology is based on the series connection of H-bridges
with separate DC sources. Since the output terminals of the H-bridges are connected in series,
the DC sources must be isolated from each other. The need of several sources on the DC side
of the inverter makes multilevel technology attractive for photovoltaic applications.
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2.3 Functional Block Diagram
Cascaded Seven Level Multilevel Inverter consists of a dc source which is used to supply
power to each H-bridge inverter. The control unit provides the modulations that are used to
control the various switching sequences of various switches in the inverter. The load used can
be either R-L or AC drives.
Fig 2.6 Functional Block Diagram
2.3.1 SOURCES
The DC power source (Vdc) can be a photovoltaic system, fuel cell, battery or rectifier
circuits. The different fuel cells are- Hydrogen-oxygen fuel cell, lithium ion source.
There are many limitations in extracting power from renewable energy resources. To
minimize the power demand and scarcity we have to improve the power extracting methods.
Multilevel inverter is used to extract power from solar cells. It synthesizes the desired ac
Output Waveform From Several Dc Sources.
2.3.1.1 Solar Panel
This is the heart of the circuit. Solar panels are made up of photo voltaic cells.
A solar cell, or photovoltaic cell (previously termed "solar battery"), is an electrical device
that converts the energy of light directly into electricity by the photovoltaic effect, which is
a physical and chemical phenomenon. It is a form of photoelectric cell, defined as a device
whose electrical characteristics, such as current, voltage, or resistance, vary when exposed to
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light. Solar cells are the building blocks of photovoltaic modules, otherwise known as solar
panels.
Solar cells are described as being photovoltaic, irrespective of whether the source
is sunlight or an artificial light. They are used as photo detector (for example infrared
detectors), detecting light or other electromagnetic radiation near the visible range, or
measuring light intensity.
The operation of a photovoltaic (PV) cell requires three basic attributes:

The absorption of light, generating either electron-hole pairs or excitons.

The separation of charge carriers of opposite types.

The separate extraction of those carriers to an external circuit.
In contrast, a solar thermal collector supplies heat by absorbing sunlight, for the
purpose of either direct heating or indirect electrical power generation from heat. A "photo
electrolytic cell" (photo electrochemical cell), on the other hand, refers either to a type of
photovoltaic cell (like that developed by Edmond Becquerel and modern dye-sensitized solar
cells), or to a device that splits water directly into hydrogen and oxygen using only solar
illumination.
2.3.2.2 Applications
From a solar cell to a PV system. Diagram of the possible components of a system.
Assemblies of solar cells are used to make solar modules that generate electrical power
from sunlight, as distinguished from a "solar thermal module" or "solar hot water panel". A
solar array generates solar power using solar energy.
 Cells, modules, panels and systems
Multiple solar cells in an integrated group, all oriented in one plane, constitute a solar
photovoltaic panel or solar photovoltaic module.
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Photovoltaic modules often have a sheet of glass on the sun-facing side, allowing light
to pass while protecting the semiconductor wafers. Solar cells are usually connected in series
and parallel circuits or series in modules, creating an additive voltage. Connecting cells in
parallel yields a higher current; however, problems such as shadow effects can shut down the
weaker (less illuminated) parallel string (a number of series connected cells) causing
substantial power loss and possible damage because of the reverse bias applied to the
shadowed cells by their illuminated partners. Strings of series cells are usually handled
independently and not connected in parallel, though as of 2014, individual power boxes are
often supplied for each module, and are connected in parallel. Although modules can be
interconnected to create an array with the desired peak DC voltage and loading current
capacity, using independent MPPTs (maximum power point trackers maximum power point
trackers) is preferable. Otherwise, shunt diodes can reduce shadowing power loss in arrays
with series/parallel connected cells.
 Space applications
Solar cells were first used in a prominent application when they were proposed and
flown on the Vanguard satellite in 1958, as an alternative power source to the primary
battery power source. By adding cells to the outside of the body, the mission time could be
extended with no major changes to the spacecraft or its power systems. In 1959 the United
States launched Explorer 6, featuring large wing-shaped solar arrays, which became a
common feature in satellites. These arrays consisted of 9600 Hoffman solar cells.
By the 1960s, solar cells were (and still are) the main power source for most Earth
orbiting satellites and a number of probes into the solar system, since they offered the
best power-to-weight ratio. However, this success was possible because in the space
application, power system costs could be high, because space users had few other power
options, and were willing to pay for the best possible cells. The space power market drove the
development of higher efficiencies in solar cells up until the National Science
Foundation "Research Applied to National Needs" program began to push development of
solar cells for terrestrial applications.
In the early 1990s the technology used for space solar cells diverged from the silicon
technology used for terrestrial panels, with the spacecraft application shifting to gallium
arsenide-based III-V semiconductor materials, which then evolved into the modern IIIV multi junction photovoltaic cell used on spacecraft.
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 Research and industrial production
Research into solar power for terrestrial applications became prominent with the U.S.
National Science Foundation's Advanced Solar Energy Research and Development Division
within the "Research Applied to National Needs" program, which ran from 1969 to 1977,and
funded research on developing solar power for ground electrical power systems. A 1973
conference, the "Cherry Hill Conerence", set forth the technology goals required to achieve
this goal and outlined an ambitious project for achieving them, kicking off an applied
research program that would be ongoing for several decades. The program was eventually
taken over by the Energy Research and Development Administration (ERDA), which was
later merged into the U.S. Department of Energy.
EFFICIENCY:-
Solar cell efficiency may be broken down into reflectance efficiency, thermodynamic
efficiency, charge carrier separation efficiency and conductive efficiency. The overall
efficiency is the product of these individual metrics.
A solar cell has a voltage dependent efficiency curve, temperature coefficients, and
allowable shadow angles.
Due to the difficulty in measuring these parameters directly, other parameters are
substituted: thermodynamic efficiency, quantum efficiency, integrated quantum efficiency,
VOC ratio, and fill factor. Reflectance losses are a portion of quantum efficiency under
"external quantum efficiency". Recombination losses make up another portion of quantum
efficiency, VOC ratio, and fill factor. Resistive losses are predominantly categorized under fill
factor, but also make up minor portions of quantum efficiency, VOC ratio.
The fill factor is the ratio of the actual maximum obtainable power to the product of
the open circuit voltage and short circuit current. This is a key parameter in evaluating
performance. In 2009, typical commercial solar cells had a fill factor > 0.70. Grade B cells
were usually between 0.4 and 0.7. Cells with a high fill factor have a low equivalent series
resistance and a high equivalent shunt resistance, so less of the current produced by the cell is
dissipated in internal losses.
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2.3.1.3 Materials
Solar cells are typically named after the semiconducting material they are made of.
These materials must have certain characteristics in order to absorb sunlight. Some cells are
designed to handle sunlight that reaches the Earth's surface, while others are optimized
for use in space. Solar cells can be made of only one single layer of light-absorbing material
(single-junction) or use multiple physical configurations (multi-junctions) to take advantage
of various absorption and charge separation mechanisms.
 Crystalline silicon
By far, the most prevalent bulk material for solar cells is crystalline silicon (c-Si), also
known as "solar grade silicon". Bulk silicon is separated into multiple categories according to
crystallinity and crystal size in the resulting ingot, ribbon or wafer. These cells are entirely
based around the concept of a p-n junction. Solar cells made of c-Si are made
from wafers between 160 and 240 micrometers thick.
 Monocrystalline silicon
Monocrystalline silicon (mono-Si) solar cells are more efficient and more expensive
than most other types of cells. The corners of the cells look clipped, like an octagon, because
the wafer material is cut from cylindrical ingots, that are typically grown by the Czochralski
process. Solar panels using mono-Si cells display a distinctive pattern of small white
diamonds.
 Epitaxial silicon
Epitaxial wafers can be grown on a monocrystalline silicon "seed" wafer by
atmospheric-pressure CVD in a high-throughput inline process, and then detached as selfsupporting wafers of some standard thickness (e.g., 250 µm) that can be manipulated by
hand, and directly substituted for wafer cells cut from monocrystalline silicon ingots. Solar
cells made with this technique can have efficiencies approaching those of wafer-cut cells, but
at appreciably lower cost.
 Polycrystalline silicon
Polycrystalline silicon, or multicrystalline silicon (multi-Si) cells are made from cast
square ingots large blocks of molten silicon carefully cooled and solidified. They consist of
small crystals giving the material its typical metal flake effect. Polysilicon cells are the most
common type used in photovoltaic’s and are less expensive, but also less efficient, than those
made from monocrystalline silicon.
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 Ribbon silicon
Ribbon silicon is a type of polycrystalline silicon it is formed by drawing flat thin
films from molten silicon and results in a polycrystalline structure. These cells are cheaper to
make than multi-Si, due to a great reduction in silicon waste, as this approach does not
require sawing from ingots. However, they are also less efficient.
2.3.2 Cascaded Multi-level Inverter
Each single DC sources is associated with a single H-bridge converter & AC terminal
voltages of different level converters are connected in series & can generate three different
voltage outputs ,+Vdc, -Vdc and zero. The AC outputs voltage waveform is the sum of the
individual converter outputs. Cascaded multilevel inverter is having an unique and attractive
topology such as simplicity in structure, usage of less number of components etc. their main
advantage is that they can generate output voltages with extremely low distortion and lower
voltage stress (dv/dt). They can operate with a lower switching frequency. Cascaded
Multilevel Inverter consist of series of H-bridge (Full Bridge) Inverter units. Each bridge will
be fed from a separate DC source which may be obtained from batteries, fuel cells, or solar
cells.
2.3.3 Load
Load can be an AC drive, R-L load etc…..cascaded multilevel inverter effectively eliminates
low frequency input current harmonics at the primary side of the transformer and operates
without problems in regenerative mode. Novel dc voltage detection technique, referred to as
Single Multiple- Voltage (SMV) detector, is developed to obtain dc capacitor voltages in the
Cascaded H-bridge (CHB) multilevel inverter- based Static Synchronous Compensator
(STATCOM). Electric Vehicle (EV) and Hybrid EV (HEV) applications implemented
without the use of inductors. The loads which we are using is resistive load
2.3.4 Control unit
The main aim of the modulation strategy of multilevel inverters is to synthesize the output
voltage as close as possible to the sinusoidal waveform. Output voltage from an inverter can
also be adjusted by exercising a control within the inverter itself. The most efficient method
of doing this is by pulse width modulation control used within an inverter. In this method, a
fixed dc input voltage is given to the inverter and a controlled ac output voltage is obtained
by adjusting the ON and OFF periods of the inverter components. This is the most popular
method of controlling the output voltage and this method is termed as PulseWidth
Modulation (PWM) Control. A very popular method in industrial applications is the classic
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carrier-based Sinusoidal PWM (SPWM). A new modulation technique called Phase
Opposition Disposition PWM (POD) is also executed in this project.
2.3.4.1 MOSFET:
MOSFET stands for metal oxide semiconductor field effect transistor. It is capable of voltage
gain and signal power gain. The MOSFET is the core of integrated circuit designed as
thousands of these can be fabricated in a single chip because of its very small size. Every
modern electronic system consists of VLST technology and without MOSFET, large scale
integration is impossible. It is a four terminals device. The drain and source terminals are
connected to the heavily doped regions. The gate terminal is connected top on the oxide layer
and the substrate or body terminal is connected to the intrinsic semiconductor.
MOSFET has four terminals which is already stated above, they are gate, source drain and
substrate or body. MOS capacity present in the device is the main part. The conduction and
valance bands are position relative to the Fermi level at the surface is a function of MOS
capacitor voltage. The metal of the gate terminal and the sc acts the parallel and the oxide
layer acts as insulator of the state MOS capacitor. Between the drain and source terminal
inversion layer is formed and due to the flow of carriers in it, the current flows in MOSFET
the inversion layer is properties are controlled by gate voltage. Thus it is a voltage controlled
device. Two basic types of MOSFET are n channel and p channel MOSFETs. In n channel
MOSFET is current is due to the flow of electrons in inversion layer and in p channel current
is due to the flow of holes. Another type of characteristics of clarification can be made of
those are enhancement type and depletion type MOSFETs. In enhancement mode, these are
normally off and turned on by applying gate voltage. The opposite phenomenon happens in
depletion type MOSFETs.
2.3.4.2 Working Principle of MOSFET
The working principle of MOSFET depends up on the MOS capacitor. The MOS capacitor is
the main part. The semiconductor surface at below the oxide layer and between the drain and
source terminal can be inverted from p-type to n-type by applying a positive or negative gate
voltages respectively. When we apply positive gate voltage the holes present beneath the
oxide layer experience repulsive force and the holes are pushed downward with the substrate.
The depletion region is populated by the bound negative charges, which are associated with
the acceptor atoms. The positive voltage also attracts electrons from the n+ source and drain
regions in to the channel. The electron reach channel is formed. Now, if a voltage is applied
between the source and the drain, current flows freely between the source and drain gate
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voltage controls the electrons concentration the channel. Instead of positive if apply negative
voltage a hole channel will be formed beneath the oxide layer.
2.3.4.3 P-Channel MOSFET
MOSFET which has p - channel region between source any gate is known as p - channel
MOSFET. It is a four terminal devices, the terminals are gate, drain, source and substrate or
body. The drain and source are heavily doped p+ region and the substrate is in n-type. The
current flows due to the flow of positively charged holes that’s why it is known as p-channel
MOSFET. When we apply negative gate voltage, the electrons present beneath the oxide
layer, experiences repulsive force and they are pushed downward in to the substrate, the
depletion region is populated by the bound positive charges which are associated with the
donor atoms. The negative gate voltage also attracts holes from p+ source and drain region in
to the channel region. Thus hole which channel is formed now if a voltage between the source
and the drain is applied current flows. The gate voltage controls the hole concentration of the
channel. The diagram of p- channel enhancement and depletion MOSFET are given below.
Figure 2.7 P-Channel MOSFET
2.3.4.4 N-Channel MOSFET
MOSFET having n-channel region between source and drain is known as n-channel
MOSFET. It is a four terminal device; the terminals are gate, drain and source and substrate
or body. The drain and source are heavily doped n+ region and the substrate is p-type. The
23
current flows due to flow of the negatively charged electrons, that’s why it is known as nchannel MOSFET. When we apply the positive gate voltage the holes present beneath the
oxide layer experiences repulsive force and the holes are pushed downwards in to the bound
negative charges which are associated with the acceptor atoms. The positive gate voltage also
attracts electrons from n+ source and drain region in to the channel thus an electron reach
channel is formed, now if a voltage is applied between the source and drain. The gate voltage
controls the electron concentration in the channel n-channel MOSFET is preferred over pchannel MOSFET as the mobility of electrons are higher than holes. The diagrams of
enhancements mode and depletion mode are given below.
Fig 2.8 N-Channel MOSFET
2.3.4.5 MOSFET SWITCHES
MOSFET switches are used to combine the different DC sources into the required level of
magnitude for the output AC voltage. When the first switch conducts a voltage of Vdc s
obtained .When the second switch conducts a voltage level of 2vdc is obtained and so on. The
multilevel is of seven levels; hence three MOSFET switches are required .These switches
give a combined result, i.e. a seven level inverted wave form. The wave form obtained is an
unsymmetrical one. This is because of the arrangement of DC sources between the switches.
The three MOSFETs act as switch which determines the various levels of Cascaded
Multilevel Inverter.
24
Fig 2.9 MOSFET Switches Which Determines The Various Levels
25
CHAPTER 3
MULTILEVEL INVERTER PWM SCHEMS
3.1.3.1 Carrier based PWM schemes:
The carrier-based modulation schemes for multilevel inverters can be generally classified into
two categories: phase-shifted PWM and level-shifted PWM. Both modulation schemes can
be applied to the CHB inverters.
Figure 5-1: Level-shifted PWM for a Seven-level CHB inverter (mf = 15, ma = 0.8, fm = 50
Hz and fcr = 900 Hz)
3.1.3.2 Level Shifted Sine PWM scheme
For carriers signals, the time values of each carrier waves are set to [0
1/600 1/300] while the outputs values are set according to the disposition of
Carrier waves.
After comparing, the output signals of comparator are transmitted to the
26
IGBT. It requires (m-1) triangular carriers, all having the same frequency and
amplitude. The frequency modulation index is given by mf = fcr/fm. The
Switching frequency of the inverter using the level-shifted modulation is equal
to the carrier frequency, that is, (device switching frequency) fC = fcr. Average
device switching frequency is device switching frequency) fC = fcr/ (m – 1).The
conduction time of the devices is not evenly distributed either.
Where, 𝑉𝑚 ̂ is the peak amplitude of the modulating wave 𝑉𝑚 ̂ and 𝑉 ̂cr is the peak
amplitude of each carrier wave.
3.1.3.3 Types of Level Shifted Sine PWM:
3.1.3.3.1 In Phase Disposition IPD:
In-Phase Disposition (IPD), where all carriers are in phase.
Figure 5-2: Switching pattern produced using the IPD carrier-based PWM scheme: (a) Two
triangles and the modulation signal (b) S1RY (c) S2RY (d) S1RN (e) S2RN
27

All the carrier signals are in phase.
3.1.3.3.2 Alternative Phase opposite Disposition APOD:
Alternative Phase Opposite Disposition (APOD), where all carriers are alternatively in
opposite disposition.
Figure 5-3: Simulation of carrier-based PWM scheme using APOD for a five level inverter.
(a) Modulation signal and carrier waveforms
(b) Phase “R” output voltage
All the carriers above zero reference are in phase but are in opposition with those below zero
reference.
3.1.3.3.3 Phase Opposite Disposition POD:
Phase Opposite Disposition (POD), where all carriers above the zero reference are in phase
but in opposition with those below the zero reference.
28
Figure 5-4: Simulation of carrier-based PWM scheme using POD.
(a) Modulation signal and phase carrier waveforms
(b) Phase “R” output voltage.
The modulating signal of each phase is displaced from each other by 120°. All the carrier
signals have same frequency FC and amplitude AC while the modulating signal has a
frequency of fm and amplitude of Am. The fc should be in integer the multiples of fm with
three-times. This is required for all the modulating signal of all the three phases see the same
carriers, as they are 120° apart. The carrier waves and the modulating signals are compared
and the output of the comparator defines the output in the positive half cycle the comparator
output will have the value high, if the amplitude of the modulating Figure 5-4: Simulation of
carrier-based PWM scheme using POD.
(a) Modulation signal and phase carrier waveforms
(b) Phase “R” output voltage.
signal is greater than that of the carrier wave and zero otherwise. Similarly for the negative
half cycle, if the modulating signal is lower than the carrier wave the output of the
comparator is high and zero otherwise.
29
3.1.3.3.4 Phase Shifted Sine PWM scheme:
Figure 5-5: Phase-shifted PWM for seven-level CHB inverters (mf = 3, ma = 0.8, fm = 50
Hz, and fcr = 180 Hz).
In Phase Shifted Sine PWM all the triangular carriers have the same frequency and same
peak-peak amplitude .but there is a phase shift between any two adjacent carrier waves. For
m Voltage levels (m-1) carrier signals are required and they are phase shifted with an angle of
θ= (360°/m-1). The gate signals are generated with proper comparison of carrier wave and
modulating signal. In general, a multilevel inverter with m voltage levels requires (m – 1)
triangular carriers In the phase-shifted multicarrier modulation, all the triangular carriers have
the same frequency and the same peak-to-peak amplitude, but there is a phase shift between
any two adjacent carrier waves, given by PhCR = 360°/(m – 1).
30
CHAPTER 4
A NEW 7-LEVEL CASCADE MULTILEVEL INVERTER WITH
MINIMUM NUMBER OF SWITCHES
Multilevel voltage source inverter is recognized as an important alternative to the normal two
level Voltage Source Inverter especially in high voltage application. Using multilevel
technique, the amplitude of the voltage is increased, stress in the switching devices is
reduced and the overall harmonics profile is improved. Among the familiar topologies, the
most popular one is cascaded multilevel inverter. It exhibits several attractive features such
as simple circuit layout, less components counts, modular in structure and avoid unbalance
capacitor voltage problem. However as the number of output level increases, the circuit
becomes bulky due to the increase in the number of power devices. In this project, it is
proposed to employ a new technique to obtain a multilevel output using less number of
power semiconductor switches when compared to ordinary cascaded multilevel Cascaded
Multilevel Inverter consist of series of H-bridge (Full Bridge) Inverter units. Each bridge will
be fed from a separate DC source which may be obtained from batteries, fuel cells, or solar
cells. The function of this multilevel inverter is to produce a desired voltage from several
Separate Dc Sources (SDCSs).The ac terminal voltages of different level inverters are
connected in series. This inverter does not require voltage clamping diodes or voltagebalancing capacitors unlike in the diode-clamp or flying capacitors inverter hence inverter
has more advantages than other two types.
In case of the N-Level NPC type multi-level inverter, N-l triangular carrier signals with the
same frequency and amplitude are used so that they fully occupy contiguous bands over the
range +VDC to -VDC. A single sinusoidal reference is compared with each carrier signal to
determine the output voltage for the inverter. Three dispositions of the carrier signal to
generate the PWM signal are considered as follows;
1) Phase disposition (PD); where all carriers are in phase.
2) Alternative phase opposition disposition (APOD); where each carrier is phase shifted by
180 degree from its adjacent carrier.
3) 3) Phase opposition disposition (POD); where the carriers above zero voltage are 180
degree out of phase with those below zero voltage.
31
Figure 4.1: Conventional cascaded n-level MLI.
Fig 4.1 consist of series of H-bridge (Full Bridge) Inverter units. Each bridge will be fed from
a separate DC source which may be obtained from batteries, fuel cells, or solar cells. Each
bridge produces an output voltage +Vdc, 0, -Vdc. Figure 4.2 shows a seven level
conventional cascaded multilevel inverter. The major drawbacks of conventional cascaded
inverter is that

As level increases the number of switches also increases as a result there is large
amount of power loss in the system

The inverter is very bulky and cost of production is very high.

Designing part is also very difficult
In order to tackle the above said drawbacks a new cascaded multilevel inverter is
implemented. The main advantage of proposed topology is less number of switches
compared with conventional multilevel inverter.
32
Figure 4.2:7-level 9-switchtopology
4.1 Conventional Topology:
Using 3 DC voltage sources, 3 H-bridge units each with 4 switches together forming 12
switches
in
total
are
used
in
conventional
CMLI
which
is
representedinFigure1.Generalexpressionforoutputvoltage levels, 𝑚 = (𝑛 + 2)/2 where 𝑛 is the
number of switches in theconfiguration.EachBridgeisoutputting3Levels,+Vdc, 0, −Vdc.
Cascading 3 Bridges in such a fashion to produce stepped7levelstaircasewaveforms
4.2 Existing Topology:
(a) 7-Level, 9 Switches. This topology which is shown in Figure2 is built with 3 dc sources,
1 H-bridge composed of 4 switches and then additional 5 more switches for producing
stepped 7 levels, for positive and negative half cycles.
(b) Table 4.1 represents the switching scheme for this topology.
Table 4.1: Switching scheme for 7-level 9-switch topology.
33
Number of Level (m) = 2n+1
Number of Main Switches (n switch) = ((m-1)/2) + 4
Where m‘is the number of output voltage level, n‘number DC source switches. Figure.4.2
shows the general circuit diagram of proposed multilevel inverter. If number levels
increases add one switch for each level, simple control circuitry. The Unique modulation
strategies are applicable for this topology. The numbers of switches are required for each
level and switches can be calculated from the above equations and To get a Positive half,
properly turn ON the switches and the current flow from the point A to B will generate a
positive polarity, the flow from B to A will generate the negative polarity. In general, in
order to achieve an equal voltage steps, the equal and same dc source voltage to be use.
Fig 4.3 Cascaded Multilevel Inverter Seven Level Inverter with 7 switches
Switches S1, S2, S6, S7 are mainly used for polarity changes so that we can get the
correct output voltage which are in symmetrical form. The Unique modulation strategies
are applicable for this topology. The unequal Vdc generate the different voltage steps.
There are several multilevel inverters are commercialized for high power applications
such as Flexible AC Transmission Systems (FACTS) Controllers, Train Traction,
Automotive applications, renewable energy power conversion and transmission etc. For
simplicity the circuit can be modified as shown in fig 3.3. Cascaded Multilevel Inverter
consist of series of H-bridge (Full Bridge) Inverter units. Each bridge will be fed from a
separate DC source which may be obtained from batteries, fuel cells, or solar cells.
34
Table 4.2 Switching Sequence of Seven Level Cascaded Inverter
4.3 Mode of Operation
The Seven Level Cascaded Multilevel Inverter has seven mode of operation and they are
as follows
1. Mode 0(0Vdc)
2. Mode 1(1Vdc)
3. Mode 2(2Vdc)
4. Mode 3(3Vdc)
5. Mode 4(-1Vdc)
6. Mode 5(-2Vdc)
7. Mode 6(-3Vdc)
Each mode is explained with the help of circuit diagram and are follows
4.3.1 Mode 0
In this mode the entire switch is turned off as shown in figure given below. The output
voltage is zero hence the name 0Vdc
35
Fig 4.4 mode 0(0Vdc)
4.3.2 Mode 1
In this mode we get an output voltage +Vdc i.e, the first step in the output voltage
waveform. The switches which are conducting in this mode of operation are as follows:
S1-S3-S7. The switches which are non-conducting are: S2-S4-S5-S6. Now only three
switches operate at a time to give the desired output waveform. The current flow path is
as follows S1-R load-S7-S3-+Vdc.
Fig 3.5 Mode 1(+Vdc)
4.3.3 Mode 2
In this mode we get an output voltage +2Vdc, i.e. the second step in the output
waveform. The switches which are conducting in this mode of operation are S1-S4-S7.
36
The switches which are non-conducting are: S2-S3-S5-S6. The current flow path is as
follows S1-R load-S7-S4-+Vdc-+Vdc.
Fig 3.6 Mode 2(+2Vdc)
4.3.4 Mode 3
In this mode we get the output voltage as +3Vdc, i.e third step of the output voltage in
the positive cycle. The switches which are conducting in this mode of operation are
S1S7-S5. The current flow path is as follows S1-R load-S7-S5-+Vdc-+Vdc-+Vdc.
Fig 3.7 Mode 3(+3Vdc)
37
4.3.5 Mode 4
In this mode we get an output voltage -Vdc i.e., the first step in the output voltage
waveform. The switches which are conducting in this mode of operation are as follows:
S2-S3-S6. The switches which are non-conducting are: S1-S4-S5-S7. The current flow
path is as follows S2-R load-S6-S3--Vdc.
Fig 3.8 Mode 4(-Vdc)
4.3.6 Mode 5
The switches which are conducting in this mode of operation are as follows: S2-S3S6.
The switches which are non-conducting are: S1-S4-S5-S7. The current flow path is as
follows S2-R load-S6-S4—Vdc--Vdc.
Fig 3.9 mode 5(-2Vdc)
38
4.3.7 Mode 6
In this mode we get an output voltage -Vdc i.e., the first step in the output voltage
waveform. The switches which are conducting in this mode of operation are as follows:
S2-S3-S6. The switches which are non-conducting are: S1-S3-S4-S7. The current flow
path is as follows S2-R load-S6-S5—Vdc—Vdc--Vdc.
Fig 3.10 mode 6(-3Vdc)
4.4 Output Waveform
Fig 3.11 shows the expected output waveform which can be obtained by conducting this
project.
39
 Advantages And Disadvantages
Advantages
1. Soft switching techniques can be used to reduce switching losses and stresses.
2. Compared with diode clamped and flying capacitors inverters, it requires the less
number of components to achieve the same number of voltage levels.
3. Potential of electrical shock is reduced due to separate DC sources.
4. Switching redundancy for inner voltage level is possible because the phase voltage
output sum of each bridges output.
5. The series structure allows a scalable, modularized circuit layout and packaging since
each bridge has the same structure.
Disadvantages
1. It need separate dc source for real power conversion, thereby limiting its applications.
2. Usage of the power semiconductor switches increases exponentially whenever the
level is to be increased.
 APPLICATIONS
1. DC power source utilization
2. Uninterruptible power supplies
3. HVDC power transmission
4. Variable-frequency drives
5. Electric vehicle drives
6. Air conditioning
40
CHAPTER 5
SIMULATION
5.1 Introduction
Matlab and other mathematical computation tools are computer programs that
combine computation and visualization power that make them particularly useful tools for
engineers. Matlab is both a computer programming language and a software environment
for using that language effectively.
The name Matlab stands for Matrix laboratory, because the system was designed to make
matrix computations particularly easy. The Matlab environment allows the user to manage
variables, import and export data, perform calculations, generate plots, and develop and
manage files for use with Matlab. The Matlab environment is an interactive environment:
• Single-line commands can be entered and executed, the results displayed and observed,
and then a second command can be executed that interacts with results from the first
command that remain in memory. This means that you can type commands at the Matlab
prompt and get answers immediately, which is very useful for simple problems.
• Matlab is an executable program, developed in a high-level language, which interprets
user commands.
• Portions of the Matlab program execute in response to the user input, results are
displayed,
and the program waits for additional user input.
• When a command is entered that doesn‘t meet the command rules, an error message is
displayed. The corrected command can then be entered.
• Use of this environment doesn‘t require the compile-link/load-execution process
described above for high-level languages. While this interactive, line-by-line execution of
Matlab commands is convenient for simple computational tasks, a process of preparation
and execution of programs called scripts is employed for more complicated computational
tasks:
• A script is list of Matlab commands, prepared with a text editor.
• Matlab executes a script by reading a command from the script file, executing it, and
then repeating the process on the next command in the script file.
• Errors in the syntax of a command are detected when Matlab attempts to execute the
Command. A syntax error message is displayed and execution of the script is halted.
• When syntax errors are encountered, the user must edit the script file to correct the error
and then direct Matlab to execute the script again.
41
• The script may execute without syntax errors, but produce incorrect results when a logic
error has been made in writing the script, which also requires that the script be edited and
execution re-initiated.
• Script preparation and debugging is thus similar to the compile-link/load-execution
process required for in the development of programs in a high-level language.
5.2 Role of Simulation In Design
Electrical power systems are combinations of electrical and electromechanical devices like
motors and generators. Engineers working in this discipline are constantly improving the
performance of the systems. Requirements for drastically improved efficiency have forced
power system designers to use power electronic devices and sophisticate control system
concepts that tax traditional analysis tools and techniques. Further complicating the
analyst‘s role is the fact that the system is often so nonlinear that the only way to
understand it is through simulation.
Land based power generation from hydroelectric, steam or other devices are not the only
use of power systems. A common attribute of these systems is their use of power
electronics and control systems to achieve their performance objectives.
SIMULINK is a software package for modelling, simulating, and analyzing
dynamical systems. It supports linear and nonlinear systems, modelled in continuous time,
sampled time, or a hybrid of the two. Systems can also be multi rate, i.e., have different
parts that are sampled or updated at different rates. For modelling, SIMULINK provides a
graphical user interface (GUI) for building models as block diagrams, using click-and-drag
mouse operations. With this interface, you can draw the models just as you would with
pencil and paper (or as most textbook depict them). This is a far cry from previous
simulation packages that require you to formulate differential equations and difference
equations in a language or program. SIMULINK includes a comprehensive block library
of sinks, sources, linear and nonlinear components, and connectors. You can also
customize and create your own blocks. Models are hierarchical, the models are built using
both top-down and bottom-up approaches the system can viewed at a high level, then
double-click on blocks to go 5 down through the levels to see increasing levels of model
detail. This approach provides insight into how a model is organized and how its parts
interact. After a model is defined, it can simulate, using a choice of integration methods,
either from the SIMULINK menus or by entering commands in MATLAB's command
window. The menus are particularly convenient for interactive work, while the commandline approach is very useful for running a batch of simulations. Using scopes and other
display blocks, the simulation results can see while the simulation is running.
42
5.2.1 SIMPOWERSYSTEMS
SimPowerSystems and SimMechanics of the Physical Modeling product family
work together with Simulink to model electrical, mechanical and control systems.
SimPowerSystems is a modern tool that allows scientists and engineers to rapidly and
easily build models that simulate power systems. SimPowerSystems uses the Simulink
environment, allowing building a model using simple click and drag procedures. Not only
can draw the circuit topology rapidly, but analysis of the circuit can include its interactions
with mechanical, thermal, control, and other disciplines. This is possible because all the
electrical parts of the simulation interact with the extensive Simulink modeling library.
Since Simulink uses MATLAB as its computational engine, designers can also use
MATLAB toolboxes and Simulink block sets. SimPowerSystems and SimMechanics share
a special Physical Modeling block and connection line interface.
5.3 Simulation Circuit
The simulation is done using MOSFET switches and control signals like Phase
Opposition Disposition (POD) Pulse Width Modulation and Digital Pulse Width
Modulation is implemented.
5.3.1 Simulation Of Conventional Seven Level Cascaded Multilevel
Inverter
Here in this circuit each h bridge will produce three different output voltage
namely +Vdc, -Vdc and 0V. Labels such as go to and from are used to give gate signals to
the IGBT dries which will ultimately give a seven level output voltage which is shown
later. A voltage of 50V dc is applied to each H-bridge configuration to get an output
voltage of 150V. The output is viewed using the scope block which is used give the output
of the simulated circuit in matlab.
A sine wave of amplitude 3 and frequency 2*pi*50 act as the reference signal is
used to compare with triangular carrier signal which is produced by repeating sequence
block parameter. The modulation index of the reference signal and comparator signal is
0.8. When the reference signal is greater than the comparator signal we get the output
signal which is given to the gate section of the MOSFET‘s or IGBT‘s used as switches.
43
Figure 5.1: Simulation diagram of proposed topology.
Figure 5.2: PWM generation circuit
With the help of repeating sequence block the triangular carrier wave signal has been
generated which is then compared with the sinusoidal reference signal using the relational
operator block. Using goto label the gate signal is sent to the main circuit . The logical gate
operators are used to add the gating signal which are the given to goto switches s1, s2, s3
respectively. The output waveform is seen using scope. Scope is another matlab function
which used to see the output waveform when the circuit is simulated.
44
Here a sine wave of amplitude 3 and frequency 2*pi*50 is compared with triangular carrier
signal. In-order to give obtain the triangular carrier signal of 1800 phase shift is obtained by
using repeating sequence as shown in fig 5.2 the carrier signal is compared with the triangular
reference signal comparator and its output is given to the got label.
Fig 5.3 Output Waveform Of Conventional Cascaded Multilevel Inverter
The output waveform is similar To New Cascaded Seven Level Multilevel Inverter With
Minimum Number of Switches.
The output is obtained in steps upto 150V as a 50V dc is applied to each different voltage
source used in the circuit. So the first step is of 50V second step is of 100V and third step
is of 150V as shown in figure 5.7. Similarly in the negative side we get a total of 150V. so
the voltage in each step is 50V for first step, 100V for second step, 150V for the third and
final step in the negative section. Using goto label the gate signal is sent to the main
circuit. The output waveform is seen using scope. Scope is another matlab function which
used to see the output waveform when the circuit is simulated.
45
Fig 5.4 THD Analysis Of Conventional Cascaded Inverter
Signal to analyze
Selected signal: 2 cycles. FFT window (in red): 1 cycle
200
100
0
−100
−200
0
0.005
0.01 0.015
0.02
0.025
Time (s)
46
0.03
0.035
0.04
FTT analysis
Figure 5.5 FFT analysis of existing 6-switch topology using APOD pwm.
Signal to analyze
Selected signal: 2 cycles. FFT window (in red): 1 cycle
Time (s)
47
FTT analysis
Figure 5.6: FFT analysis of proposed topology using PD pwm.
Signal to analyze
Selected signal: 2 cycles. FFT window (in red): 1 cycle
Time (s)
FTT analysis
Figure 5.7: FFT analysis of proposed topology using POD pwm.
48
Signal to analyze
Selected signal: 2 cycles. FFT window (in red): 1 cycle
Time(s)
FTT analysis
Figure:5.8 FFT analysis of proposed topology using APOD.
Table 5.1: Comparison of proposed 7-level mli with other mlis.
49
Therefore, the new circuit design is analyzed with level shifting carrier -based PWMs, that is,
PD, POD, and APOD PWMs. Interestingly, it is noted that POD gives lower THD and is
found to be the apt PWM for proposed topology. T he PWM generation circuit is the heart of
the circuitry. One reference sine wave of amplitude 0.8 and frequency 50 Hertz is compared
with C1 to C6 triangular carriers of frequency 1 KHz. If m-level needs to be synthesized,
(− 1) carriers are required. Whenever the reference sinusoid exceeds the carrier, instant pulses
are generated to trigger the switch to 0N state. Higher triangular carrier amplitude is taken as
one.
The carrier alignment for the carrier based pwm technique is shown in Figure. In PD or phase
disposition technique, (−1) carriers are aligned in the same direction/phase. In POD or phase
opposition disposition for 7-level, 6 carriers are aligned as symmetric mirror images above
and below the Zero reference axis. In alternate phase opposition disposition, alternate carriers
are in the same phase and neighbouring carriers in the opposing phase.
50
CONCLUSION
The 7-level MLI using just 7 switches is successfully introduced simulating the
circuitry using MATLAB/SIMULINK and observed a clear stepped 7-level waveform. It
is found that the POD-PWM dominates all other PWMs in the proposed configuration.
The new design is simple in its outlook with very few components. The novel 7level MLI has lower THD compared to conventional symmetric and asymmetric
topologies.
51
REFERENCES

J. Rodr´ıguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: a survey of topologies,
controls, and applications,” IEEE Transac-tions on Industrial Electronics, vol. 49, no.
4, pp. 724–738, 2002.

D. Mohan and S. B. Kurub, “Performance analysis of SPWM control strategies using
13 level cascaded MLI,” in IEEE Inter-national Conference on Advances in
Engineering Science & Management (ICAESM ’12).

O. L. Jimenez, R. A. Vargas, J. Aguayo, J. E. Arau, G. Vela, and A. Claudio, “THD in
cascade multilevel inverter symmetric and asymmetric,” in Proceedings of the IEEE
Electronics, Robotics and Automotive Mechanics Conference (CERMA ’11), pp. 289–
295, November 2011.

P. Palanivel and S. S. Dash, “Analysis of THD and output voltage performance for
cascaded multilevel inverter using carrier pulse width modulation techniques,” IET
Power Electronics, vol. 4, no. 8, pp. 951–958, 2011.

J. J. Nedumgatt, D. Vijayakumar, A. Kirubakaran, and S. Umashankar, “A multilevel
inverter with reduced number of switches,” in Proceedings of the IEEE Students’
Conference on Electrical, Electronics and Computer Science (SCEECS ’12), pp. 1–4,
March 2012.

T. V. V. S. Lakshmi, N. George, S. Umashankar, and D. P. Kothari, “Cascaded seven
level inverter with reduced number of switches using level shifting PWM technique,”
in International Conference on Power, Energy and Control (ICPEC ’13), pp. 676–
680, February 2013.

R. A. Ahmed, S. Mekhilef, and H. W. Ping, “New multilevel inverter topology with
minimum number of switches,” in

Proceedings of the 14th International Middle East Power Systems Conference
(MEPCON ’10), pp. 1862–1867, Cairo University, Cairo, Egypt, December 2010.

M. H. Rashid, Power Electronics: Circuits, Devices and Applica-tions, Prentice Hall,
New York, NY, USA, 3rd edition, 2004.

W. A. Hill and C. D. Harbourt, “Performance of Medium Voltage Multilevel
Inverters”, IEEE Industry Applications Society (IAS) Conference, Vol. 2, pp. 1186–
1192, 1999.
52

P. W. Hammond, “A New Approach to Enhance Power Quality for Medium Voltage
AC Drives”, IEEE Transactions on Industry Applications, Vol. 33, No. 1, pp. 202–
208, 1997.

P.S. Bhimbra, “Power Electronics”, 2 ed., New Delhi, Khanna Publications, 2004.

G. Narayanan, IISc(Bangalore), Lectures on “Pulse width Modulation for Power
Electronic converters’” NTPEL

Muhammad H. Rashid, “Power Electronics Circuits, devices, and Applications”,
Prentice-Hall of India Private Limited, Third Edition, 2004.

N. Mohan, T. M. Undeland, et al, “Power Electronics - Converters, Applications and
Design”, 3rd edition, John Wiley & Sons, New York, 2003

Hong Hee Lee, Phan Quoc Dzung, Le Dinh Khoa, Le Minh Phuong & Huynh Tan
Thanh, “The adaptive space vector PWM for four switch three phase inverter fed
induction motor with DC – Link Voltage Imbalance” in Hong School of Electrical
Engineering,
University
of
Ulsan,
10.1109/TENCON.2008.4766516
53
Korea,
2008,
IEEE,
DOI: