Download `BUCK` STEP-DOWN DC-DC CONVERTER (Basic

‘BUCK’ STEP-DOWN DC-DC CONVERTER (Basic 1 Topology)
1. ‘IDEAL’ STEP DOWN CONTINUOUS CURRENT MODE (CCM)
Continuous conduction Current Mode (CCM) is more popular than the discontinuous conduction
mode (DCM) due to the lower peak inductor energy and the much lower device peak current for the
Vind
same output power.
Vds
Iind
L
Ids
Iload
IC
E in
C C
Vgs
R
Vload
Ifwd
FIGURE 1
Operation of dc-dc converters is based on energy storage in one of the switching cycle sub intervals
followed by energy transfer in a later sub interval. In the basic 1 topology circuit shown in Fig.1 the
energy storage and transfer is due to the inductor L.
Large signal analysis provides terminal data and a knowledge of the circuit performance but does
not yield and understanding of the operation of the circuit. Operation of DC-DC converters is based
on energy storage in one of the switching cycle sub intervals followed by energy transfer in a later
sub interval. In the basic 1 topology circuit shown in Fig.1 the energy storage and transfer is mainly
due to the inductor L, however even when there is an intermediate storage stage the total output
power is still supplied by the input DC source though not all by direct connection. At switch turn
on current is supplied to L, C and R and energy ( J  0.5 LI ind 2 ) is stored in L.When the switch turns
off the energy stored in L drives current through L, C and R.
Vind
Vind
Ids = Iin
Iind
Iind
L
L
E in
E in
C
R
Iload
IC
Iload
IC
Vfwd
C
Vload
R
Vload
Ifwd
Iind,M
Iind
Iload
I ind
Iind,m
0
Ein -Vload
Vind
area A
0
area B = area A
DswT
t
-Vload
(1-Dsw)T = DrectT
FIGURE 2
The sub interval equivalent circuits and the resulting inductor current and voltage waveforms,
neglecting output voltage ripple, are shown in Fig.2. Note the reversal of inductor voltage in the
switch off-time has been accounted for in the sub interval circuit diagram.
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
1
Prof R T Kennedy
2. ‘ IDEAL’ BUCK DC-DC CONVERTER : CCM ENERGY EQUATIONS
Reference to Fig. 2
I ind , M

I load 
I ind
2
I ind ,m

I load 
I ind
2
I ind , M  I ind ,m

2  I load
I ind , M  I ind ,m

I load
I ind , M  I ind ,m
2
 2  I load  I load
2
(1)
Sub-Interval 1: (Dsw)T
1
2
2
Lind ( I ind , M  I ind ,m )  L  I load  I ind
2
inductor energy from source
J ind

load energy from source
J 1,load

Vload  I load  Dsw  T
input power
Pin

J1
Dsw  T

Vload  I load
Sub-Interval 2: (1-Dsw)T

inductor voltage Vind
Vload

Vload

Lind  I ind
Lind
Lind
di
dt
I ind
(1  Dsw )  T

 Vload  (1  Dsw )  T
load energy from inductor
total load energy
load power
 L  I load  I ind
J 2,load
J load

Pload
J 1,load  J 2,load

ideal case
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
J load
T
Pload
2
 Vload  I load  (1  Dsw )  T
 Vload  I load  T
 Vload  I load
 Pin
Prof R T Kennedy
3 ‘IDEAL’ BUCK CONVERTER CCM OUTPUT VOLTAGE Volt-Time Integral Method
The large signal input-output performance can be established for the continuous conduction mode
(CCM) by applying the volt-time integral approach to the inductor voltage waveform in Fig 2. The
inductor current magnitude is not required when using the volt-time integral thereby simplifying
the analysis which results in the ‘ideal’ classical expression given in equation 2 and represented by
Fig.3.

area A
Dsw Ein
Vload
( Ein  Vload )  Dsw  T
Vload
Ein
area B
 Vload  (1  Dsw )  T

Dsw
(2)
FIGURE 3
4. ‘IDEAL’ BUCK CONVERTER CCM OUTPUT VOLTAGE Power Balance Method
IDEAL CASE
Pout

Pin
Vload  I load

E in  I in,av
Vload  I load
 E in  D sw  I load
Iload
Iin
Iin,av
t
0
DswT
Vload
E in
(1-Dsw)T = DrectT

D sw
FIGURE 4
(3)
The ‘ideal’ case large signal result derived from a power balance concept using the transistor
current waveform of Fig. 4 is given by equation 3 and yields the same result as the volt-time
integral approach.
NOTE: Power is now assumed to be the average value and the subscript av is NOT used!
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
3
Prof R T Kennedy
5. BUCK CONVERTER CCM VOLTAGE TRANSFER FUNCTION v EFFICIENCY
The 'classical' ideal result of equations 2, 3 can be misleading as it implies that the voltage transfer
function is defined by only the transistor switch duty cycle (Dsw). The result is however not a
general rule as the voltage transfer function is also dependent upon parasitic resistances and
semiconductor device on-state voltages.
Parasitics will also affect the absolute value of circuit currents but in the case of the current transfer
function there is a general rule for the ratio of input - output current that is dependent only on the
transistor switch duty cycle Dsw.
Iload
Iload
0
0
Iload
Iload
I in
Iin,av
I in
Iin,av
0
0
FIGURE 5
Irrespective of the current waveform as shown in Fig 5, or the topology, the ratio of input and
output average currents are independent of parasitics and are set by the transistor switch duty cycle
Dsw as given by equation 4. The absolute values of the currents are dependent on parasitics.
I in,av
I load,av
 Dsw
(4)
  100% (ideal)
1
0.9
  90%
0.8
  75%


Pload
Pin


Vload  I load
Ein  I in,av
Vload
Ein

0.7
Vload
Ein
0.6
  50%
0.5
0.4
0.3
0.2
0.1
0
Vload
Ein
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1


I in,av
I load

Dsw 
(5)
Dsw
FIGURE 6
The voltage transfer function being dependent on parasitics is therefore, in addition to duty cycle, a
function of efficiency (  ) as shown in Fig.6 and given by the general expression of equation 5.
An alternative interpretation of the output voltage expression is given by equation 6.
Vload

Dsw  Ein 


Vload

IDEAL 
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM


 correction factor
4
(6)
Prof R T Kennedy
6.
BASIC 1 TOPOLOGY TERMINOLOGY
A number of different names are attributed to the basic 1 topology
STEP DOWN (BUCK) CONVERTER
The theoretical limits for the transistor duty cycle, 0  Dsw  1 , applied to equations 1,24 show the
output voltage is  the input voltage, hence the title Step Down Converter.
FORWARD CONVERTER
When the switch is closed (device 'on') energy is transferred forward from the supply to the load
hence the terminology Forward Converter which is also referred to as a Direct Converter.
SINGLE ENDED CONVERTER
The common input-output rail gives rise to the terminology Single Ended Converter.
NON-ISOLATED CONVERTER
No transformer in the circuit to provide input – output isolation.
Complete Name !
" Non-isolated SINGLE ENDED STEP-DOWN FORWARD (direct) CONVERTER"
Practical:
The non-isolated forward converter is not extensively used as a power supply but is popular in low
cost high efficiency three terminal switching regulators and in the low power distributed power
market.
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
5
Prof R T Kennedy
7. ‘IDEAL’ BUCK CONVERTER CCM WAVEFORMS
Vind
Vds
Vgs
0
Iind
L
Ids
Ein
Iload
IC
E in
C C
Vgs
R
Ein
Ifwd
0
Iload
Iload
0
FIGURE 7
Iload
Iind
0
Icap 0
Ids
Iload
0
Iload
Ifwd
0
Ein
Vds
0
0
Vfwd
-Ein
Ein-Vload
Vind
0
-Vload
Vload
Vload
0
DswT (1-Dsw)T
FIGURE 8
Fig. 8 shows the current and voltage waveforms for the BUCK converter shown in Fig. 7.
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
6
Prof R T Kennedy
Vload
8. ‘IDEAL’ BUCK CONVERTER CCM INDUCTOR CURRENT WAVEFORMS
8.i INDUCTOR CURRENT v INDUCTANCE
REDUCTION in Lind
Iind
Iload
0
Ein-Vload
Vind
0
-Vload
DswT
(1-Dsw)T
FIGURE 9
Inductor current values are represented by equations 7.

I ind , M

Vload Vload  (1  D sw )  T

Rload
2  Lind
I ind , M

Vload  (1  D sw )  T  Rload 
1 

Rload 
2  Lind

I ind , M





Vload 
(1  D sw )

1
Rload 
 Lind  f sw  
 2 


 Rload  
I ind , M

Vload  (1  D sw ) T 
1 

Rload 
2   ind 
I ind , m

Vload  (1  D sw ) T 
1 

Rload 
2   ind 

I ind


I ind

I load 
I ind
2
I ind , M

Vload
Rload
 (1  D sw ) T 
1 

2   ind 

 ind 
Lind
Rload
Vload  (1  D sw ) T 


Rload   ind

Vload (1  D sw ) E in  D sw  (1  D sw )

Lind  f sw
Lind  f sw
(7)
The inductor currents at fixed duty cycle (Dsw), shown in Fig.9, vary with inductance and rise more
steeply to larger values as the inductance reduces, the inductor voltage remaining unchanged.
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
7
Prof R T Kennedy
8.ii ‘IDEAL’ BUCK CONVERTER INDUCTOR CURRENT v DUTY CYCLE ( Dsw)
Dsw > 0.5
Iload
I ind
Iind
Iload
Dsw
I ind
.
Iload
Dsw < 0.5
0
I ind
Dsw (1-Dsw)
Dsw = 0.2
Dsw = 0.5
t
Dsw = 0.8
FIGURE 10
The effect of switch duty cycle (Dsw) on the inductor current waveform is shown in Fig.10,
developed from the data of Table 1.
UPSLOPE
dI ind ,rise
dt

E in (1  D sw )
Lind
INDUCTOR CURRENT
DOWNSLOPE
dI ind, fall
dt

Ein Dsw
Lind
increases as Dsw reduces
decreases as Dsw reduces
independent of Rload
independent of Rload
I ind
I ind
I ind
Ein Dsw (1  Dsw )
Lind f sw

 max when Dsw  0.5
I ind
f n Dsw (1  Dsw )
0
0.5
Dsw
TABLE 1
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
8
Prof R T Kennedy
1
Practical:
 linear charge and discharge indicates

I ind
0
constant inductance and inductor voltage
t
 exponential rise and fall indicates
 excess circuit resistance
I ind
0
t

 ‘ peaky’ current’
I ind
0
(source, device, inductor, wiring)

system tends to be inefficient.
indicates
reduction in inductance due to operation
with Iind(max) > Isat and the subsequent
increase in current.
t
FIGURE 11
The inductor current waveform, in addition to indicating the operational mode (CCM or DCM), can
in terms of the waveform linearity be used to predict possible circuit performance and component
selection.
EET423 POWER ELECTRONICS - 2
SMPS – BUCK CCM
9
Prof R T Kennedy