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Topic: High Performance Data Acquisition Systems Analog Components: Differentially Driving Analog to Digital Convertors Figure 1 The Most Simple High Performance Data Acquisition System Let’s conclude our series on high performance data acquisition systems. We have discussed many different key aspects of various types of data acquisition systems and how to design and develop them to achieve the overall desired result. The most elementary system architecture configuration would be to simply connect the sensor output directly to the analog to digital convertor input and therefore bypass any other signal conditioning amplifiers leading up the ADC (see Figure 1). Unfortunately, for most high performance systems, this simple configuration is not possible due to the complex input drive requirements necessary for today’s high performance ADC’s. In fact, as previously discussed, many high frequency ADC’s have unbuffered differential inputs that require extreme caution when designing and selecting a suitable differential drive amplifier. Remember, un-buffered ADC “inputs” often times become “outputs” and transmit signals to the outputs of the ADC input buffer amplifier(s) that become superimposed on the input voltage (of the ADC) and the ADC will then convert a corrupted input signal that is ultimately caused by the ADC itself! Last week we looked at passive differential ADC input drivers, this week let’s finish up with active ADC drivers. Figure 2 Single-ended to Single-ended Active ADC Input Driver Figure 2 shows a simple single-ended to single-ended active ADC input driver (using a CADEKA CLC1003 low distortion (HD2=-125 dBc and HD3=-127 dBc) and low noise (en=3.5 nV/√Hz) amplifer). In a single-ended to single-ended application, a high frequency, low distortion amplifier (like the CLC1003) is used in this application to drive an ADC with a single-ended input or one side of a differential input (with the other differential input connected to an ADC middle input common mode voltage reference). This type of inverting amplifier configuration is useful in many cases because a reference voltage can be applied to the (+) terminal of the amplifier to ultimately reference the mid-point of the input signal. Capacitors such as a .01uf and .1uF at the (+) terminal of the amplifier can also be used to filter any unwanted noise that may be induced into the circuit through the reference voltage source and divider. An RC filter on the output of the amplifier can also band-limit some of the amplifiers output noise, but be careful, that resistor can also act as a multiplier of an un-buffered ADC output glitch and cause an input voltage glitch if the resistance is too high. Of course the gain of the amplifier is set by G=-R2/R1. Figure 3 Single-ended to Differential Active ADC Input Driver A single-ended to differential ADC driver is shown in Figure 3, and it utilizes a dual op amp to buffer a single-ended source to drive an ADC with differential inputs. One of the op amps is configured as a unity gain buffer that drives the inverting input of the other op amp while also driving the non-inverting input of the ADC. The ADC driver is configured for a gain of 2 in order to reduce the noise without sacrificing the harmonic distortion performance. A common mode voltage of 2.5V is usually supplied at the non-inverting inputs of both op amps. This configuration produces a differential +/- 2.5 Vpp output signals when the single-ended input signal of 0 to Vref is AC coupled into the non-inverting terminal of the op amp and each non-inverting terminal of the op amp is biased at a mid-scale voltage of +2.5V. Two output RC anti-aliasing filters are used between the outputs of both op amps and the differential inputs of the ADC in order to minimize the effect of undesired high frequency noise coming from the input source. Each RC filter’s cut-off frequency is found from the equation fcut-off=1/2πRC. Figure 4 Differential to Differential Active ADC Input Driver A differential to differential active ADC input driver is shown in Figure 4. Just as a dual op amp can be configured to perform a single-ended to differential conversion, so to a dual op amp can be configured as a differential to differential ADC driver to buffer a differential source to differential ADC inputs. A differential to differential ADC driver can be formed by using two single-ended to single-ended ADC drivers. Each output from these drivers can go into separate inputs of a differential ADC. In this example, each single to single ADC driver uses the same components and is in a multi-feedback inverting configuration. One thing that is important to note when driving ANY high performance ADC is to pay special attention to the signal ground reference as well as the power supply ground reference. It is important to connect the input source ground with the power supply ground. Any voltage potential difference between the two will usually result in an interference/noise and distortion signal picked up by the ADC. Make sure the power supply grounds (for the ADC) and the signal grounds are connected together at the ADC on the PCB. Also, for each ADC driver configuration, it is also important to account for the impedances of the signal sources when setting up the gain setting resistor networks in order to ensure that the differential outputs have the same gain. Any signal source impedance must be added to the gain setting resistors to ensure proper gain adjustments. Again, when designing a high performance (and high frequency) data acquisition system, because the analog to digital convertor is usually the limiting factor in overall system resolution, accuracy, and noise, great care must be taken in driving it’s inputs. Whether the convertor has single-ended inputs (which require an ultra stable external driver amplifier with very stringent DC specifications) or differential inputs (which require an ultra stable on-board ADC voltage reference and external amplifier with differential outputs), the designer needs to know the system level trade-offs for each configuration. As always, choosing the proper ADC, and correlating its DC specifications to the key results that you desire the system to perform, will then set the limit of most of your system level performance parameters. Kai ge from CADEKA