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’Flash’ Analog-to-Digital Conversion A circuit that accepts an analog voltage (or current) and produces a numerical value (in binary) that represents the value of the voltage (or current) is known as an analog-to-digital converter (ADC). There are a number of different circuit topologies that perform ADC, each with its own set of advantages and disadvantages. The ‘flash’ ADC topology has the advantage that when a new analog voltage is applied to its input, an updated digital result occurs very quickly (it has a very low ‘conversion time’ (i.e., the amount of time to ‘convert’ an analog voltage to its corresponding digital value)). The flash ADC topology has a very low conversion time because it only takes two propagation delays from a new analog input voltage to a new digital result – whereas most of the other ADC topologies require a clock signal and a circuit that must go through some number of states before an updated digital result occurs. The disadvantage of the flash ADC topology is that it requires a large number of ‘comparators’ if the digital result is to have a moderate number of bits (e.g., 255 comparators are required to get a full 8 bits of digital result (known as 8-bit ‘resolution’)). The flash ADC topology requires a number of ‘comparators’ where a comparator compares two voltages (e.g., VA and VB) and reports, on its output, if VA > VB, or not. Note that the ‘+’ input to the comparator is known as the ‘non-inverting input’ (not the ‘positive’ input) and the ‘–‘ input is known as the ‘inverting input’ (not the ‘minus’ input). The symbol used for a comparator is the same symbol used for an ‘op-amp’ (‘operational amplifier’). Op-amps can be used as comparators – but most comparators cannot be used as op-amps since most comparators have ‘open-collector’ outputs. Also, op-amps are generally used to create a circuit with ‘negative feedback’, which comparator circuits would not have. ’Flash’ Analog-to-Digital Conversion The following truth table shows the values on the W, X, Y, and Z comparator outputs for various Analog Input Signal (AIS) voltage ranges for the flash ADC circuit on the prior slide: Analog Input Signal W X Y Z Digital result AIS < 1.0v 0 0 0 0 000 = 010 1.0v < AIS < 2.0v 1 0 0 0 001 = 110 2.0v < AIS < 3.0v 1 1 0 0 010 = 210 3.0v < AIS < 4.0v 1 1 1 0 011 = 310 AIS > 4.0v 1 1 1 1 100 = 410 Note that the priority encoder ‘looks’ for the highest numbered input with a ‘1’ on it, and, as such, it will react to the highest-lettered comparator output with a ‘1’ on it (e.g., when the AIS is between 3.0 volts and 4.0 volts (4th line in the truth table from the top), the priority encoder will react to the ‘1’ on the Y comparator output). The four-bit code on the WXYZ outputs is not considered a true binary code since there are only five possibilities on the four bits (a normal binary code would have 16 possibilities on a 4-bit code). The sequence of codes on the WXYZ outputs is often called a ‘thermometer code’ since the 1’s go up and down in response to the Analog Input Signal’s voltage. Note that the flash-type ADC on the prior slide would get a full three bits of resolution for its digital result (results 0 – 7 instead of just 0 – 4) if there were seven comparators. This can be extended: Number of bits of resolution (n) 3 4 8 Number of comparators needed (2n – 1) 7 15 255