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BITS Pilani
Pilani Campus
EEE /INSTR/CS F241
ES C263
Microprocessor Programming and
Interfacing
Pawan Sharma
Lecture 26-28
05-03-2012
Last Lecture
 String Instructions
 Logical Instructions
 IN/OUT instructions
BITS Pilani, Pilani Campus
Today’s Lecture
 Program Models
 LOOP instructions
 Signed multiplication and division
 In/OUT instr
 PUSH/POP
BITS Pilani, Pilani Campus
Program Models
MASM (Microsoft Assembler)
BITS Pilani, Pilani Campus
MODELS
 There are many models available to MASM Assembler ranging from
Tiny to Huge
 To designate a model use the .MODEL statement followed by the
size of the memory system
Ex: .MODEL TINY – enables the use of simplified segments
TINY Model requires that all program and data fit into one 64K
segment
 . DATA defines data segment
 .CODE defines code segment
 .STARTUP
 .EXIT
BITS Pilani, Pilani Campus
.model tiny
.data
DATA1 DB
DATA2 DW
DATA3 DW
ARRAY DW
.code
.startup
23
9999h
9999
01,02,03,04,05,06,07,08
MOV
MOV
MOV
MOV
MOV
MOV
BX,DATA2
CX,DATA3
DATA1,BL
DL,DATA1
DI,0001H
AX, ARRAY [DI]
.exit
end
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
.model tiny
.DATA
DATA1 DB
ARRAY DW
23H
01,02,03,04,05,06,07,08
.CODE
.startup
MOV
MOV
AX, ARRAY
CL, DATA1
MOV
MOV
BX, OFFSET ARRAY
AL,[BX]
.exit
end
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Model Type
Description
Tiny
All the data and code fit in one segment. Tiny programs are written
in .COM which means the program must be originated at location
100H
Small
Contains two segments - One DS of 64k bytes and one CS of 64k
bytes
Medium
Contains one DS of 64kbyte and any number of CS for large
programs
Compact
One CS contains the program and any number of DS contains the
data
Large
allows any number of CS & DS
Huge
Same as large - but the DSs may contain more than 64k bytes each
* Flat Model –Special type of Tiny Model for 32-bit
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
.MODEL SMALL
; This statement is required before you can use other
;simplified segment directives
.STACK
.DATA
; Use default 1-kilobyte stack
; Begin data segment
; Place data declarations here
.CODE
.STARTUP

.EXIT
END
; Begin code segment
; Generate start-up code
; Place instructions here
; Generate exit code
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
LOOP
 Used to repeat a series of instructions some number of times
and are basically conditional jump instructions.
 The no. of times, sequence is to be repeated is loaded in CX
 Combines two operations in each instruction.
 First, each time Loop instruction executes, CX automatically
decrements by 1
 Secondly, jump to a specified label if CX 0, and sometimes
checks zero flag, after auto- decrement of CX
BITS Pilani, Pilani Campus
 IF CX  0 execution will jump to destination, specified by a
label in the instruction
 If CX = 0 after auto dec, execution will go on to the next
instruction after LOOP
 Destination address is of type SHORT
 LOOP affects no FLAGs
BITS Pilani, Pilani Campus
Add a data in one block of memory with data in another block of
memory using LOOP
Size of block -100 words
Y1
Y2
=
=
X1 + Y1
X2 + Y2
=
Xn + Yn
…………
Yn=
BITS Pilani, Pilani Campus
.Model Tiny
.data
BLOCK1
DW
BLOCK2
DW
COUNT
DW
.code
.startup
CLD
MOV
MOV
MOV
X1:
LODSW
ADD
STOSW
LOOP
.EXIT
END
100 DUP(01)
100 DUP(02)
100
CX, COUNT
SI, OFFSET BLOCK1
DI, OFFSET BLOCK2
AX, ES:[DI]
X1
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Conditional LOOPs
LOOPE/LOOPZ ( LOOP while equal)
 LOOP while CX  0 and ZF = 1
 Each time the LOOP instr executes - CX decremented
 If CX  0 & ZF = 1 execution will jump to destination specified
 If CX = 0 after auto decrement or ZF = 0 execution will go to
the next instruction
 Destination address must be within -128 bytes to +127 bytes
(short jump)
BITS Pilani, Pilani Campus
MOV BX, OFFSET ARRAY
DEC
BX
MOV CX, 100
NEXT: INC
CMP
BX
[BX], 0FFH
On exit from loop:
CX=0 and ZF=1all elements are equal to FFH
CX≠0 BX points to the first element that was not FFH
CX=0 and ZF=0last element was not FFH
LOOPE NEXT
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
LOOPNE/LOOPNZ
Loop While CX  0 and ZF = 0
MOV
DEC
MOV
NEXT: INC
CMP
LOOPNE
BX, OFFSET ARRAY
BX
On exit from loop:
CX=0 and ZF=0 0DH was not found in array
CX, 100
CX≠0 BX points to the first element that contains 0DH
CX=0 and ZF=1 the last array element was 0DH
BX
[BX], 0DH
NEXT
BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956
Multiply & Divide
BITS Pilani, Pilani Campus
MUL SOURCE
 Source times AL
 Source times AX
 Source can be a register or memory location
 Result for Byte multiplication in AX
 Result for Word multiplication in DX :AX
 CF and OF zero if MSB/MSW zero
 AF,PF,SF,ZF -undefined
BITS Pilani, Pilani Campus
MUL
BH
MUL
CX
MUL
BYTE PTR [BX]
MOV
AX, MULTIPLICAND _16
MOV
CL, MULTIPLIER _8
MOV
CH, 00H
MUL
CX
Multiplying byte with a word requires
the byte’s MSB to be filled with 0’s
BITS Pilani, Pilani Campus
.MODEL TINY
.DATA
MULTIPLICAND
MULTIPLIER
PRODUCT1
PRODUCT2
DW
DW
DW
DW
2040H
2000H
?
?
MOV
MUL
MOV
MOV
AX, MULTIPLICAND
MULTIPLIER
PRODUCT1, AX
PRODUCT2, DX
.CODE
.STARTUP
.EXIT
END
BITS Pilani, Pilani Campus
IMUL SOURCE
 Signed Multiplication
 Source times AL
 Source times AX
 Source can be a register or memory location
 Result for Byte multiplication in AX
 Result for Word multiplication in DX :AX
 CF and OF zero if MSB/MSW zero ---- allows the user to detect and perhaps
discard unnecessary leading zero’s in a result. If MSB and MSW contain part of the
result, then both CF=OF=1
 AF,PF,SF,ZF -undefined
BITS Pilani, Pilani Campus
IMUL
BH
IMUL
CX
IMUL
BYTE PTR [BX]
MOV
CX, MULTIPLICAND _16
MOV
AL, MULTIPLIER _8
CBW
IMUL
CX
BITS Pilani, Pilani Campus
DIV SOURCE
Divides UNSIGNED WORD by a BYTE
Divides UNSIGNED DWORD by a WORD
 Word/Byte
 Word in AX,
 Byte in Register/Memory location
 AL- quotient AH- reminder
 DWORD/WORD
To divide a byte by a byte, put the dividend byte in AL
and fill AH with 0’s
 DWORD in DX : AX
 Word in Register/Memory Location
 AX- Quotient DX- Reminder
All Flags undefined
BITS Pilani, Pilani Campus
IDIV SOURCE
SIGNED WORD/BYTE
SIGNED DWORD/WORD
Word/Byte
Dividend Word in AX,
Divisor Byte in Register/Memory location
AL- quotient
AH- reminder
DWORD/WORD
Dividend DWORD in DX : AX
Divisor Word in Register/Memory Location
AX- Quotient
DX- Reminder
To divide a byte by a byte, put the dividend byte in AL
and fill AH with copies of the sign bit from AL.
All Flags undefined- Sign of remainder same as dividend
BITS Pilani, Pilani Campus
INPUT AND OUTPUT INSTRUCTIONS
IN Accumulator, PORT
 Copy a data from a port to AL (if 8-bit port or I/O address is
read) or AX (if 16-bit port or I/O address is addressed)
 I/O ports are 8-bits in width so whenever a 16-bit port is accessed, two
consecutive 8-bit ports are actually addressed.
 Two formats possible
 Fixed port (the 8-bit address of a port is directly specified
in the instruction) and variable port ( the port address is
loaded into the DX register used to address the I/O device,
before the IN instruction)
– IN
AL, 00H
– IN
AX, 20H
BITS Pilani, Pilani Campus
Port address appear on the address bus during I/O operation
8-bit address zero extended
– IN AL, 06H
 Copies data from port and address appear as 0006H on (A0 to
A15)
 Other higher address undefined
BITS Pilani, Pilani Campus
Variable Port Addressing allows transfer between AL, AX and a
16-bit port address available in DX
DX can be changed by program control, giving a variable address.
Does not affect flags. Advantage over fixed-port addressing.
– MOV DX,0FF78H
– IN AL, DX
;initialize DX to point to port
; input a byte from 8 bit port FF78H to AL
– IN AX, DX
; input a word from 16-bit port FF78H(LSB)
;and FF79H (MSB)
BITS Pilani, Pilani Campus
OUT PORT, Accumulator
 Copies a byte from AL or a word from AX to the specified
port. Has two possible forms: fixed port and variable port.
 OUT 05H, AL
 OUT 03H, AX
 MOV DX, 0FFF8H
 OUT DX, AL
 OUT DX, AX
Fixed port
variable port
BITS Pilani, Pilani Campus
 Input a data from a port at address 05H.Input data is a valid
one digit BCD number. Use a lookup table to convert it into
seven segment code. Output to port 50H
BITS Pilani, Pilani Campus
a
f
g
b
c
e
h
d
Seven segment display
BITS Pilani, Pilani Campus
.Model Tiny
.DATA
TABLE
DB
DB
.CODE
.STARTUP
IN
LEA
MOV
ADD
MOV
OUT
.EXIT
END
3FH, 06H, 5BH, 4FH, 66H, 6DH
7DH, 07H, 7FH, 67H
----common cathode configuration
AL, 05H
SI, TABLE
BX,0
BL,AL
AL,[SI+BX]
50H,AL
BITS Pilani, Pilani Campus
XLAT
 Translate instruction used to translate a byte from one code
to another code.
 The instruction replaces a byte in the AL register with a byte
pointed to by BX in a lookup table in memory.
 Before using XLAT, the lookup table containing the values of new code is put in
memory
 Offset of the starting address of the table is loaded into BX
 Byte to be translated is put in AL
 To point to the byte in table, adds the contents of AL with BX to form a memory
address in data segment
 Copies the contents of this memory (BX + AL) into AL
BITS Pilani, Pilani Campus
.Model Tiny
.DATA
TABLE
DB
DB
.CODE
.STARTUP
IN
LEA
XLAT
OUT
.EXIT
END
3FH, 06H, 5BH, 4FH, 66H, 6DH
7DH, 07H, 7FH, 67H
AL, 05H
BX, TABLE
50H,AL
BITS Pilani, Pilani Campus
PUSH and POP Instructions
 Store and retrieve data from LIFO stack memory
 Two bytes involved
 Whenever data pushed into stack
 MSB moves into memory [SP-1]
 LSB moves into memory [SP-2]
 Contents of SP register decremented by 2
BITS Pilani, Pilani Campus
 Push source

Registers/Segment Register

Memory

Flag Register




PUSH
PUSH
PUSH
PUSH

PUSHF
AX
;decrement SP by 2, copy AX to stack
BX
SI
WORD PTR[BX] ; decrement SP by 2, copy word from
;memory in DS at [BX] to stack
BITS Pilani, Pilani Campus
70050H
SP:0050H SS:7000H
7004FH
AH
SP SP-2
7004EH
AL
7004EH  AX
7004DH
BH
SP SP-2
7004CH
BL
7004CH  BX
7004BH
SIH
SP SP-2
7004AH
SIL
7004AH SI
70049H
MEMH
SP SP-2
70048H
MEML
70048H MEM
70047H
FRH
70046H
FRL
SPSP-2
[004EH]
[004CH]
[004AH]
[0048H]
[0046H]
70046H  FLAGS
BITS Pilani, Pilani Campus
POP
 POP performs inverse of PUSH
 Takes data from stack to general purpose register, memory or segment
register
 Data popped in 16 bits
 First byte from stack to lower register
 Second byte to higher address
 SP = SP+2
– POP
AX
– POP
CX
– POP
WORD PTR[BX]
– POP CS is illegal
BITS Pilani, Pilani Campus
Q: Set the TRAP flag without changing any of the other flags
PUSHF
MOV BP,SP
INC BP
OR [BP],01H
POPF
BITS Pilani, Pilani Campus
Subroutines
BITS Pilani, Pilani Campus
CALL Instruction
 CALL instruction in the main line program loads the
Instruction pointer and in some cases also the Code Segment
register with the starting address of the procedure
 Next instruction fetched will be the first instruction of the
procedure
BITS Pilani, Pilani Campus
RET instruction at the procedure end , sends the execution back to the instruction
after the CALL instruction in the main line program
MAIN
Sub- Program
CALL
RET
BITS Pilani, Pilani Campus
CALL Stores the address of the instruction after CALL, into stack
( return address)
near CALL or
(IP saved)
far CALL
(CS and IP saved)
 RET inst retrieves the next address after CALL
 Back to IP or ( IP and CS)
BITS Pilani, Pilani Campus
DIRECT WITHIN –SEGMENT- NEAR CALL

RELATIVE DISPLACEMENT
 CALL LABEL
 IP
IP + d16 (signed displacement)
INDIRECT WITHIN SEGMENT- NEAR CALL

16-BIT IP REPLACED BY REGISTER / MEMORY LOCATION CONTENTS
 CALL BP
 CALL WORD PTR [BX]
 IP
reg16/mem16
BITS Pilani, Pilani Campus
DIRECT INTERSEGMENT FAR CALL
Both CS and IP needs to be changed
CALL IPL IPH CSL CSH
INDIRECT INTERSEGMENT FAR CALL
Two words taken From Memory
First word  IP , Second word  CS
CALL DWORD PTR [BX]
BITS Pilani, Pilani Campus
Instruction Timing and Delay Loops
BITS Pilani, Pilani Campus
Subroutine commonly used is delay subroutine
Software delays using LOOP
Delay required = 1ms =1000µs
8086 running on 5MHz clock- Each cycle is 0.2µs
 Total of 5000 clock cycles required=CT
Introduce the instructions:
MOV
X1:
CX,N
4 Cycles
NOP
3 Cycles
NOP
3 Cycles
LOOP X1
17 or 5 Cycles
BITS Pilani, Pilani Campus
Overhead = CO = 4
Number of cycles/loop = CL = 3+3+17 = 23
Number of times the loop runs = N
CT = C0 + N*CL – 12
5000 = 4 + N*23 –12
N = 218
BITS Pilani, Pilani Campus
Write an ALP that takes 100 data samples from input port, at
intervals of 1ms and masks the upper four bits of each sample
and puts each masked sample in successive memory locations
in ARRAY –using subroutines
BITS Pilani, Pilani Campus
In Assembly language programming, Procedures (subroutines)
begin with PROC directive and ends with ENDP directive
PROC directive is followed by the type of procedure:
NEAR or FAR
CALL
RET
instruction links to the procedure
instruction returns from the procedure
BITS Pilani, Pilani Campus
CALL
SUMS
_____
_____
SUMS PROC
ADD
ADD
ADD
RET
SUMS
NEAR
AX, BX
AX, CX
AX, DX
ENDP
BITS Pilani, Pilani Campus
.Model Tiny
.data
res
db
100 dup(0)
stack
dw
100 dup(?) ; get aside 100 words for stack
top_stack label
word
; give name to next location after last word in stack
.code
.startup
lea
sp, top_stack ; initialize stack pointer
lea
di, res
mov
cx,100
x1:
in
al, 05h
call
mask
call
delay
loop
x1
.exit
BITS Pilani, Pilani Campus
Mask
Mask
Delay
x2:
Delay
end
proc
and
stosb
ret
endp
near
al,0fh
proc
mov
nop
nop
loop
ret
endp
near
cx,217
call – 19
ret – 16
Overhead = CO = 4 +19+16
No. of cycles/loop
CL = 3+3+17 = 23
No. of times the loop runs = N
CT = C0 + N*CL – 12
5000 = 39 + N*23 –12
N = 217
x2
BITS Pilani, Pilani Campus