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Transcript
2.8 Integrators and Differentiators 2.8.1 The Inverting Configuration with General Impedances Vo ( s ) Z ( s) ï½ï 2 Vi ( s ) Z1 ( s ) (2.48) Example 2.6, p106 Sol) Vo ( s ) 1 ï½ï Vi ( s ) Z1 ( s )Y2 ( s ) Vo ( s ) ï R2 / R1 ï½ Vi ( s ) 1 ï« sC2 R2 Vo ( s ) ï½ ? * Is this STC circuit? Vi ( s ) * dc gain=?, 3 dB frequency=? * Design a circuit of dc gain=40 dB, 3 dB frequency=1 kHz, input resistance = 1 kΩ * Frequency of gain=1 and phase at this frequency Microelectronic Circuits - Fifth Edition Sedra/Smith Vo ( s ) 1 ï½ï R1 Vi ( s ) ï« sC2 R1 R1 K ï½ï R2 R1 ï·0 ï½ 1 C 2 R2 R2 ï½ 100, R1 ï½ 1 kï, R2 ï½ 100 kï R1 1 ï·0 ï½ 2ï° ï´ 1 ï´ 103 ï½ C2 ï½ 1.59 nF C2 ï´ 100 ï´ 103 -20dB roll off ï® f t ï½ 100 f 0 ï½ 100 kHz 40 dB = 100 V/V from Bode plots phase shift = -270o or +90o Copyright ï 2004 by Oxford University Press, Inc. 29
