Download Exp_8_FFT_Spring13b

Physics 3330
Experiment #8
Spring 2013
Field Effect Transistors and Noise
Purpose
In this experiment we introduce field effect transistors (FETs). We will measure the output
characteristics of a ‘junction’ FET (JFET), and then construct a common-source amplifier stage,
analogous to the common-emitter bipolar amplifier we studied in Experiment 7. JFET amplifiers
have superb low-noise performance and for that reason are often chosen as the first amplifier in a
chain of amplifiers when measuring very small signals. We will learn to measure amplifier noise
and will use our common-source amplifier to measure the thermal noise of a 5k resistor.
Introduction
As we discussed in Experiment 7, transistors are devices used to amplify electrical signals. They
come in two general types, bipolar junction transistors (BJTs) and field effect transistors (FETs).
The input to a FET is called the gate. (Remember from Experiment 7: the input to a BJT is called
the base.) But unlike the situation with bipolar transistors, almost no current flows into the gate.
FETs are voltage controlled current amplifiers with very high input impedance. (Remember from
Experiment 7: BJTs are current controlled current amplifiers.) In junction FETs (JFETs) the gate is
connected to the rest of the device through a reverse biased pn junction, while in metal-oxidesemiconductor FETs (MOSFETs) the gate is connected via a thin insulating oxide layer. JFETs
have much lower noise than MOSFETs but are more difficult to manufacture in integrated circuits.
Bipolar transistors come in two polarities called npn and pnp, and similarly FETs come in two
polarities called n-channel and p-channel.
In integrated circuit form, small MOSFETs are ubiquitous in digital electronics, used in everything
from simple logic circuits to the currently (2012) ~4 billion transistor Altera Stratix-V FPGA chip
or the ~16+ billion transistors 2GB memory chips. Small MOSFETs are also used in some opamps, particularly when very low supply current is needed, such as in portable battery-powered
circuits. Small discrete (single) MOSFETs are not normally used because they are extremely
fragile. Large discrete MOSFETs are used in all sorts of high power applications, including
commercial radio transmitters or audio amplifiers.
JFETs generate very little noise themselves, thus a JFET input op-amp is often the first choice for
low-noise amplification. Discrete JFETs are commonly seen in scientific instruments. In this
experiment we will study an n-channel JFET (the 2N4416A) with excellent low-noise performance.
Like bipolar transistors, JFETs suffer from wide “process spread”, meaning that critical parameters
vary greatly from part to part. We will start by measuring the properties of a single device so that
we can predict how it will behave in a circuit. Then we will build a common-source amplifier from
our characterized JFET, and check its quiescent operating voltages and gain.
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Noise is an important subject in electronics, especially for scientists who need to construct sensitive
instruments to detect small signals. Producing very low-noise amplifier systems is often the most
important step in a path-breaking physical measurement. Modern efforts to study quantum
mechanical effects in optical and electronic circuits begin by selecting amplifiers that are
themselves noise-limited by quantum mechanics. Some experiments are limited by external
interference that is not intrinsic to the measuring instrument. Indeed, in your measurements below,
you will see the importance of external interference from 60 Hz power in the lab. However, if
external sources can be shielded or removed (we will do so in the case of 60 Hz by using an
aluminum foil shield and battery power), there will still be noise generated by the measuring
electronics itself. The main sources of this noise are usually 1) the thermal noise of resistors, an
unavoidable consequence of thermodynamics and the Equipartition Theorem of statistical
mechanics, and 2) noise from the active components such as transistors. To introduce the subject of
noise we will first measure the noise of the lock-in amplifiers we have in the lab. Next, we will
reduce the effects of this noise by using our JFET common source amplifier as a low-noise preamplifier for the lock-in. Finally, we will use our JFET amplifier to measure the thermal noise of a
resistor.
Readings
1. FC Chapter 8 (Field effect transistor)
2. Amplifier and resistor noise is discussed in H&H sections 7.11-7.22.
3. Sections 3.01-3.10 of H&H introduce FETs and analog FET circuits. You might find that
this is more than you want or need to know about FETs.
4. Application Note AN101 “An Introduction to JFETs” from Vishay/Siliconix. There is a
link to it on our course web site. You will also find on our web site the data sheet for the
2N4416A, the n-channel JFET we will be using.
5. Read sections of the SR510 Lock-in manual that describe the noise performance of the
amplifiers (page 3) and the use of the rear Signal Monitor BNC output (page 13). Read the
section of the TDS3014B oscilloscope manual on using the Fast Fourier Transform under
the MATH button (page 39). Both manuals are on the website under the Useful Documents
tab.
6. If you are on campus you can read the original 1934 papers on resistor thermal noise by
Johnson and Nyquist. See the links on our web site.
Experiment #8
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Theory
VDS
ID
D
D
0 V to -5 V
G
G
S
(a)
S
(b)
Figure 8.1 a) N-channel JFET b) Measuring Output Characteristics.
Note that the gate voltage is negative.
JFET CHARACTERISTICS
The schematic symbol shown in Fig. 8.1a is used for the n-channel JFET. For the p-channel
version the arrow points the other way and all polarities discussed below would be reversed. The
three leads are gate (G), drain (D), and source (S). The path from drain to source through which the
output current normally flows is called the channel. In many ways, the gate, drain and source are
analogous to the base, collector and emitter of an npn transistor. However, in normal operation the
gate voltage is below the source voltage (this keeps the gate pn junction reverse biased) and almost
no current flows out of the gate. The voltage of the gate relative to the source (VGS) controls the
current that flows from drain to source through the channel.
For more detail, look at the Output Characteristics graphs on page 7.3 of the 2N4416A data sheet.
The drain-to-source current (ID) is plotted versus the drain-to-source voltage (VDS) for various
values of the controlling gate-source voltage (VGS). The JFET is normally operated with VDS
greater than about 3 V, in the “saturation region” where the curves have only a small slope as a
function of VGS. In this region the current is nearly constant (i.e. nearly independent of VDS), but
controlled by VGS. Thus the JFET can be viewed as a voltage-controlled current source. The gain
of a JFET is described by the transconductance gfs:
g fs 
I D
VGS
which tells us how much change in drain current results from a small change in the gate voltage.
Hence the transconductance is the slope of the ID vs. VGS curve, but this curve is often not plotted in
Experiment #8
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Spring 2013
the specifications and you may have to generate it yourself. This quantity is called a conductance
because it has the dimensions of inverse Ohms, and a transconductance because the current and
voltage are not at the same terminal. In the SI system 1/ is called a Siemens (S). According to the
data sheet, gfs is guaranteed to be between 4.5 and 7.5 mS at VGS = 0 for VDS = 15V. Since a
Siemens is an ampere per volt, this means that the drain current ID changes by 4.5 to 7.5 mA when
the gate voltage VGS changes by 1 volt.
Like the  or hFE of a bipolar transistor, gfs is not really a constant, and it has large process
variations. The transconductance only varies a little with VDS as long as VDS is greater than about
3V. The dependence on VGS is more rapid (see the plot on the data sheet). The transconductance
is maximum at VGS = 0. VGS  0 is where the best noise performance occurs, so you will build
your amplifier for this condition.
Other properties of the JFET also have large process variations. The saturation drain current IDSS is
the value of ID at VGS = 0 and some large value of VDS, usually 15 V. You can see that this
quantity is about 7 and 11 mA for the two devices in the plots at the bottom of page 7.3 of the data
sheet. According to the table on page 7-2, IDSS is guaranteed to be between 5 and 15 mA, a very
wide range for the designer to cope with. Another useful quantity is the gate-source cutoff voltage
VGS(off), the value of VGS where ID drops to zero. For the two devices on page 7.3 this is -2 V and
-3 V, but the data sheet only promises that it will be between -2.5V and -6V, again a very wide
range.
Because of the wide variation of JFET parameters, a good starting point for any JFET circuit
development is to plot your own output characteristic curves for the device at hand. There is an
instrument called a curve tracer that can do this for you automatically, but in this lab we will let you
do it once by hand, using the set-up shown in Fig. 8.1b on p. 8.3. The drain is connected to a
variable voltage source that controls VDS, and there is a current meter (ideally with zero voltage
drop across it) in series with the drain to measure ID. You also need a (negative) variable voltage
source between the gate and ground to set VGS. Finally, a voltmeter between the gate and ground is
used to measure VGS.
COMMON SOURCE AMPLIFIER
A JFET common-source amplifier stage is shown in Fig. 8.2. (Notice the similarities to a commonemitter amplifier based on a BJT.) To keep things simple we are supposing that the input signal has
a dc value of 0 V, so the desired quiescent gate voltage (VGS=0) is achieved without the need for a
dc blocking capacitor and a voltage divider like we used for our bipolar common-emitter amplifier.
A small change in the input voltage Vin ( = VGS in this circuit) causes a change in the drain
Experiment #8
8.4
Spring 2013
current equal to gfs× Vin, and this current dropped across the drain resistor RD causes an output
voltage Vout = -RD × gfs × Vin. Thus, the voltage gain of this stage is G = -RD × gfs. For typical
values of RD and gfs the gain of a single JFET common-source stage is in the range 5-20, much less
than the maximum gain possible with a bipolar common emitter stage.
Both the gain of this stage and the quiescent voltages suffer from wide process variations. These
variations can be reduced by adding a resistor to the source like we did for the bipolar version, and
sometimes this is done in practice, but not always, because the gain will then be even smaller.
Process variations of gain due to variations of gfs are often dealt with in practical circuits by
including the stage in a feedback loop. Then variations of gfs cause variations in the loop gain, but
not in the closed loop gain. For more info about JFET biasing and the effects of process variations,
see Application Note AN102 “JFET Biasing Techniques” from Vishay/Siliconix (linked at our
course web site).
VDD
RD
D
Vin
Figure 8.2
G
V
out
S
Common Source Amplifier Stage
The input resistance of this stage is essentially infinite (something like 1012 ) and the input
capacitance is around 10 pF. The output impedance is equal to the drain resistance RD, typically a
few thousand Ohms. Compared to the bipolar version, the JFET common-source stage has much
higher input impedance, lower gain, and comparable output impedance. We did not discuss the
noise of the bipolar common-emitter stage, but it’s worth knowing that the JFET common-source
stage has much lower noise than a typical BJT or MOSFET stage when the signal source impedance
is above about 10 k.
RESISTOR THERMAL NOISE
Every resistor in thermal equilibrium has a fluctuating voltage across it called Johnson noise. This
noise is an unavoidable consequence of the Equipartition Theorem of statistical mechanics. (See
any text on statistical mechanics for a discussion, or read the original papers by Johnson (the
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Spring 2013
experimenter) and Nyquist (the theorist), linked on our web site.) The Equipartition Theorem says
that ANY classical system that has ANY part of its energy that is quadratic in some quantity, will,
when in thermal equilibrium, also have random noise in the mean squared value of that quantity,
with mean energy equal to 12 kT . Here, k is Boltzmann’s constant and T is the absolute
temperature. The list of such quadratic energy terms is long, including for example kinetic energy
( 12 mv 2 , quadratic in velocity), potential energy of springs ( 12 kx 2 , quadratic in position), the electric
field energy stored in capacitors ( 12 CV 2 , quadratic in voltage), the magnetic energy stored in
inductors ( 12 LI 2 , quadratic in current), and on and on. The Equipartition Theorem would then say
that for a classical particle, we expect that the velocity jitters around due to random thermal energy,
and that the mean squared velocity along any particular direction would be given by 12 m v 2  12 kT
This random velocity appears as the Brownian motion of particles in thermal equilibrium.
Similarly, electronic components show such thermal noise. The random jittering of the electrons
inside a resistor are just thermally driven random currents and they lead to the appearance of a
thermally driven mean squared voltage across the resistor. We aim to observe this effect in this
experiment.
A circuit model for a noisy resistor is shown in Fig. 8.3.
v th
R
*
Figure 8.3
Noisy Resistor
The little circle with a star inside is a voltage source, but instead of generating a sine wave or a dc
voltage, it generates a mean-zero gaussian distributed random waveform, otherwise known as noise.
You might think we could describe this noise source by its standard deviation or rms voltage, but
that is not a well-defined quantity until we pass the noise waveform through a band-pass filter that
gives us well-defined bandwidth. This is because the noise waveform fluctuates at all frequencies
(that is, if we ignore quantum freeze-out at very high frequencies), but any time we observe it we
will do so with finite bandwidth. The rms voltage we read will increase as the bandwidth increases,
since we see more and more of the generated fluctuations. The mean-square fluctuations (called the
“noise power”) increase in proportion to the bandwidth, the absolute temperature T, and the
resistance R, so the rms fluctuations must increase as the square root of these quantities. Nyquist
derived the famous formula:
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vth  4kTR
where, as above, k is Boltzmann’s constant. (If you have already learned about the black-body
spectrum, then you know about a more complex example of the same thing. One can show that the
Nyquist formula is equivalent to the black body formula in one dimension.) The most common
units of vth are nV/ Hz (nano-volts per root hertz). To find the rms noise, you multiply vth by the
square root of the bandwidth you use to observe it. You can avoid having to plug numbers into
Nyquist’s formula if you can remember that a 60Ω resistor at 300 K generates 1 nV/ Hz of
Johnson noise.
Noise quantities with units like vth are called noise spectra, while the squares of these quantities are
called power spectral densities. Most noise spectra depend on frequency, but thermal noise does
not. By analogy to visible light we say that thermal noise has a white spectrum.
You can handle voltage noise sources in circuit calculations just like you would any other voltage
source. However, if there are several noise sources (say v1 and v2) contributing to the fluctuating
voltage at some point in the circuit you find the total noise spectrum v3 by adding the contributions
“in quadrature”:
v3 
v1 2  v2 2
or v3  v1  v2
The second form is just a short-hand for the first expression.
AMPLIFIER NOISE
Figure 8.4 shows a circuit model for an ideal voltage amplifier with noise sources. The triangle
represents a noise-less voltage amplifier with gain G and infinite input impedance. All of the
effects of the amplifier’s noise are represented by a voltage noise source with noise spectrum vn and
a current noise source with noise spectrum in. The units for amplifier voltage and current noise are
usually nV/ Hz and fA/ Hz (femto-amps per root hertz).
Experiment #8
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Spring 2013
vn
Vin
*
*
in
+
-
G
Vout
Figure 8.4 Noisy Voltage Amplifier
Suppose we connect a resistor R with thermal noise vth between ground and the input of this
amplifier. The total noise spectrum at the output will be:
vout  G  vth  vn  in R
The first term is the resistor thermal noise, which is an input signal from the amplifier’s point of
view. The second term is the amplifier voltage noise, and the third is the effect of the current
noise, which generates a voltage by driving current through the resistance R. All three terms are
added in quadrature (square root of the sum of the squares) and then multiplied by the amplifier
gain G. A complete model for the noise properties of an amplifier always requires both a voltage
noise source and a current noise source. The voltage noise source represents the noise present when
the amplifier input is shorted (R=0) while the current noise source represents noise currents that
flow in the input circuit and drive the impedance connected to the input.
Experiment #8
8.8
Spring 2013
Pre-Lab Problems
1.
Consider the common-source amplifier circuit of Fig. 8.2. Suppose you build this circuit with
the JFET used to generate the output characteristics shown in the 2N4416A data sheet, lower
right plot on page 7.3. If we use VDD = 15V, and we want VDS = 3 V at VGS = 0,
(A) what value of RD should we use? (B) What will the value of ID be? If VDD =10V, what
will ID be in this case?
2.
3.
Find the small-signal voltage gain of the common-source stage you designed in Problem 1 for
both VDD values (10V and 15V). Find any quantities you need from the lower right plot on
page 7.3 of the data sheet (do not use typical values given in the tables). Think carefully how
you will find ID/VGS.
(A) Assume for now that the output impedance of the common-source amplifier of Fig. 8.2 is
Rout = RD. If the initial output voltage is Vout,initial, what size load resistor RL (i.e. connected
between the output and ground) must one add in order to cause the output voltage to be
reduced to half its initial value (Vout,initial/2)? Motivate your reasoning with a circuit diagram to
receive any credit. For this circuit diagram, one may treat the amplifier as a black box with
input impedance Rin, gain G, and output impedance Rout = RD. (Remember the Thevenin
theorems?)
(B) Assume that Rin = 1012 Ohms. With no load attached, what size resistor would one have to
add in series with Vin in order to cause the output voltage to be reduced to have its initial value
(i.e. Vout,initial/2)? Again, motivate your explanation with a circuit diagram to receive any
credit.
(C) As in 3(B) above, assume that Rin = 1012 Ohms but you also know that the input
capacitance is ~3 pF at 1 MHz for VDS=3V. Considering this capacitance as well, what
resistor would one have to add in series with Vin in order to cause the output voltage to be
reduced to Vout,initial/2 when your input signal is a 1 MHz sine-wave? Again, motivate your
explanation with a circuit diagram to receive any credit.
4.
Suppose you measure the Johnson noise of a 5 k resistor, observing the fluctuations through
a 1 Hz bandwidth filter centered at 1 kHz. What rms voltage will you observe (expressed in
nV)? How about if the filter bandwidth is 10 Hz? Assume the temperature is 300 K.
5.
For the input amplifier on the SR510 lock-in amplifiers, look in the specifications section of
the manual and list the expected size of the voltage noise vn and current noise, in in the
frequency region near 1 kHz, which you’d use for the amplifier noise model shown in
Figure 8.4. Given the size of the Johnson noise of the 5k resistor from problem 4, answer the
following question: Will the 5k resistor noise be larger than the lock-in amplifier noise?
YES or NO??
Experiment #8
8.9
Spring 2013
Experiment
JFET OUTPUT CHARACTERISTICS
Use the same 2N4416A JFET for all of your experiments this week. (If you burn it up or swap it
for a new JFET, you have to redo your characterization due to the large process variations for these
parts.) Find the pin-out diagram on the data sheet, and build the circuit shown in Fig. 8.1b. (The
lead marked ‘C’ on the pin-out diagram is connected to the case. Leave it unconnected for now.)
Build your circuit on a smaller proto-board, one of the boards we’ve used for the LED transmitters
in Lab 6, rather than the regular proto-boards. The smaller boards will be easier to wrap with
aluminum foil electrostatic shielding later in the lab.
You can use one of your power supply outputs for the variable 0 to +15V drain to source voltage
and the other one for the variable 0 to - 5V gate to source voltage. (Warning: Do not apply a
voltage outside the range of 0 to -10V between the gate and source.) You could use your DMM to
measure the drain current and measure the gate voltage using an oscilloscope. As always, make sure
the oscilloscope displays a large enough vertical range to avoid large errors in the voltage reading.
1. Make plots of output characteristics (i.e. plot VDS vs. ID for different values of VGS) similar to
those shown in the data sheet (bottom of 7-3, top of 7-4) for VGS = 0, VGS = –0.1 V, and one
other value of VGS. Vary VDS from 0 to +15V. Each plot should have at least 4 points except
for the plot for VGS = 0, for that plot make sure that you have at least 8 points in the range of 3-7
Volts. (NOTE: As your transistor heats up due to the power you dissipate in it, the
characteristics will change. We want you to see this heating effect, not study it extensively.
During operation, your transistor will experience heating that will influence its behavior.
Interesting isn’t it?).
2. (A) Measure the values of VGS(off) and IDSS for your device. VGS(off) is the value of VGS where
ID drops to zero. IDSS is the approximate saturation value of ID at VGS = 0 V.
(B) Find gfs values for your device at VGS = 0 and for VDS = +3V and +15V using the graphs
from problem 1.
(C) Based on the values measured in 2A and 2B, does your device meet the specs given on page
7.2 of the data sheet?
COMMON-SOURCE AMPLIFER
Construct the common-source amplifier shown in Fig. 8.2. Keep all leads as short as possible
and add a blocking capacitor between VDD and ground, close to your transistor to avoid
parasitic oscillations. The gain bandwidth product of these JFETs is very large.
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Spring 2013
3. (A) Compute, using your characteristic curves, the value of RD that will give VDS = +3V at
VGS = 0 at VDD=18V, and also predict the small-signal voltage gain G. Find a metal-film resistor
close to your desired value of RD (or use several in series or in parallel) and measure the
resulting quiescent voltage VDS with the gate grounded.
(B) Is the value of VDS you observe consistent with your measured characteristics?
4. (A) Measure the small-signal gain G of your common-source stage at 1 kHz.
(B) Do you get the value you predicted? Normally, you will not, and the reason is that your
JFET amplifier has a transconductance that changes as you operate at different VDS values.
Double check that you are actually operating at a VDS value where you know the
transconductance. Varying VDD can be a quick way to change VDS without changing RD. If
your measured gain is still too small, consider the effects of the output resistance RO of the
JFET, which is the inverse of the slope of the ID versus VDS curve at the operating point.
Remember that the simple gain formula we have been using (G = -RD ∙ gfs) is only exact in the
limit RO >> RD. Is this a good approximation for your circuit?
(C) To avoid making this approximation, replace RD in the gain formula with the parallel
combination of RD and RO and recalculate gfs. In order to get and approximate value for RO
5.
6.
find the value of VDS in your circuit and use the data from section 1 with VGS = 0. Is the new
answer better?
(A) Apply a small 100 Hz sine-wave to the input of your amplifier and measure the amplitude
Vout. Now Place a 1 MOhm resistor in series with the input, and record any change in Vout.
What does the result imply about the input impedance of the amplifier? How does the input
impedance compare to that of the BJT common-emitter amplifier you built last week? How
does it compare to the input impedance of a non-inverting op-amp amplifier? Of an inverting
op-amp amplifier? Of your scope? Of your DMM? How would that change if you repeat the
same measurement at 1MHz instead of 100Hz? Explain what’s going on.
(B) Connect a load resistor with magnitude equal to 5∙RD between Vout and ground. Record
any changes in Vout. From this result, calculate the output impedance Rout of the amplifier.
Compare the result to the assumption that the output impedance Rout is the parallel combination
of RD and R0. How does the output impedance compare to that of the BJT common-emitter
amplifier you built last week? Of the output impedance of the op-amp circuits you built? Of
the synthesizer you use have used to apply signals to your circuits?
(A) Now replace the power supply with a pair of 9V alkaline batteries wired to give an 18V
battery power supply. Remove the bypass capacitor on the power line. It should not be
necessary for battery power and is a possible source of noise. Re-measure your static VDS and
reconfirm your amplifier gain with a 1 kHz sine wave. Generally double check that the
amplifier is working well. Disconnect your batteries until you are ready to use the amplifier.
Experiment #8
8.11
Spring 2013
NOISE OF THE LOCK-IN AND COMMON SOURCE AMPLIFIER
Now that you have a working common-source JFET amplifier, our goal in this section will be to
measure the thermal noise of a 5 kΩ resistor. The lock-in alone does not have low enough noise to
do the job alone (see Prelab Question 5), but we will be able to do it by using our JFET amplifier
together with the lock-in.
We will do the measurement by first measuring the noise of the amplifiers, and then measuring the
noise of the amplifiers with the 5k resistor on the input. We will use two different approaches,
both of which use the SR510 lock-in amplifier. In the first approach, we will use the lock-in and
the oscilloscope to measure the fluctuating voltages across a wide range of frequencies by using the
Fast Fourier Transform capability of the scope. In the second approach, we will use the lock-in
alone to measure the voltage noise power in a narrow bandwidth around a particular frequency.
We’ll hope that both approaches show us the same result.
MEASURING THE FREQUENCY SPECTRUM WITH LOCK-IN and OSCILLOSCOPE FFT
The lock-in has some very nice front-end amplifiers that are excellent for taking very small signals
and increasing them to the few volts range. There is also a SIGNAL MONITOR bnc connection on
the rear panel that can be very useful for looking at your signal after amplification, but before the
lock-in multiplies it by the standard square-wave. We will use the signal monitor output to study
the noise behavior of the amplifiers and your resistor.
Connect ‘minigrabber’ test leads to the lock-in A input using a BNC male-to-male adaptor, and
connect the two clips together so the lock-in input is shorted. Set your signal generator to 1050 Hz
and connect the SYNC output signal to the lock-in reference input. You should see the lock-in
‘unlock’ light go out. We use 1050 Hz to avoid interference from the 60 Hz harmonics likely to be
present at 1020 Hz and 1080 Hz in the narrow-band measurement described below. Set up the
lock-in as follows:
SIGNAL INPUTS: A
SENS.: 200 nV full scale
EXPAND: x1
BANDPASS: OUT
DYN. RES.: NORM
REL.: OFF
LINE: OUT
DISPLAY: NOISE
ENBW: 10 Hz
LINEx2: OUT
You may see the OVERLOAD red light come on at these high gain ranges. Give it a minute to go
out. If the overload light does NOT go out eventually, go to a less sensitive input range. Try to get
your range to at least 1 microvolt full scale.
Experiment #8
8.12
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Run a BNC cable from the lock-in rear panel SIGNAL MONITOR to CH1 of your oscilloscope.
Adjust the scope voltage scale so that you can see the signal well, usually around the 1V or 2V per
division scale. Set the trigger source to be LINE. Set the Trigger mode to be NORMAL. Set the
time scale to 20 msec per division. You should now see a noisy trace that pretty clearly is a
combination of 60 Hz, its harmonics, and random noise. The average signal should be near zero
volts, but with rms ‘fuzz’, and with regular 60 Hz and harmonics superposed. The SIGNAL
MONITOR output produces a 100mV amplitude wave if you provide a full-scale signal to the lockin input. Therefore, if you are set to the 200nV Sensitivity scale and provide a signal that causes a
200nV full-scale reading, the SIGNAL MONITOR would produce a 100mV amplitude wave.
Therefore, the gain of the SIGNAL MONITOR is 100mV/200nV = 500,000 for this case. Write the
gain of the SIGNAL MONITOR in your lab notebook. Now set the scope time base to 100msec
per division. Each time trace then has 1 second of data.
Press the scope Acquisition MENU button and select the Acquistion mode to Average 16. Set the
Horizontal Resolution to Normal (10k points). These selections will cause the scope to signal
average 16 time records, and to measure 10,000 data points in each time record. Since you are
taking 1 second of data, each data point in the trace is separated by 1/10,000 seconds or 0.1 msec.
In ‘Fourier space’, we expect that we can measure the frequency range from 1 Hz to 5kHz (the
Fourier upper frequency limit is 5kHz rather than 10kHz due to the Nyquist theorem that requires at
least two data points to identify a sine wave contribution).
Press the scope MATH button and select the FFT (Fast Fourier Transform). Select the FFT signal
source to be CH1, the FFT vertical scale to be dBV, and the FFT window to be HANNING.
You should now see both the time record of the signal coming from the lock-in SIGNAL
MONITOR (yellow trace), and the Fast Fourier Transform of that signal (red trace). The FFT is
showing you the root-mean-square amplitude of the sine wave contributions needed to reconstruct
the noisy time record at each of the resolved frequencies from 1 Hz out to 5 kHz. This information
is a valuable in helping you to understand your signals and noise sources.
When looking at the FFT, the horizontal scale knob on the scope and the horizontal offset knobs let
you zoom in on different regions of the spectrum. Zoom in on the low frequency end of the
spectrum, say from 1 Hz out to 400 Hz. Turn on the vertical cursors and find the peaks at 60 Hz,
180 Hz, and some of the other harmonics of 60 Hz. You should see peaks at each of these
frequencies. Plot the scope screen to record the FFT in this low-frequency region and put a copy
into your lab notebook.
Experiment #8
8.13
Spring 2013
Now go look at the region out near 1 kHz. Use the horizontal cursor to get a measurement of the
size of the typical spectral noise in dBV and in mV in this region. Divide the FFT spectral noise
signal by the gain of the SIGNAL MONITOR to determine how large it was before the amplifier,
and divide it by the square-root of the frequency spacing between data points (1 Hz if you are on
the 100msec/div time range for CH1, which is the bandwidth of each point) to get the noise referred
to the input. Write this result in nV/ Hz in your notebook. How does this result compare with the
specification for the lock-in input amplifier?
You will notice that the FFT displayed by the scope fluctuates with time. This is unavoidable when
measuring a statistical quantity (like the rms of noise) with a finite amount of data. You can try
using the cursors to measure the FFT mV amplitude many times and average them together to get a
better result. If you try this, be sure to take a measurement at some regular interval, say every 10
seconds, so as to produce unbiased data. Welcome to the world of Fourier spectra!
NARROW BAND MEASUREMENT WITH THE LOCK-IN
The FFT approach lets you see all the frequency contributions to the noise over a wide range of
frequencies. For measuring the noise in a narrow band, the SR510 lock-in has circuitry that can
measure the rms fluctuations at its output, divide this by the gain, and display the result as the
equivalent rms voltage fluctuations at the input. The bandwidth of this noise measurement (called
the ‘equivalent noise bandwidth’ or ENBW) is determined by output filtering built into the lock-in,
and it can be set to either 1 Hz or 10 Hz. The center frequency is determined by the frequency of
the reference applied to the lock-in.
Let’s quickly reproduce the results we’ve measured by FFT: We will again measure the noise of
the lock-in amplifier with its input shorted. Everything should already be set up, but verify that the
lock-in is set as follows:
SIGNAL INPUTS: A
SENS.: 200 nV full scale
EXPAND: x1
BANDPASS: IN
DYN. RES.: NORM
REL.: OFF
LINE: IN
DISPLAY: NOISE
ENBW: 10 Hz
LINEx2: IN
Verify that the ‘minigrabber’ test leads are connected to the lock-in A input using a BNC male-tomale adaptor, and connect the two clips together so the lock-in input is shorted. Set your signal
generator to 1050 Hz and connect the SYNC output signal to the lock-in reference input. You
should see the lock-in ‘unlock’ light go out. We use 1050 Hz to avoid interference from the 60 Hz
Experiment #8
8.14
Spring 2013
harmonics likely to be present at 1020 Hz and 1080 Hz.
Record the noise measured by the lock-in in nV rms. Convert this value to nV/ Hz using the
measurement bandwidth. How does your result compare with the specifications from the lock-in
manual for the front-end amplifier voltage noise? Is the lock-in noise small compared to the
thermal noise of a 5 kΩ resistor? How does the noise measured by the lock-in compare to the noise
you found from the FFT? They should be in rather close agreement.
Again, you will notice that the result displayed by the lock-in fluctuates with time. This is
unavoidable when measuring a statistical quantity (like the rms of noise) with a finite amount of
data. You can reduce the uncertainly in your measurement by averaging 10 readings of the display.
Be sure to make your measurements at definite times (like once every 10 seconds) so that you don’t
unconsciously select data to get a result you want.
(A detail: if you connect 5 kΩ to the lock-in input you will have a contribution from the lock-in
current noise in as well as from its voltage noise. We have only measured the voltage noise vn.
However, with R=5 kΩ the contribution of the current noise in∙R is small compared to the voltage
noise vn.)
MEASURING THE JFET AMPLIFIER NOISE
To reduce the input noise of your measurement system, we will now use your JFET amplifier as a
pre-amplifier for the lock-in. Verify that your battery power is re-connected. Then connect the
output of your JFET stage to the lock-in using the ‘minigrabbers’ (use the shortest possible leads to
help reduce interference). Short the gate of your JFET directly to the source using a short wire.
There should be no grounds connected to your JFET stage other than the connection to the ground
side of the lock-in input.
At this point, the lock-in will almost certainly indicate that it is OVERLOADed. Decrease the
lockin sensitivity to the 2 microvolt or even the 5 microvolt scale and the overload should go out in
a short period of time. Bummer! You just lost a factor of ten or more in your lock-in… Look at
the Signal Monitor behavior on the oscilloscope and you will probably see that it is very noisy and
likely has large amounts of 60 Hz and harmonics. Play with it a bit just to confirm that things really
look awful. You are seeing the effects of external signal sources that are dominating the behavior
of your sensitive JFET amplifier. That’s how it goes with sensitive equipment.
Now, let’s fix it.
Experiment #8
8.15
Spring 2013
Figure 8.5. Left) Picture of a JFET amplifier on a small proto-board, with battery power, and an
open aluminum foil Faraday cage. Right) Aluminum foil closed and grounded. The aluminum foil
is attached to the ground at the lock-in. By putting your amplifier inside this layer of aluminum,
you are providing a metal surface where externally created electric field lines e.g., from the room
lights and local electrical equipment on the bench, can terminate, rather than terminating on your
circuit. That decreases the coupling between you amplifier and the noisy outside environment.
Find the box of aluminum foil in the lab. Tear off a piece that is large enough to allow you to
completely wrap your amplifier and proto-board. See Figure 8.5 for an example. Use a small piece
of paper to insulate the circuit wires from the aluminum foil, wrap the entire board with a layer of
foil, leaving a place for the minigrabbers to exit the bag to the lock-in. Seal up the edges of the bag
and use a small piece of electrical tape to hold part of the bag against the outside of Input A on the
lockin. You have just made a ‘Faraday cage’ to hold your amplifier.
The aluminum bag should vastly improve the behavior of the JFET/lock-in system. You should
now see on the oscilloscope that the 60 Hz and harmonics are almost completely gone. You should
be able to get the lock-in to work on at least the 500nV sensitivity range without overloads. Try not
to bump the bag (you’ll see an overload if you do… it’s very sensitive) and try to get your
neighbors to quiet down and now bump the tables.
Record the rms noise again from the FFT in this configuration. To find the input voltage noise vn
of the lock-in/JFET amplifier combination, you have to divide the displayed rms voltage by the
square root of the measurement bandwidth and by the combined gain of your lockin/JFET common
source stage system i.e., the lockin gain multiplied by the JFET common source amplifier gain.
The result you obtain should be equal to the input voltage noise of a 2N4416A (about 3 nV/ Hz at
1 kHz), plus small contributions from other sources. Is the amplifier noise now small compared to
the thermal noise of a 5 kΩ resistor?
Experiment #8
8.16
Spring 2013
Record the rms noise measured by the lock-in in this configuration. To find the input voltage noise
vn of the lock-in/JFET amplifier combination, you have to divide the displayed rms voltage by the
square root of the measurement bandwidth and by the gain of your JFET common source stage.
The result you obtain should be equal to the input voltage noise of a 2N4416A (about 3 nV/ Hz at
1 kHz), plus small contributions from other sources. Is the amplifier noise now small compared to
the thermal noise of a 5 kΩ resistor? Does the lock-in noise measurement agree with the FFT?
(Some more details: Because noise sources add in quadrature the amplifier noise does not have to
be much smaller than the resistor noise. If the amplifier noise is 30% of the resistor noise it only
makes a 4% contribution to the quadrature sum. Again, we have only measured vn, not both vn and
in. But the JFET current noise in is very small, about 1 fA/ Hz , so the current noise contribution
in∙R to the total noise at the input is only 5 pV/ Hz for R=5 kΩ. The lock-in input noise is still
present, but it now has a much smaller effect because it is divided by the gain of the JFET stage.)
A comment on ‘1/f noise’ or ‘flicker noise’: These are names for noise from occasional ‘popping’
or bumping, sometimes from known sources, like your neighbors hitting the workbench, sometimes
from unknown sources. Popping often happens in the ‘parameters’ that we normally think of as
fixed for all time. For example, we think of VDD as a fixed voltage. However, as the batteries run
down, VDD can change. Often, the changes are not smooth. As the chemicals in the batteries
convert and the batteries run down, often the changes are sudden pops to lower voltage. Inside the
JFET, the current through the channel is controlled by the gate voltage, because it influences the
distribution of charge near the channel. Sometimes a free electron will get trapped in a quantum
state, and it will cause a change in the charge distribution. It’s a pop. This type of noise often
causes the frequency spectrum at low frequencies to increase, because the popping tends to be
random, but more likely for longer times (the increase as you go to lower frequency tends to go like
1/f in the power spectrum, hence the name). Such popping should not change the spectrum out at
frequencies like 1 kHz for the JFET we are using. However, they are the overwhelming source of
noise in MOSFETs. Look for popping. If you see it, expect that it may change the noise results,
especially from the lock-in, especially if the popping is enough to cause overloads.
Experiment #8
8.17
Spring 2013
THERMAL NOISE OF A RESISTOR
Now connect a 5 kΩ resistor between the gate and source of your JFET. Connect it directly from
gate to source and trim the resistor’s leads to reduce your sensitivity to interference. Measure the
total noise at the input in nV/ Hz using both the FFT and the lock-in noise readout as above.
Does the measured thermal noise of the resistor agree with Nyquist’s formula? If it makes a
significant difference (within the uncertainties of your measurement), you can subtract off (in
quadrature) the amplifier noise contribution to the total noise to obtain the resistor noise alone.
Since the Nyquist formula is a result of statistical mechanics, it is as reliable as any physical theory
can be. Therefore, if you trust your measurement, you can turn things around and use the measured
resistor thermal noise and the Nyquist formula to measure the absolute temperature of the resistor.
You have made a noise thermometer. For a project, you can imagine getting some liquid nitrogen,
and see if you can measure the decrease in noise as you cool the resistor!
Experiment #8
8.18
Spring 2013
COMMENTS ON NOISE MEASUREMENTS
In this experiment we have ‘walked you through’ a noise measurement, being careful to avoid a
number of pitfalls that can cause plenty of trouble for the unwary. Making noise measurements and
debugging circuits that are supposed to be low-noise but aren’t can be a tricky business. Almost
every part is a potential source of noise and every noise signal looks pretty much the same, so it is
not easy to tell where extra noise is coming from. Here are some things to consider if you get more
deeply involved in electronic noise:
1) Get a spectrum analyzer (H&H 15.18) and use it to measure noise instead of a scope FFT or the
lock-in. A spectrum analyzer displays the full frequency dependence of the noise spectrum and
with more control than is available from the canned FFT. It gives you a chance to distinguish
different noise sources and helps to avoid confusion from interference.
2) Most power supplies are noisy, and they often involve ground connections that you would be
better off without. Rechargeable lead-acid gel batteries are good low-noise power supplies. For
safety be sure to use a fuse on any battery larger than about 1 A-hr capacity.
3) Use metal shielded test enclosures. We got away aluminum foil shielding in this experiment,
but a real metal box is often a better idea.
4) All passive components generate thermal noise, not just resistors. Remember that little resistor,
r, used to represent the loss in the inductor we made in Experiment 3? It generates thermal noise,
and so do the losses in capacitors. Electrolytic power capacitors are especially bad in this regard.
5) A resistor with a bias current flowing through it is not in thermal equilibrium, so it is allowed to
generate more than just the Nyquist thermal noise. In fact, carbon resistors can be pretty bad (see
H&H Section 7.11). To preserve your sanity, use only metal-film resistors in low-noise circuits
(1% resistors are usually metal-film).
Experiment #8
8.19
Spring 2013