Download Figure Q5 - University of Brighton

University of Brighton
EO316
SCHOOL OF ENGINEERING
MODULAR HONOURS DEGREE COURSE
LEVEL 3
SEMESTER 1/2
2003/2004
Module EO316: Power Electronics
Examiner: Dr. B.Baha
Attempt Three questions only
Time Allowed: 2 Hours
Total number of questions = 5
All questions carry equal marks.
The figures in brackets indicate the relative weighting of part of a question.
Special requirement: None.
1.
(a) With the aid of block diagrams, discuss a typical power electronic system and hence
identify the main components, which are used in such a system.
(3)
(b) In a step down dc-dc converter the input voltage is 20 V and the switch duty ratio D =
0.45, the switching frequency is 300 kHz and the resistive load dissipates 240 W.
(i)
Draw the basic circuit diagram of this topology.
(3)
(ii)
Calculate the voltage and current associated with the filter inductor L and the current
through the output capacitor C if Vo = 15 V, L = 1. and C = F.
(10)
2)
(iii)
Sketch the voltage and current waveforms associated with the filter inductor L and
the current through the output capacitor C.
(6)
(iv)
Estimate the peak-peak value of the ripple voltage across the capacitor, which was
initially, assumed zero.
(3)
a)
Semiconductor devices are divided into two categories; current-controlled and voltagecontrolled devices. Discuss the advantages and disadvantages of each class and give an
example of each .
(5)
b)
A boost dc-dc converter transfer energy from a 28 V supply to a 40 V source. The related
output load is 27 W and the switching frequency is 35 kHz.
(i)
With the aid of basic circuit diagram, explain how the boost dc-dc operates during a
complete switching cycle.
(7)
(ii)
Calculate the semiconductor switch duty cycle ratio (D)?
(3)
(iii)
Calculate the value of inductor used in this dc-dc converter for the converter to operate
in the continuous conduction mode (CCM)?
(7)
(iv)
Determine the output capacitor value needed in this dc-dc converter if
Vo
= 52%.
Vo
(3)
3.
(a) Discuss the main objectives of performing a small-signal and close-loop simulation of a power
electronics system.
(4)
(b) Semiconductor devices are integral part of any switched mode power electronic circuit and
Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) are often used for such
applications. The data-sheet of such a MOSFET specifies the following switching times
corresponding to the linearized characteristics.
Current rise time tri= 100 ns,
Voltage fall time tfv = 50 ns
Voltage rise time trv = 100 ns
Current fall time tfi = 200 ns
(i)
Plot the current and voltage waveforms of such a device in a complete switching cycle. (5)
(ii)
Calculate the power loss of this MOSFET if it is used in a circuit that includes a dc power
supply of 300 V and a resistor of 75 with a switching frequency of 100 kHz.
(iii)
(13)
Discuss the importance of reverse recovery time (Trr) of a diode in a switched mode power
electronic circuit.
(3)
4.
a)
Identify the desirable features of a control loop for a Switched Mode Power Supply
(SMPS) and what are the possible disturbances in a SMPS circuit.
(4)
b)
A complete switched mode power supply can be represented by the by the control system
shown in Figure Q4a. Explain the function of each block in this control system and hence
determine the transfer function of the PWM controller.
(8)
Error amplifier
+
V ref
Verror
PWM controller
vc
dc-dc converter
d
-
Figure Q4a
c)
A possibility to optimize the above control system is to use the compensation network
shown in Figure Q4b. Derive the transfer function of this circuit and hence determine the
values of R3, C3, R4, and C4 in which the frequencies of zero and pole are given as
follows:
fz1 = 1.57 kHz , fp1 = 157 kHz
d)
(10)
Explain the limitation of the bandwidth for the control loop for a SMPS and what the
maximum bandwidth limit may be?
(3)
C3
C4
Voa
R4
R3
+
Vr
Figure Q4b.
Vf
vo
5.
a) Discuss the disadvantages of PWM d-dc converters operating at higher frequencies and suggest
possible solutions to overcome these shortcomings.
(3)
b) Draw the topological circuit diagram of a PWM step-down dc-dc converter operating in
discontinuous conduction mode (DCM) and sketch the important major voltage and
current waveforms. Derive the relationship that proves that the dc gain is given by:
Vo
2D
=
Vi D + D2 + 8L/RT
(13)
Where,
Vo is the output voltage
Vi is the input voltage
D is the duty cycle of the active switch
T is the switching Period
L is the Inductor
R is the load resistor.
c)
The input voltage Vs to the circuit shown in Figure Q5 is a step of 350 V dc voltage having a
series resistor R =5  to limit the maximum current through the capacitor to 500 A. Determine
the values of snubber inductance if the maximum permitted vales of diT/dt and dVT/dt are
350A/s and 350 V/s. Ignore the switching time.
(6)
Where, diT/dt and dVT/dt are the rate of changes of the current through switch and voltage
across the switch respectively.
d) Determine the snubber losses and the power dissipated of the snubber resistor if the frequency of
Vs is 3 kHz.
(3)
L
Vs
Cs
T
Rs
R
Figure Q5