Application Note Designing VME Power Systems from Standard
... input transients which extend both above and below the operating range of the DC-DC converter, such as in MILSTD-1275. The first stage is the transient protection function which activates when the input voltage exceeds the input range of the DC-DC converter. Low energy spikes such as the ±250V spike ...
... input transients which extend both above and below the operating range of the DC-DC converter, such as in MILSTD-1275. The first stage is the transient protection function which activates when the input voltage exceeds the input range of the DC-DC converter. Low energy spikes such as the ±250V spike ...
Low Cost, Precision JFET Input Operational Amplifiers / ADA4000-1
... precision, very low bias current, and low power. Combining high input impedance, low input bias current, wide bandwidth, fast slew rate, and fast settling time, the ADA4000-1/ADA40002/ADA4000-4 are ideal amplifiers for driving analog-to-digital inputs and buffering digital-to-analog converter output ...
... precision, very low bias current, and low power. Combining high input impedance, low input bias current, wide bandwidth, fast slew rate, and fast settling time, the ADA4000-1/ADA40002/ADA4000-4 are ideal amplifiers for driving analog-to-digital inputs and buffering digital-to-analog converter output ...
Rev. B - Analog Devices
... 2 kV HBM (ANSI/ESD STM5.1-2001) 200 V MM (ANSI/ESD STM5.2-1999) 1 kV FICDM (ANSI/ESD STM5.3.1-1999) ...
... 2 kV HBM (ANSI/ESD STM5.1-2001) 200 V MM (ANSI/ESD STM5.2-1999) 1 kV FICDM (ANSI/ESD STM5.3.1-1999) ...
LowXsupplyXopamps
... The complementary input Opamp discussed in the above paper is shown in figure 4. The input of this Opamp has both an NMOS and a PMOS differential pair. In effect, there are two Opamps at the input, as shown in figure 5. The output signals from these Opamps are then summed together using a class-AB o ...
... The complementary input Opamp discussed in the above paper is shown in figure 4. The input of this Opamp has both an NMOS and a PMOS differential pair. In effect, there are two Opamps at the input, as shown in figure 5. The output signals from these Opamps are then summed together using a class-AB o ...
AD9230 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog
... differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing. Fabricated on an advanced CMOS process, the AD9230 is availabl ...
... differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing. Fabricated on an advanced CMOS process, the AD9230 is availabl ...
MAX1198 Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC General Description
... structure allows the use of this internal or an externally applied reference, if desired, for applications requiring increased accuracy or a different input voltage range. The MAX1198 features parallel, CMOS-compatible threestate outputs. The digital output format can be set to two’s complement or s ...
... structure allows the use of this internal or an externally applied reference, if desired, for applications requiring increased accuracy or a different input voltage range. The MAX1198 features parallel, CMOS-compatible threestate outputs. The digital output format can be set to two’s complement or s ...
RESET MAX1947 Low Input/Output Voltage Step-Up DC-DC Converter with
... voltages down to 0.7V. An internal synchronous rectifier reduces cost by eliminating the need for an external Schottky diode and improves overall efficiency by reducing losses in the circuit. The efficiency is further ...
... voltages down to 0.7V. An internal synchronous rectifier reduces cost by eliminating the need for an external Schottky diode and improves overall efficiency by reducing losses in the circuit. The efficiency is further ...
octal general-purpose interface bus transceiver
... The SN75160B 8-channel general-purpose interface bus (GPIB) transceiver is a monolithic, high-speed, low-power Schottky device designed for two-way data communications over single-ended transmission lines. It is designed to meet the requirements of IEEE Standard 488-1978. The transceiver features dr ...
... The SN75160B 8-channel general-purpose interface bus (GPIB) transceiver is a monolithic, high-speed, low-power Schottky device designed for two-way data communications over single-ended transmission lines. It is designed to meet the requirements of IEEE Standard 488-1978. The transceiver features dr ...
MAX14525 Battery Switch with Four Enable Inputs General Description Features
... Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings ...
... Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings ...
MAX3981 3.125Gbps XAUI Quad Cable Equalizer General Description Features
... circuitry, four matched equalizers, and one equalizer control loop. The four equalizers are made up of a master equalizer and three slave equalizers. The adaptive control is generated from only channel 1. It is assumed that all channels have the same characterization in frequency content, coding, an ...
... circuitry, four matched equalizers, and one equalizer control loop. The four equalizers are made up of a master equalizer and three slave equalizers. The adaptive control is generated from only channel 1. It is assumed that all channels have the same characterization in frequency content, coding, an ...
An example of positive feedback op amp circuit: Schmitt Trigger In
... The first stage will amplify the offset by a factor of 100 generating a DC level of 200 mV at node X. At this point, the second stage amplifies VX by another factor of 100, attempting to generate Vout=20V. Since the op amps have a supply voltage of 3V the Vout cannot exceed this value and the second ...
... The first stage will amplify the offset by a factor of 100 generating a DC level of 200 mV at node X. At this point, the second stage amplifies VX by another factor of 100, attempting to generate Vout=20V. Since the op amps have a supply voltage of 3V the Vout cannot exceed this value and the second ...
12-Bit ADC in 6-Lead SOT-23 AD7476-EP
... Power Supply Input. The VDD range for the AD7476-EP is from 2.35 V to 5.25 V. Analog Ground. Ground reference point for all circuitry on the part. All analog input signals should be referred to this GND voltage. Analog Input. Single-ended analog input channel. The input range is 0 V to VDD. Serial C ...
... Power Supply Input. The VDD range for the AD7476-EP is from 2.35 V to 5.25 V. Analog Ground. Ground reference point for all circuitry on the part. All analog input signals should be referred to this GND voltage. Analog Input. Single-ended analog input channel. The input range is 0 V to VDD. Serial C ...
operational amplifier - EECS: www
... amplifiers and a smattering of the various configurations that they can be used in. Apart from their most common use as amplifiers (both inverting and non-inverting), they also find applications as buffers (load isolators), adders, subtractors, integrators, logarithmic amplifiers, impedance converte ...
... amplifiers and a smattering of the various configurations that they can be used in. Apart from their most common use as amplifiers (both inverting and non-inverting), they also find applications as buffers (load isolators), adders, subtractors, integrators, logarithmic amplifiers, impedance converte ...
AD7538 数据手册DataSheet 下载
... compatible. All logic inputs are static protected MOS gates with typical input currents of less than 1 nA. To minimize power supply currents, it is recommended that the digital input voltages be driven as close as possible to 0 V and 5 V logic levels. UNIPOLAR BINARY OPERATION (2-QUADRANT MULTIPLICA ...
... compatible. All logic inputs are static protected MOS gates with typical input currents of less than 1 nA. To minimize power supply currents, it is recommended that the digital input voltages be driven as close as possible to 0 V and 5 V logic levels. UNIPOLAR BINARY OPERATION (2-QUADRANT MULTIPLICA ...
ST485ERB
... The ST485ERB is designed for bi-directional data communications on multipoint bus transmission line (half-duplex applications). ...
... The ST485ERB is designed for bi-directional data communications on multipoint bus transmission line (half-duplex applications). ...
±80°/sec Yaw Rate Gyroscope with SPI ADIS16080 FEATURES
... complete angular rate sensor with an integrated serial peripheral interface (SPI). The digital data available at the SPI port is proportional to the angular rate about the axis that is normal to the top surface of the package (see Figure 20). A single external resistor can be used to increase the me ...
... complete angular rate sensor with an integrated serial peripheral interface (SPI). The digital data available at the SPI port is proportional to the angular rate about the axis that is normal to the top surface of the package (see Figure 20). A single external resistor can be used to increase the me ...
TapTation - The Tone God
... BS170) placed in series with the MCP4110 digital potentiometer connecting to ground services as an element to adjust the delay time. The Tempo PWM Output provides a signal that can drive the MOSFET adjusting the ground connection in a ramping fashion thus providing a smooth pitch modulation. Placin ...
... BS170) placed in series with the MCP4110 digital potentiometer connecting to ground services as an element to adjust the delay time. The Tempo PWM Output provides a signal that can drive the MOSFET adjusting the ground connection in a ramping fashion thus providing a smooth pitch modulation. Placin ...
Document
... Fig. 13.16 Proper transistor sizing for a four-input NOR gate. Note that n and p denote the (W/L) rations of QN and QP, respectively, of the basic inverter. ...
... Fig. 13.16 Proper transistor sizing for a four-input NOR gate. Note that n and p denote the (W/L) rations of QN and QP, respectively, of the basic inverter. ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.