OPA1013 Precision, Single-Supply DUAL OPERATIONAL AMPLIFIER FEATURES
... speed is not required. Sometimes, in fact, the low offset and docile characteristics of the OPA1013 may simplify the design of comparator circuitry. The two op amps in the OPA1013 use completely independent bias circuitry to avoid interaction when the inputs are over-driven. Driving one op amp into ...
... speed is not required. Sometimes, in fact, the low offset and docile characteristics of the OPA1013 may simplify the design of comparator circuitry. The two op amps in the OPA1013 use completely independent bias circuitry to avoid interaction when the inputs are over-driven. Driving one op amp into ...
Evaluates: MAX1856 MAX1856 Evaluation Kit SLIC Power Supply General Description
... The MAX1856 EV kit features a synchronous mode that enables the operating frequency to be controlled by an external clock. To utilize the sync mode, remove the shunt on jumper JU1, and connect an external frequency source to the SYNC/SHDN pad. Select R8 as: R8 (ROSC ) = ...
... The MAX1856 EV kit features a synchronous mode that enables the operating frequency to be controlled by an external clock. To utilize the sync mode, remove the shunt on jumper JU1, and connect an external frequency source to the SYNC/SHDN pad. Select R8 as: R8 (ROSC ) = ...
DC to DC Converter (Switched Mode Power Supply) Design
... where V is the voltage across the inductor (in Volts), L is the inductance value (in Henries), di is the change in current (in Amps) and dt is the change in time (in seconds). Thus if a fixed voltage is applied to an inductor (of fixed value) this generates a current through the inductor that ramps ...
... where V is the voltage across the inductor (in Volts), L is the inductance value (in Henries), di is the change in current (in Amps) and dt is the change in time (in seconds). Thus if a fixed voltage is applied to an inductor (of fixed value) this generates a current through the inductor that ramps ...
MAX6381XR25D1+T中文资料
... Many ?P-based products require manual reset capabil-ity, allowing the operator, a test technician, or externallogic circuitry to initiate a reset. A logic low on MRasserts reset. Reset remains asserted while MRis low,and for the reset active ...
... Many ?P-based products require manual reset capabil-ity, allowing the operator, a test technician, or externallogic circuitry to initiate a reset. A logic low on MRasserts reset. Reset remains asserted while MRis low,and for the reset active ...
Application notes AN1015 current loop output
... calibration error reduced. However, the circuitry has been consciously built around OP1 for two main reasons. On the one hand its internal high impedance input resistors do not burden the signal source. On the other hand, with OP1 acting as an impedance converter, the effect of the input resistor (i ...
... calibration error reduced. However, the circuitry has been consciously built around OP1 for two main reasons. On the one hand its internal high impedance input resistors do not burden the signal source. On the other hand, with OP1 acting as an impedance converter, the effect of the input resistor (i ...
CPU
... unit in a computer containing the logic circuitry that performs the instructions of a computer's programs • CPU is the "brain" of the computer. Its function is to execute programs stored in the main memory by fetching their instructions, examining them, and then executing them one after another. ...
... unit in a computer containing the logic circuitry that performs the instructions of a computer's programs • CPU is the "brain" of the computer. Its function is to execute programs stored in the main memory by fetching their instructions, examining them, and then executing them one after another. ...
AD7677 - Analog Devices
... Bit 0 and Bit 1 of the Parallel Port Data Output Bus. When SER/PAR is HIGH, these outputs are in high impedance. When SER/PAR is LOW, these outputs are used as Bit 2 and Bit 3 of the Parallel Port Data Output Bus. When SER/PAR is HIGH, EXT/INT is LOW and RDC/SDIN is LOW, which is the serial master r ...
... Bit 0 and Bit 1 of the Parallel Port Data Output Bus. When SER/PAR is HIGH, these outputs are in high impedance. When SER/PAR is LOW, these outputs are used as Bit 2 and Bit 3 of the Parallel Port Data Output Bus. When SER/PAR is HIGH, EXT/INT is LOW and RDC/SDIN is LOW, which is the serial master r ...
PowerPoint-Präsentation
... Activation of 24 V DC enclosure light when door is open (230 V available as option) Deactivation of cooling unit when door is open Economical solution for individual enclosures Extendible thanks to CAN bus sensors Optional access system for enclosure ...
... Activation of 24 V DC enclosure light when door is open (230 V available as option) Deactivation of cooling unit when door is open Economical solution for individual enclosures Extendible thanks to CAN bus sensors Optional access system for enclosure ...
View - Onset Computer Corporation
... transducer is longer than one meter (3.3 feet), you may add a matching cabling length of up to 3.7 meters (12 feet). ...
... transducer is longer than one meter (3.3 feet), you may add a matching cabling length of up to 3.7 meters (12 feet). ...
Programmable AC Current Transducer
... (after installation USB connection is not possible any more). Additional USB 2.0 interface can only be used for a fast setup without need for auxiliary power supply. This interface is NOT galvanically isolated from analogue output and can be used ONLY unconnected to aux. supply and measuring ...
... (after installation USB connection is not possible any more). Additional USB 2.0 interface can only be used for a fast setup without need for auxiliary power supply. This interface is NOT galvanically isolated from analogue output and can be used ONLY unconnected to aux. supply and measuring ...
LDS8845 - IXYS Power
... For applications with only two or three LEDs, unused LED can be disabled via the appropriate CTRL pins logic states. For applications requiring 1 LED only, the unused LED pins should be tied to VOUT . However, we recommend use of all channels connecting them in parallel with accordingly decreased cu ...
... For applications with only two or three LEDs, unused LED can be disabled via the appropriate CTRL pins logic states. For applications requiring 1 LED only, the unused LED pins should be tied to VOUT . However, we recommend use of all channels connecting them in parallel with accordingly decreased cu ...
1.1 TMACS/mW Load-Balanced Resonant Charge
... scaling have contributed remarkable savings in power, but are approaching physical limits as silicon technology enters the nano-regime and voltages approach thermal noise limits [1]. Adiabatic and reversible computing have been introduced as a means to overcome the CV dd2 dynamic energy dissipation ...
... scaling have contributed remarkable savings in power, but are approaching physical limits as silicon technology enters the nano-regime and voltages approach thermal noise limits [1]. Adiabatic and reversible computing have been introduced as a means to overcome the CV dd2 dynamic energy dissipation ...
