LMC555 CMOS Timer (Rev. M)
... cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10 µs before the end of the timing interval. However the circuit can be reset during this time by the application of a negative pulse to the re ...
... cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10 µs before the end of the timing interval. However the circuit can be reset during this time by the application of a negative pulse to the re ...
MAX6782–MAX6790 Low-Power, 1% Accurate, Dual-/Triple-/Quad-Level General Description
... single package with factory-set (0.5%, 5%, 10%) or adjustable hysteresis. The MAX6784/MAX6785 provide three battery monitors with factory-set (0.5%, 5%, 10%) or adjustable hysteresis. The MAX6786/MAX6787/ MAX6788 offer two battery monitors with external inputs for setting the rising and falling thre ...
... single package with factory-set (0.5%, 5%, 10%) or adjustable hysteresis. The MAX6784/MAX6785 provide three battery monitors with factory-set (0.5%, 5%, 10%) or adjustable hysteresis. The MAX6786/MAX6787/ MAX6788 offer two battery monitors with external inputs for setting the rising and falling thre ...
AD9214 数据手册DataSheet下载
... Reference Mode Select Pin for the ADC. This pin is normally connected externally to AGND, which enables the internal 1.25 V reference, and configures REF (Pin 4) as an analog reference output pin. Connecting REFSENSE externally to AVDD disables the internal reference, and configures REF (Pin 4) as a ...
... Reference Mode Select Pin for the ADC. This pin is normally connected externally to AGND, which enables the internal 1.25 V reference, and configures REF (Pin 4) as an analog reference output pin. Connecting REFSENSE externally to AVDD disables the internal reference, and configures REF (Pin 4) as a ...
MAX6666/MAX6667 High-Accuracy PWM Output Temperature Sensors General Description
... MAX6667 have a resolution of approximately 11 bits. Always use the same clock for t1 and t2 counters so that the temperature is strictly based on a ratio of the two times, thus eliminating errors due to different clocks’ frequencies. The MAX6666 (Figure 2a) has a push-pull output and provides rail-t ...
... MAX6667 have a resolution of approximately 11 bits. Always use the same clock for t1 and t2 counters so that the temperature is strictly based on a ratio of the two times, thus eliminating errors due to different clocks’ frequencies. The MAX6666 (Figure 2a) has a push-pull output and provides rail-t ...
Dual 10-Bit TxDAC+ with 2 AD9761 ®
... DAC. Operation beyond the maximum compliance limits may cause either output stage saturation or breakdown, resulting in nonlinear performance. ...
... DAC. Operation beyond the maximum compliance limits may cause either output stage saturation or breakdown, resulting in nonlinear performance. ...
ADS1286 数据资料 dataSheet 下载
... device draws power. After a conversion the A/D automatically shuts down even if CS is held LOW. If the clock is left running to clock out LSB-data or zero, the logic will draw a small amount of current (see Figure 3). ...
... device draws power. After a conversion the A/D automatically shuts down even if CS is held LOW. If the clock is left running to clock out LSB-data or zero, the logic will draw a small amount of current (see Figure 3). ...
MAX1955/MAX1956 1.6V to 5.5V Input, 0.5% Accurate, Dual 180° Out-of-Phase Step-Down Controllers
... Features ♦ Operates from a 1.6V to 5.5V Supply (MAX1956) ...
... Features ♦ Operates from a 1.6V to 5.5V Supply (MAX1956) ...
NTUST-EE-2013S
... the capacitor during a portion of the ac cycle and returned to the source during another portion of the cycle. • Voltage and current are always 90o out of phase. For this reason, no true power is dissipated by a capacitor, because stored energy is returned to the circuit. • The rate at which a capac ...
... the capacitor during a portion of the ac cycle and returned to the source during another portion of the cycle. • Voltage and current are always 90o out of phase. For this reason, no true power is dissipated by a capacitor, because stored energy is returned to the circuit. • The rate at which a capac ...
MAX17129/MAX17149 Low-Cost, 6-String WLED Drivers with Quick-PWM Step-Up Converter General Description
... for white LEDs. They are designed for small- to mediumsized LCDs that employ an array of LEDs as the light source. An internal switch step-up controller with QuickPWMK drives the LED array, which can be configured for up to 6 strings in parallel and either 11 LEDs (MAX17129) or 6 LEDs in series (MAX ...
... for white LEDs. They are designed for small- to mediumsized LCDs that employ an array of LEDs as the light source. An internal switch step-up controller with QuickPWMK drives the LED array, which can be configured for up to 6 strings in parallel and either 11 LEDs (MAX17129) or 6 LEDs in series (MAX ...
LTC6605-7
... Note 5: The LTC6605C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6605C is designed, characterized and expected to meet specified performance from –40°C to 85°C, but is not tested or QA sampled at these temperatures. The LTC6605I is guaranteed to meet specified performance from ...
... Note 5: The LTC6605C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6605C is designed, characterized and expected to meet specified performance from –40°C to 85°C, but is not tested or QA sampled at these temperatures. The LTC6605I is guaranteed to meet specified performance from ...
ONET4291PA 数据资料 dataSheet 下载
... resistors; two gain stages, which provide a typical gain of about 37 dB; and a CML output stage, which provides another 6-dB gain. The amplified data-output signal is available at the output terminals DOUT+ and DOUT–, which feature on-chip 2 × 50-Ω back-termination to VCC. A dc feedback stage compen ...
... resistors; two gain stages, which provide a typical gain of about 37 dB; and a CML output stage, which provides another 6-dB gain. The amplified data-output signal is available at the output terminals DOUT+ and DOUT–, which feature on-chip 2 × 50-Ω back-termination to VCC. A dc feedback stage compen ...
AD811 - Ropla Elektronik Sp. z oo
... momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the “overheated” condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves in Figures 17 and 18. Whi ...
... momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the “overheated” condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves in Figures 17 and 18. Whi ...
74ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs 7
... oriented applications. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high ...
... oriented applications. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high ...
DATA SHEET UDA1361TS 96 kHz sampling 24-bit stereo audio ADC
... Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. ...
... Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. ...
Triple Differential Driver for Wideband Video / AD8146
... resolution component video signals but can be used for any type of analog signals or high speed data transmission over either Category 5 UTP cable or differential printed circuit board (PCB) transmission lines. ...
... resolution component video signals but can be used for any type of analog signals or high speed data transmission over either Category 5 UTP cable or differential printed circuit board (PCB) transmission lines. ...
Voltage Controlled Ring Oscillator with Wide Tuning Range and
... A voltage controlled oscillator (VCO) is one of the important basic building blocks in analog and digital circuits [1],[2],[3]. For example, a VCO is the main building block in phase locked loop (PLL) and clock generator circuits. There are so many different implementations of VCOs. One of them is th ...
... A voltage controlled oscillator (VCO) is one of the important basic building blocks in analog and digital circuits [1],[2],[3]. For example, a VCO is the main building block in phase locked loop (PLL) and clock generator circuits. There are so many different implementations of VCOs. One of them is th ...
A Single-Slope 80 MS/s ADC Using Two-Step Time to
... offered by digital counter structures is constrained to be no better than hundreds of picoseconds. As a result, single-slope conversion is often constrained to very low sample rates even when only moderate resolution is desired of the ADC. Recently, researchers have been investigating alternative ap ...
... offered by digital counter structures is constrained to be no better than hundreds of picoseconds. As a result, single-slope conversion is often constrained to very low sample rates even when only moderate resolution is desired of the ADC. Recently, researchers have been investigating alternative ap ...
Brochure + Installation
... The UT-1 provides isolated trigger and reset inputs. The trigger input is on the I1+ and I1- terminals, the reset input is on the I2+ and I2- terminals. A dc voltage between 8V and 30V turns the input on. The I1+ terminal has to be positive to the I1terminal and the I2+ terminal has to be positive t ...
... The UT-1 provides isolated trigger and reset inputs. The trigger input is on the I1+ and I1- terminals, the reset input is on the I2+ and I2- terminals. A dc voltage between 8V and 30V turns the input on. The I1+ terminal has to be positive to the I1terminal and the I2+ terminal has to be positive t ...
LM10010 VID Voltage Programmer for Point of
... The LM10010 is a precision current DAC used for controlling any point of load regulator with an adjustable resistor feedback network. Four communication lines are used to write to a 6-bit IDAC value. The output of the IDAC is used to send current to the feedback node of a regulator, adjusting the ou ...
... The LM10010 is a precision current DAC used for controlling any point of load regulator with an adjustable resistor feedback network. Four communication lines are used to write to a 6-bit IDAC value. The output of the IDAC is used to send current to the feedback node of a regulator, adjusting the ou ...
MAX3645 +2.97V to +5.5V, 125Mbps to 200Mbps Limiting Amplifier with Loss-of-Signal Detector
... Between sensitivity and overload, the output amplitude is >95% of the fully limited amplitude and all AC specifications are met. Guaranteed by design and characterization. Noise is derived from BER measurement. The data input transition time is controlled by a 4th-order Bessel filter with f-3dB = 0. ...
... Between sensitivity and overload, the output amplitude is >95% of the fully limited amplitude and all AC specifications are met. Guaranteed by design and characterization. Noise is derived from BER measurement. The data input transition time is controlled by a 4th-order Bessel filter with f-3dB = 0. ...
Design Methodology of LLC Resonant Converters for Electric Vehicle Battery Chargers
... region below resonance [19]. The FHA is still valid but less accurate in the below-resonance region; therefore, it is useful for qualitative analysis but not for optimal design procedure. Optimal design methods are developed based on the operation mode analysis in [20] and [21]. These approaches can ...
... region below resonance [19]. The FHA is still valid but less accurate in the below-resonance region; therefore, it is useful for qualitative analysis but not for optimal design procedure. Optimal design methods are developed based on the operation mode analysis in [20] and [21]. These approaches can ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.