MAX6978 8-Port, 5.5V Constant-Current LED Driver with LED Fault Detection and Watchdog
... and clock input CLK. Input data appears at the output DOUT eight clock cycles later to allow cascading of multiple MAX6978s. The latch-enable input LE loads the 8 bits of shift-register data into an 8-bit output latch to set which LEDs are on and which are off. The outputenable input OE gates all ei ...
... and clock input CLK. Input data appears at the output DOUT eight clock cycles later to allow cascading of multiple MAX6978s. The latch-enable input LE loads the 8 bits of shift-register data into an 8-bit output latch to set which LEDs are on and which are off. The outputenable input OE gates all ei ...
AD630 数据手册DataSheet 下载
... The AD630 is used in precision signal processing and instrumentation applications that require wide dynamic range. When used as a synchronous demodulator in a lock-in amplifier configuration, it can recover a small signal from 100 dB of interfering noise (see Lock-In Amplifier Applications section). ...
... The AD630 is used in precision signal processing and instrumentation applications that require wide dynamic range. When used as a synchronous demodulator in a lock-in amplifier configuration, it can recover a small signal from 100 dB of interfering noise (see Lock-In Amplifier Applications section). ...
MAX16823 High-Voltage, 3-Channel Linear High-Brightness LED Driver with Open LED Detection General Description
... where VCS_ is 203mV and IOUT_ is the desired LED current (ILED). ...
... where VCS_ is 203mV and IOUT_ is the desired LED current (ILED). ...
Tips `n Tricks 3V
... low voltage at the 5V CMOS input of 1.1V to 1.2V. This is well within the low threshold input voltage for the 5V CMOS input. The output high voltage is set by the pull-up resistor and diode D2, tied to the 3.3V supply. This puts the output high voltage at approximately 0.7V above the 3.3V supply, or ...
... low voltage at the 5V CMOS input of 1.1V to 1.2V. This is well within the low threshold input voltage for the 5V CMOS input. The output high voltage is set by the pull-up resistor and diode D2, tied to the 3.3V supply. This puts the output high voltage at approximately 0.7V above the 3.3V supply, or ...
MAX144/MAX145 Full Data Sheet (PDF)
... capacitance of the ADC. Source impedances below 1k have no significant impact on the AC perfor- mance of the MAX144/MAX145. Higher source impedances can be used if a 0.01µF capacitor is connected to the individual analog inputs. Together with the input impedance, this capacitor forms an RC filter, ...
... capacitance of the ADC. Source impedances below 1k have no significant impact on the AC perfor- mance of the MAX144/MAX145. Higher source impedances can be used if a 0.01µF capacitor is connected to the individual analog inputs. Together with the input impedance, this capacitor forms an RC filter, ...
Toner Density/Quantity Sensors
... small fluctuation in developer flow (C0→C1→C0→C2→C0) around the working point C0, this will be reflected in an output ripple between E1 and E2. As long as the fluctuation in the output ripple remains within the developer working range, the output signal filtering is sufficient to ensure stable senso ...
... small fluctuation in developer flow (C0→C1→C0→C2→C0) around the working point C0, this will be reflected in an output ripple between E1 and E2. As long as the fluctuation in the output ripple remains within the developer working range, the output signal filtering is sufficient to ensure stable senso ...
PTH12020W/L
... This is the common ground connection for the Vin and Vout power connections. It is also the 0 VDC reference for the control inputs. The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a lowlevel ground signal to this input disables the module’s output ...
... This is the common ground connection for the Vin and Vout power connections. It is also the 0 VDC reference for the control inputs. The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a lowlevel ground signal to this input disables the module’s output ...
AD7836 数据手册DataSheet 下载
... DB13 is the MSB and DB0 is the LSB. Address inputs. A0, A1 and A2 are decoded to select one of the five input latches for a data transfer. Asynchronous Clear Input (level sensitive, active low). When this input is low, all analog outputs are switched to the externally set potential on the DUTGND pin ...
... DB13 is the MSB and DB0 is the LSB. Address inputs. A0, A1 and A2 are decoded to select one of the five input latches for a data transfer. Asynchronous Clear Input (level sensitive, active low). When this input is low, all analog outputs are switched to the externally set potential on the DUTGND pin ...
List of Experiments 1. V-I characteristics of PN Junction Diode in
... Record your value in the INPUT VOLTAGE column (upper space) of the table. Now you will make several voltage measurements, which must be performed quickly to avoid overheating the diode. First measure the voltage across D1 as you turn potentiometer D1 fully clockwise. Note the voltage across D1 with ...
... Record your value in the INPUT VOLTAGE column (upper space) of the table. Now you will make several voltage measurements, which must be performed quickly to avoid overheating the diode. First measure the voltage across D1 as you turn potentiometer D1 fully clockwise. Note the voltage across D1 with ...
BDTIC C o o l S E T -Q1
... The voltage vZC is also used for the output overvoltage protection. Once the voltage at this pin is higher than the threshold VZCOVP during off-time of the main switch, the IC is latched off after a fixed blanking time. To achieve the switch-on at voltage valley, the voltage from the auxiliary windi ...
... The voltage vZC is also used for the output overvoltage protection. Once the voltage at this pin is higher than the threshold VZCOVP during off-time of the main switch, the IC is latched off after a fixed blanking time. To achieve the switch-on at voltage valley, the voltage from the auxiliary windi ...
ADS1112 数据资料 dataSheet 下载
... An I2C bus consists of two lines, SDA and SCL. SDA carries data; SCL provides the clock. All data is transmitted across the I2C bus in groups of eight bits. To send a bit on the I2C bus, the SDA line is driven to the appropriate level while SCL is LOW (a LOW on SDA indicates the bit is zero; a HIGH ...
... An I2C bus consists of two lines, SDA and SCL. SDA carries data; SCL provides the clock. All data is transmitted across the I2C bus in groups of eight bits. To send a bit on the I2C bus, the SDA line is driven to the appropriate level while SCL is LOW (a LOW on SDA indicates the bit is zero; a HIGH ...
Set 6A: Frequency Response (Part A)
... Consider an amplifier with a gain A with an impedance Z attached between input and output V1 and V2 “feel” the impedance of Z only through I1 and I2 We can replace Z with any circuit as long as a current I1 flows out of V1 and a current I2 flows out of V2. V2 = A ⋅ V1 ...
... Consider an amplifier with a gain A with an impedance Z attached between input and output V1 and V2 “feel” the impedance of Z only through I1 and I2 We can replace Z with any circuit as long as a current I1 flows out of V1 and a current I2 flows out of V2. V2 = A ⋅ V1 ...
PTH05T210W
... TurboTrans allows the transient response of the regulator to be optimized externally, resulting in a reduction of output voltage deviation following a load transient and a reduction in required output capacitance. This feature also offers enhanced stability when used with ultra-low ESR output capaci ...
... TurboTrans allows the transient response of the regulator to be optimized externally, resulting in a reduction of output voltage deviation following a load transient and a reduction in required output capacitance. This feature also offers enhanced stability when used with ultra-low ESR output capaci ...
L6384E
... This structure can work only if VOUT is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (Tcharge ) of the CBOOT is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor. The bootstrap driver introduces a voltage drop due to ...
... This structure can work only if VOUT is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (Tcharge ) of the CBOOT is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor. The bootstrap driver introduces a voltage drop due to ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.