File tda1524a | allcomponents.ru
... The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed ...
... The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed ...
DATA SHEET
... The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed ...
... The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed ...
ICS552-02 L S 2 I
... While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patent ...
... While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patent ...
BUFFER 426 is 520
... respectively. In a left imprint compensation mode, the pulse generator 20 sends left imprint compensation pulses to the plate electrodes 38b and 42b of the capacitors 38 and 42 via the plate line 56 in response to a control signal from the ?rst control portion 24. Similarly, in a right imprint compe ...
... respectively. In a left imprint compensation mode, the pulse generator 20 sends left imprint compensation pulses to the plate electrodes 38b and 42b of the capacitors 38 and 42 via the plate line 56 in response to a control signal from the ?rst control portion 24. Similarly, in a right imprint compe ...
LT5537 - Wide Dynamic Range RF/IF Log Detector.
... The simplest way of input matching the LT5537 is to terminate the input signal with a 50Ω resistor and AC couple it to one of the input pins while AC grounding the other input pin (Figure 13). The sensitivity (defined as the minimum input power required for the output to be within 3dB of the ideal l ...
... The simplest way of input matching the LT5537 is to terminate the input signal with a 50Ω resistor and AC couple it to one of the input pins while AC grounding the other input pin (Figure 13). The sensitivity (defined as the minimum input power required for the output to be within 3dB of the ideal l ...
HMC746LC3C 数据资料DataSheet下载
... The HMC746LC3C is an AND/NAND/OR/NOR function designed to support data transmission rates of up to 13 Gbps, and clock frequencies as high as 13 GHz. The HMC746LC3C may be easily configured to provide any of the following logic functions: AND, NAND, OR and NOR. The HMC746LC3C also features an output ...
... The HMC746LC3C is an AND/NAND/OR/NOR function designed to support data transmission rates of up to 13 Gbps, and clock frequencies as high as 13 GHz. The HMC746LC3C may be easily configured to provide any of the following logic functions: AND, NAND, OR and NOR. The HMC746LC3C also features an output ...
non-inverting amplifier gain derivation
... β is called the feedback transfer function and represents the fraction of the output voltage that is fed back from the output to the input. Combining the equations above gives: vout A vout = A[ vin − βvout ]; vout + Aβvout = Avin ; = Av = vin 1 + Aβ This gives the classic negative feedback amplifier ...
... β is called the feedback transfer function and represents the fraction of the output voltage that is fed back from the output to the input. Combining the equations above gives: vout A vout = A[ vin − βvout ]; vout + Aβvout = Avin ; = Av = vin 1 + Aβ This gives the classic negative feedback amplifier ...
ADCMP582 数据手册DataSheet 下载
... The CML output stage is designed to directly drive 400 mV into 50 Ω transmission lines terminated to ground. The NECL output stages are designed to directly drive 400 mV into 50 Ω terminated to −2 V. The PECL output stages are designed to directly drive 400 mV into 50 Ω terminated to VCCO − 2 V. Hig ...
... The CML output stage is designed to directly drive 400 mV into 50 Ω transmission lines terminated to ground. The NECL output stages are designed to directly drive 400 mV into 50 Ω terminated to −2 V. The PECL output stages are designed to directly drive 400 mV into 50 Ω terminated to VCCO − 2 V. Hig ...
RCV420 - Texas Instruments
... Increasing the gain of the RCV420 is accomplished by inserting a small resistor in the feedback path of the amplifier. Increasing the gain using this technique results in CMR degradation, and therefore, gain adjustments should be kept as small as possible. For example, a 1% increase in gain is typic ...
... Increasing the gain of the RCV420 is accomplished by inserting a small resistor in the feedback path of the amplifier. Increasing the gain using this technique results in CMR degradation, and therefore, gain adjustments should be kept as small as possible. For example, a 1% increase in gain is typic ...
FMS6346 Six Channel, 6th-Order SD/HD Video Filter Driver Features
... Figure 19. Biased SCART with AC-Coupled Outputs NOTE: The video tilt or line time distortion is dominated by the AC-coupling capacitor. The value may need to be increased beyond 220μF to obtain satisfactory operation in ...
... Figure 19. Biased SCART with AC-Coupled Outputs NOTE: The video tilt or line time distortion is dominated by the AC-coupling capacitor. The value may need to be increased beyond 220μF to obtain satisfactory operation in ...
A 7.2 GSa/s, 14 bit or 12 GSa/s, 12 bit Signal Generator on a Chip in
... wideband modulated RF signals (up to 480 MHz modulation bandwidth) as well as high fidelity chirp and continuous wave signals. There is also DSP for integral non-linearity error reduction and suppression of clock sub-harmonics. The DAC uses a segmented architecture with 4 unary most significant bits ...
... wideband modulated RF signals (up to 480 MHz modulation bandwidth) as well as high fidelity chirp and continuous wave signals. There is also DSP for integral non-linearity error reduction and suppression of clock sub-harmonics. The DAC uses a segmented architecture with 4 unary most significant bits ...
Dmm+lab+report+document+(2)
... The principle behind the VCO is that the VCO accepts a reference voltage and a corresponding frequency are produced on the output. The center frequency was determined by using the data sheet for the 4046 to achieve a center frequency of 100 kHz with a reference voltage of 5 volts. The 5 volts refere ...
... The principle behind the VCO is that the VCO accepts a reference voltage and a corresponding frequency are produced on the output. The center frequency was determined by using the data sheet for the 4046 to achieve a center frequency of 100 kHz with a reference voltage of 5 volts. The 5 volts refere ...
EL2075C
... voltage, only 2 mA of input bias current, and a fully symmetrical differential input. Like all voltage-feedback operational amplifiers, the EL2075 allows the use of reactive or non-linear components in the feedback loop. This combination of speed and versatility makes the EL2075 the ideal choice for ...
... voltage, only 2 mA of input bias current, and a fully symmetrical differential input. Like all voltage-feedback operational amplifiers, the EL2075 allows the use of reactive or non-linear components in the feedback loop. This combination of speed and versatility makes the EL2075 the ideal choice for ...
selecting the right sensor for temperature measurement
... Linearization can also be performed in the analog domain with the addition of series or parallel resistors which forces the voltage or the resistance of a simple fixed-resistor-thermistor to have zero error along a linear temperature scale at three equidistant points. Figure 3 uses a resistor R1 in ...
... Linearization can also be performed in the analog domain with the addition of series or parallel resistors which forces the voltage or the resistance of a simple fixed-resistor-thermistor to have zero error along a linear temperature scale at three equidistant points. Figure 3 uses a resistor R1 in ...
isl8011 - ISL8011 - 1.2A Integrated FETs, High Efficiency
... compensation slope (0.675V/µs) reaches the control reference of the current loop, the PWM comparator COMP sends a signal to the PWM logic to turn off the P-MOSFET and to turn on the N-Channel MOSFET. The N-MOSFET stays on until the end of the PWM cycle. Figure 12 shows the typical operating waveform ...
... compensation slope (0.675V/µs) reaches the control reference of the current loop, the PWM comparator COMP sends a signal to the PWM logic to turn off the P-MOSFET and to turn on the N-Channel MOSFET. The N-MOSFET stays on until the end of the PWM cycle. Figure 12 shows the typical operating waveform ...
Analog-to-digital converter
An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.The conversion involves quantization of the input, so it necessarily introduces a small amount of error. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input. The result is a sequence of digital values that have been converted from a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal.An ADC is defined by its bandwidth (the range of frequencies it can measure) and its signal to noise ratio (how accurately it can measure a signal relative to the noise it introduces). The actual bandwidth of an ADC is characterized primarily by its sampling rate, and to a lesser extent by how it handles errors such as aliasing. The dynamic range of an ADC is influenced by many factors, including the resolution (the number of output levels it can quantize a signal to), linearity and accuracy (how well the quantization levels match the true analog signal) and jitter (small timing errors that introduce additional noise). The dynamic range of an ADC is often summarized in terms of its effective number of bits (ENOB), the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required signal to noise ratio of the signal to be quantized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then perfect reconstruction is possible given an ideal ADC and neglecting quantization error. The presence of quantization error limits the dynamic range of even an ideal ADC, however, if the dynamic range of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the input signal.An ADC may also provide an isolated measurement such as an electronic device that converts an input analog voltage or current to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes. Typically the digital output will be a two's complement binary number that is proportional to the input, but there are other possibilities. An encoder, for example, might output a Gray code.The inverse operation is performed by a digital-to-analog converter (DAC).