Complete 12-Bit, 25 MSPS Monolithic A/D Converter AD9225
... The pipeline architecture allows a greater throughput rate at the expense of pipeline delay or latency. This means that while the converter is capable of capturing a new input sample every clock cycle, it actually takes three clock cycles for the conversion to be fully processed and appear at the ou ...
... The pipeline architecture allows a greater throughput rate at the expense of pipeline delay or latency. This means that while the converter is capable of capturing a new input sample every clock cycle, it actually takes three clock cycles for the conversion to be fully processed and appear at the ou ...
a Fast, High-Voltage Drive, 6-Channel Output DecDriver Decimating LCD Panel Driver
... INV is low the output is defined as VOUTP(N) where N refers to the input code, and the P refers to the positive slope of the voltage variation with code. When INV is high, the output is defined as VOUTN(N). To best correlate transfer function errors to image artifacts, the overall accuracy of the AD ...
... INV is low the output is defined as VOUTP(N) where N refers to the input code, and the P refers to the positive slope of the voltage variation with code. When INV is high, the output is defined as VOUTN(N). To best correlate transfer function errors to image artifacts, the overall accuracy of the AD ...
Circuit Note - Mouser Electronics
... The voltage generated by a thermocouple must be converted to temperature. Converting the voltage measured to an accurate temperature can be difficult, because the thermocouple voltage is small, the temperature-voltage relationship is nonlinear, and the cold junction temperature must also be accurate ...
... The voltage generated by a thermocouple must be converted to temperature. Converting the voltage measured to an accurate temperature can be difficult, because the thermocouple voltage is small, the temperature-voltage relationship is nonlinear, and the cold junction temperature must also be accurate ...
MAX3676 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier General Description
... and supply fluctuations. The power detector functions as a broadband power meter that detects the total RMS power of all signals within the detector bandwidth (including input signal noise). The RSSI voltage varies linearly (in decibels) for inputs of 2mVP-P to 50mVP-P. The slope over this input ran ...
... and supply fluctuations. The power detector functions as a broadband power meter that detects the total RMS power of all signals within the detector bandwidth (including input signal noise). The RSSI voltage varies linearly (in decibels) for inputs of 2mVP-P to 50mVP-P. The slope over this input ran ...
FSBB15CH60F Motion SPM 3 Series FSBB15CH60F Motion SPM® 3 Series
... 3. VFO output is open-collector type. This signal line should be pulled up to the positive side of the 5 V power supply with approximately 4.7 k resistance (please refer to Figure ...
... 3. VFO output is open-collector type. This signal line should be pulled up to the positive side of the 5 V power supply with approximately 4.7 k resistance (please refer to Figure ...
Inductor Switching Regulator Design
... This bulletin is intended to present product design solutions and technical information that will help the end user with design applications. Cooper Electronic Technologies reserves the right, without notice, to change design or construction of any products and to discontinue or limit distribution o ...
... This bulletin is intended to present product design solutions and technical information that will help the end user with design applications. Cooper Electronic Technologies reserves the right, without notice, to change design or construction of any products and to discontinue or limit distribution o ...
L6393
... In the L6393 IC the two input signals PHASE and BRAKE are fed into an AND logic port and the resulting signal is in phase with the high side output HVG and in opposition of phase with the low side output LVG. This means that if BRAKE is kept to high level, the PHASE signal drives the half-bridge in ...
... In the L6393 IC the two input signals PHASE and BRAKE are fed into an AND logic port and the resulting signal is in phase with the high side output HVG and in opposition of phase with the low side output LVG. This means that if BRAKE is kept to high level, the PHASE signal drives the half-bridge in ...
Elliptic Filter Advantages
... ideally suited for filter design cases where there must be severe attenuation in frequencies just entering the stop-band of the filter. Further, because the rippling effect is distributed across both the pass- and stop-bands in the elliptic filter, it makes it an excellent candidate for a low pass f ...
... ideally suited for filter design cases where there must be severe attenuation in frequencies just entering the stop-band of the filter. Further, because the rippling effect is distributed across both the pass- and stop-bands in the elliptic filter, it makes it an excellent candidate for a low pass f ...
Evaluates: MAX6469–MAX6476 MAX6470 Evaluation Kit General Description Features
... If the output voltage needs to be adjusted, cut the trace on R5 and install resistors R4 and R5 to configure the desired output voltage at VOUT. It is recommended that capacitors C1 and C2 be removed and capacitors C3 and C4 be installed to reduce trace impedance from the input and output connection ...
... If the output voltage needs to be adjusted, cut the trace on R5 and install resistors R4 and R5 to configure the desired output voltage at VOUT. It is recommended that capacitors C1 and C2 be removed and capacitors C3 and C4 be installed to reduce trace impedance from the input and output connection ...
AN420
... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notic ...
... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notic ...
DECS-200N Negative Forcing Digital Excitation Control System
... control are also available using contact inputs and the RS485 port via Modbus protocol. The DECS-200N offers all of the features, functionality, flexibility, and programmability for use in new installations and in retrofit applications. ...
... control are also available using contact inputs and the RS485 port via Modbus protocol. The DECS-200N offers all of the features, functionality, flexibility, and programmability for use in new installations and in retrofit applications. ...
MAX8540/MAX8541 Synchronizable, High-Frequency Current- and Voltage-Mode PWM Controllers for Isolated Supplies General Description
... Maximum duty cycle is adjustable, and the feed-forward function scales the maximum duty cycle with input voltage to limit the maximum volt-seconds applied to the transformer primary. The MAX8540 allows the user to select the value of slope compensation to further optimize magnetics design. The MAX85 ...
... Maximum duty cycle is adjustable, and the feed-forward function scales the maximum duty cycle with input voltage to limit the maximum volt-seconds applied to the transformer primary. The MAX8540 allows the user to select the value of slope compensation to further optimize magnetics design. The MAX85 ...
LM6118/LM6218 Fast Settling Dual Operational
... op-amps. To insure maximum performance, circuit board layout is very important. Minimizing stray capacitance at the inputs and reducing coupling between the amplifier’s input and output will minimize problems. ...
... op-amps. To insure maximum performance, circuit board layout is very important. Minimizing stray capacitance at the inputs and reducing coupling between the amplifier’s input and output will minimize problems. ...
74LS125 Quad 3
... This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines wi ...
... This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines wi ...
Chapter 5 Frequency Domain Analysis of Systems
... • Because of aliasing, it is not possible to reconstruct x(t) exactly by lowpass filtering the sampled signal xs (t ) x(t ) p (t ) • Aliasing results in a distorted version of the original signal x(t) • It can be eliminated (theoretically) by lowpass filtering x(t) before sampling it so that | X ( ...
... • Because of aliasing, it is not possible to reconstruct x(t) exactly by lowpass filtering the sampled signal xs (t ) x(t ) p (t ) • Aliasing results in a distorted version of the original signal x(t) • It can be eliminated (theoretically) by lowpass filtering x(t) before sampling it so that | X ( ...
FSBB15CH60 Motion SPM 3 Series FSBB15CH60 Motion SPM® 3 Series
... 3. VFO output is open-collector type. This signal line should be pulled up to the positive side of the 5 V power supply with approximately 4.7 k resistance (please refer to Figure ...
... 3. VFO output is open-collector type. This signal line should be pulled up to the positive side of the 5 V power supply with approximately 4.7 k resistance (please refer to Figure ...
Chapter 6: Interfacing to Data Converters
... and foremost, and maintaining that performance in a system application is extremely important. In low frequency measurement applications (10-Hz bandwidth signals or lower), Σ-∆ ADCs with resolutions up to 24 bits are now quite common. These converters generally have automatic or factory calibration ...
... and foremost, and maintaining that performance in a system application is extremely important. In low frequency measurement applications (10-Hz bandwidth signals or lower), Σ-∆ ADCs with resolutions up to 24 bits are now quite common. These converters generally have automatic or factory calibration ...
ZXSC310 LED DRIVER SOLUTION FOR LCD BACKLIGHTING
... The device features a shutdown control, resulting in a standby current less than 5µA, and an output capable of driving serial or parallel LED’s. The circuit generates constant power output, which are ideal for driving single or multiple LED’s over a wide range of operating voltages. These features m ...
... The device features a shutdown control, resulting in a standby current less than 5µA, and an output capable of driving serial or parallel LED’s. The circuit generates constant power output, which are ideal for driving single or multiple LED’s over a wide range of operating voltages. These features m ...
Low Power Input and Reference Driver Circuit
... • Noise contribution from one THS4281 = 12.5 nV/√Hz × √1.2 MHz = 13.7 µV • VREF = 5.0 V • RMS signal voltage = 5.0 V/2√2 = 1.767 V • Quantization noise = 5.0 V/(216 × √12) = 22.0 µV • Total RMS noise (quantization noise and noise of two THS4281s): 13.72 + 13.72 + 22.02 = 29.13 mV ...
... • Noise contribution from one THS4281 = 12.5 nV/√Hz × √1.2 MHz = 13.7 µV • VREF = 5.0 V • RMS signal voltage = 5.0 V/2√2 = 1.767 V • Quantization noise = 5.0 V/(216 × √12) = 22.0 µV • Total RMS noise (quantization noise and noise of two THS4281s): 13.72 + 13.72 + 22.02 = 29.13 mV ...
Evaluates: MAX8515/MAX8515A MAX8515 Evaluation Kit General Description Features
... The MAX8515 EV kit is designed to operate from a voltage supply connected across the VIN and GND pads on the EV kit. The input voltage source supplies the isolated voltage-feedback circuit and the OVP circuit on the EV kit. The EV kit operates from a nominal input voltage of 8V and has a range of 6V ...
... The MAX8515 EV kit is designed to operate from a voltage supply connected across the VIN and GND pads on the EV kit. The input voltage source supplies the isolated voltage-feedback circuit and the OVP circuit on the EV kit. The EV kit operates from a nominal input voltage of 8V and has a range of 6V ...
AD7911 数据手册DataSheet下载
... Data In. Logic input. The channel to be converted is provided on this input and is clocked into an internal register on the falling edge of SCLK. Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD79 ...
... Data In. Logic input. The channel to be converted is provided on this input and is clocked into an internal register on the falling edge of SCLK. Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD79 ...
Analog-to-digital converter
An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.The conversion involves quantization of the input, so it necessarily introduces a small amount of error. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input. The result is a sequence of digital values that have been converted from a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal.An ADC is defined by its bandwidth (the range of frequencies it can measure) and its signal to noise ratio (how accurately it can measure a signal relative to the noise it introduces). The actual bandwidth of an ADC is characterized primarily by its sampling rate, and to a lesser extent by how it handles errors such as aliasing. The dynamic range of an ADC is influenced by many factors, including the resolution (the number of output levels it can quantize a signal to), linearity and accuracy (how well the quantization levels match the true analog signal) and jitter (small timing errors that introduce additional noise). The dynamic range of an ADC is often summarized in terms of its effective number of bits (ENOB), the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required signal to noise ratio of the signal to be quantized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then perfect reconstruction is possible given an ideal ADC and neglecting quantization error. The presence of quantization error limits the dynamic range of even an ideal ADC, however, if the dynamic range of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the input signal.An ADC may also provide an isolated measurement such as an electronic device that converts an input analog voltage or current to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes. Typically the digital output will be a two's complement binary number that is proportional to the input, but there are other possibilities. An encoder, for example, might output a Gray code.The inverse operation is performed by a digital-to-analog converter (DAC).