UNITY-GAIN STABLE WIDEBAND VOLTAGE LIMITING AMPLIFIER OPA698M FEATURES
... output limiting architecture holds the limiter offset error to ±15 mV. The op amp operates linearly to within 30 mV of the output limit voltages. The combination of narrow nonlinear range and low limiting offset allows the limiting voltages to be set within 100 mV of the desired linear output range. ...
... output limiting architecture holds the limiter offset error to ±15 mV. The op amp operates linearly to within 30 mV of the output limit voltages. The combination of narrow nonlinear range and low limiting offset allows the limiting voltages to be set within 100 mV of the desired linear output range. ...
Document
... We can see that the expression for s(t) is an infinite series. Therefore the frequency spectrum of an FM signal has an infinite number of sidebands. The amplitudes of the carrier and sidebands of an FM signal are given by the corresponding Bessel functions, which are themselves functions of the m ...
... We can see that the expression for s(t) is an infinite series. Therefore the frequency spectrum of an FM signal has an infinite number of sidebands. The amplitudes of the carrier and sidebands of an FM signal are given by the corresponding Bessel functions, which are themselves functions of the m ...
MAX1407/MAX1408/MAX1409/MAX1414 Low-Power, 16-Bit Multichannel DAS with Internal Reference,10-Bit DACs, and RTC General Description
... inputs, while the MAX1407/MAX1414 include four auxiliary analog inputs and two 10-bit force/sense DACs. The MAX1414 features a 50mV trip threshold for the signal-detect comparator while the others have a 0mV trip threshold. The MAX1409 is a 20-pin version of the DAS family with a differential 4:1 in ...
... inputs, while the MAX1407/MAX1414 include four auxiliary analog inputs and two 10-bit force/sense DACs. The MAX1414 features a 50mV trip threshold for the signal-detect comparator while the others have a 0mV trip threshold. The MAX1409 is a 20-pin version of the DAS family with a differential 4:1 in ...
Avalanche Photodiode Bias Controller and ADL5317
... F3dB is the cutoff frequency of the low-pass filter formed by the on-board 20 kΩ and CGRD. CGRD is the filter capacitor installed from GARD to ground. A larger value for CGRD (up to approximately 0.01 μF) provides superior noise performance at the lowest input current levels, but also slows the resp ...
... F3dB is the cutoff frequency of the low-pass filter formed by the on-board 20 kΩ and CGRD. CGRD is the filter capacitor installed from GARD to ground. A larger value for CGRD (up to approximately 0.01 μF) provides superior noise performance at the lowest input current levels, but also slows the resp ...
Comparative Analysis of Three-phase AC-DC Converters
... electric vehicle technologies. Wider conversion ratios can be obtained by adjusting the modulating control signal of the converter. In practice, the attainability of the conversion ratios is limited, especially when the duty ratio is nearing 0 or 1. As a result, major deterioration in the output vol ...
... electric vehicle technologies. Wider conversion ratios can be obtained by adjusting the modulating control signal of the converter. In practice, the attainability of the conversion ratios is limited, especially when the duty ratio is nearing 0 or 1. As a result, major deterioration in the output vol ...
a High Accuracy Ultralow I , 500 mA anyCAP
... stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for spacerestricted applications. The ADP3336 achieves exceptional accuracy of ± 0.9% at room temperature and ± 1.8% over temper ...
... stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for spacerestricted applications. The ADP3336 achieves exceptional accuracy of ± 0.9% at room temperature and ± 1.8% over temper ...
Precision Weigh-Scale Reference Design with
... for the loss of dynamic range that occurs when the input signal is not scaled (level shifted and amplified) to match the ADC’s input range. A 24-bit delta-sigma ADC is usually selected for this type of application. The ADS1262, a 32-bit delta-sigma ADC, was chosen for this design for its low-noise p ...
... for the loss of dynamic range that occurs when the input signal is not scaled (level shifted and amplified) to match the ADC’s input range. A 24-bit delta-sigma ADC is usually selected for this type of application. The ADS1262, a 32-bit delta-sigma ADC, was chosen for this design for its low-noise p ...
2. Representation of Signals
... An analog signal, denoted x(t), is a continuous function of time and is uniquely determined for all t. When a physical signal such as speech is converted to an electrical signal by a microphone, we have an electrical analog of the physical waveform. An equivalent discrete-time signal, denoted as x(k ...
... An analog signal, denoted x(t), is a continuous function of time and is uniquely determined for all t. When a physical signal such as speech is converted to an electrical signal by a microphone, we have an electrical analog of the physical waveform. An equivalent discrete-time signal, denoted as x(k ...
Constant Fraction Discriminator
... time setting. Input to Output Delay: 15 nsec + constant fraction delay. Delay matched to better than 2 nsec. Test to Output Delay: 30 nsec. Multiple Pulsing: None; one and only one output pulse is produced regardless of input pulse amplitude so long as the dead time setting is greater than the progr ...
... time setting. Input to Output Delay: 15 nsec + constant fraction delay. Delay matched to better than 2 nsec. Test to Output Delay: 30 nsec. Multiple Pulsing: None; one and only one output pulse is produced regardless of input pulse amplitude so long as the dead time setting is greater than the progr ...
Causes for Amplitude Compression
... In the small signal domain the responses are equally spaced according to variation of the terminal voltage U1. The distinct minimum shows the resonance frequency fs rising from 75 Hz to 95 Hz with amplitude. The shape of the response also changes dramatically due to variation of stiffness Kms(x) and ...
... In the small signal domain the responses are equally spaced according to variation of the terminal voltage U1. The distinct minimum shows the resonance frequency fs rising from 75 Hz to 95 Hz with amplitude. The shape of the response also changes dramatically due to variation of stiffness Kms(x) and ...
10-Bit, 6-Channel Decimating LCD DecDriver with Level Shifters AD8384
... process developed by Analog Devices, Inc. This process provides fast input logic, bipolar DACs with trimmed accuracy and fast settling, high voltage, precision drive amplifiers on the same chip. The AD8384 dissipates 1.1 W nominal static power. The AD8384 is offered in an 80-lead 12 mm × 12 mm TQFP ...
... process developed by Analog Devices, Inc. This process provides fast input logic, bipolar DACs with trimmed accuracy and fast settling, high voltage, precision drive amplifiers on the same chip. The AD8384 dissipates 1.1 W nominal static power. The AD8384 is offered in an 80-lead 12 mm × 12 mm TQFP ...
Description Pin Assignments
... voltage is lower than the low side of the COSC voltage, the motor will run at full speed. See “Speed Control and Minimum Speed Setting” figure. An input DC voltage from 3.6V to 1.9V (for 12V supply) on the VPWM pin controls the output PWM duty form 0% to 100% thus allowing speed control from 0% to 1 ...
... voltage is lower than the low side of the COSC voltage, the motor will run at full speed. See “Speed Control and Minimum Speed Setting” figure. An input DC voltage from 3.6V to 1.9V (for 12V supply) on the VPWM pin controls the output PWM duty form 0% to 100% thus allowing speed control from 0% to 1 ...
FEATURES DESCRIPTION D
... The OPA360 filter is a Sallen-Key topology with a 9MHz cutoff frequency. This allows the video signals to pass without any visible distortion, as shown in Figure 3 through Figure 5. The video DACs embedded in TI’s Digital Media Processors over-sample at 27MHz. At this frequency, the attenuation is t ...
... The OPA360 filter is a Sallen-Key topology with a 9MHz cutoff frequency. This allows the video signals to pass without any visible distortion, as shown in Figure 3 through Figure 5. The video DACs embedded in TI’s Digital Media Processors over-sample at 27MHz. At this frequency, the attenuation is t ...
Analog-to-digital converter
An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.The conversion involves quantization of the input, so it necessarily introduces a small amount of error. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input. The result is a sequence of digital values that have been converted from a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal.An ADC is defined by its bandwidth (the range of frequencies it can measure) and its signal to noise ratio (how accurately it can measure a signal relative to the noise it introduces). The actual bandwidth of an ADC is characterized primarily by its sampling rate, and to a lesser extent by how it handles errors such as aliasing. The dynamic range of an ADC is influenced by many factors, including the resolution (the number of output levels it can quantize a signal to), linearity and accuracy (how well the quantization levels match the true analog signal) and jitter (small timing errors that introduce additional noise). The dynamic range of an ADC is often summarized in terms of its effective number of bits (ENOB), the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required signal to noise ratio of the signal to be quantized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then perfect reconstruction is possible given an ideal ADC and neglecting quantization error. The presence of quantization error limits the dynamic range of even an ideal ADC, however, if the dynamic range of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the input signal.An ADC may also provide an isolated measurement such as an electronic device that converts an input analog voltage or current to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes. Typically the digital output will be a two's complement binary number that is proportional to the input, but there are other possibilities. An encoder, for example, might output a Gray code.The inverse operation is performed by a digital-to-analog converter (DAC).