• Study Resource
  • Explore
    • Arts & Humanities
    • Business
    • Engineering & Technology
    • Foreign Language
    • History
    • Math
    • Science
    • Social Science

    Top subcategories

    • Advanced Math
    • Algebra
    • Basic Math
    • Calculus
    • Geometry
    • Linear Algebra
    • Pre-Algebra
    • Pre-Calculus
    • Statistics And Probability
    • Trigonometry
    • other →

    Top subcategories

    • Astronomy
    • Astrophysics
    • Biology
    • Chemistry
    • Earth Science
    • Environmental Science
    • Health Science
    • Physics
    • other →

    Top subcategories

    • Anthropology
    • Law
    • Political Science
    • Psychology
    • Sociology
    • other →

    Top subcategories

    • Accounting
    • Economics
    • Finance
    • Management
    • other →

    Top subcategories

    • Aerospace Engineering
    • Bioengineering
    • Chemical Engineering
    • Civil Engineering
    • Computer Science
    • Electrical Engineering
    • Industrial Engineering
    • Mechanical Engineering
    • Web Design
    • other →

    Top subcategories

    • Architecture
    • Communications
    • English
    • Gender Studies
    • Music
    • Performing Arts
    • Philosophy
    • Religious Studies
    • Writing
    • other →

    Top subcategories

    • Ancient History
    • European History
    • US History
    • World History
    • other →

    Top subcategories

    • Croatian
    • Czech
    • Finnish
    • Greek
    • Hindi
    • Japanese
    • Korean
    • Persian
    • Swedish
    • Turkish
    • other →
 
Profile Documents Logout
Upload
MAX3291,92 - Part Number Search
MAX3291,92 - Part Number Search

... operate from a single +5V supply and offer a low-current shutdown mode that reduces supply current to 100nA. They feature driver output short-circuit current limiting and a fail-safe receiver input that guarantees a logic-high output if the input is open circuit. A 1/4-unitload receiver input impeda ...
Noise in relaxation oscillators
Noise in relaxation oscillators

OPA692 数据资料 dataSheet 下载
OPA692 数据资料 dataSheet 下载

... The OPA692 provides an easy to use, broadband fixed gain video buffer amplifier. Depending on the external connections, the internal resistor network may be used to provide either a fixed gain of +2 video buffer or a gain of +1 or –1 voltage buffer. Operating on a very low 5.1mA supply current, the ...
Sinusoids
Sinusoids

AD7112 数据手册DataSheet 下载
AD7112 数据手册DataSheet 下载

... Place this ground as close as possible to the AD7112. Connect all analog grounds to this star ground, and also connect the AD7112 DGND to this ground. Do not connect any other digital grounds to this analog ground point. Low impedance analog and digital power supply common returns are essential for ...
Single-Supply, High-Speed, Precision
Single-Supply, High-Speed, Precision

... (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) ...
BW n - TI E2E Community
BW n - TI E2E Community

... ROUT is the effect of RO, Aol, and β controlling VO – Closed Loop feedback (β) forces VO to increase or decrease as needed to accommodate VO loading – Closed Loop (β) increase or decrease in VO appears at VOUT as a reduction in RO – ROUT increases as Loop Gain (Aolβ) decreases ...
AP3598A General Description EV Board Schematic
AP3598A General Description EV Board Schematic

Detection circuit with dummy integrator to compensate for switch
Detection circuit with dummy integrator to compensate for switch

TPS40200-HT 数据资料 dataSheet 下载
TPS40200-HT 数据资料 dataSheet 下载

... external clock, RC must be pulled below 150 mV for 20 ns or more. The external clock frequency must be higher than the free-running frequency of the converter as well. When synchronizing the controller, if RC is held low for an excessive amount of time, erratic operation may occur. The maximum amoun ...
ONET8531T 数据资料 dataSheet 下载
ONET8531T 数据资料 dataSheet 下载

... The ONET8531T is a high-speed and high-gain limiting-transimpedance amplifier, used in optical receivers with data rates up to 12.5 Gbps. It features low input referred noise, 10 GHz bandwidth, 4.5 kΩ small signal transimpedance, and a received signal strength indicator (RSSI). The ONET8531T is avai ...
AD 822 AR
AD 822 AR

P4M644YL, P8M648YL SDRAM MODULE 4M, 8M x 64 DIMM
P4M644YL, P8M648YL SDRAM MODULE 4M, 8M x 64 DIMM

LMV321/358/324 Single/Dual/Quad Gen Purpose, Low V, R-to
LMV321/358/324 Single/Dual/Quad Gen Purpose, Low V, R-to

Load Cell Measurement using the CS3001/02/11/12
Load Cell Measurement using the CS3001/02/11/12

NCP1631PFCGEVB Interleaved PFC Stage Driven by the NCP1631 Evaluation Board User's
NCP1631PFCGEVB Interleaved PFC Stage Driven by the NCP1631 Evaluation Board User's

... are combined to form our 300−W PFC pre−regulator. This approach has several merits like the ease of implementation, the use of more but smaller components or a better heat distribution. Also, Interleaving extends the power range of Critical Conduction Mode (CrM) that is an efficient and cost−effecti ...
AD7470 数据手册DataSheet下载
AD7470 数据手册DataSheet下载

... www.BDTIC.com/ADI ...
tb70.pdf
tb70.pdf

CD74HCT4067-Q1 数据资料 dataSheet 下载
CD74HCT4067-Q1 数据资料 dataSheet 下载

... Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to +7 V Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp curre ...
a 1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs AD7470/AD7472
a 1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs AD7470/AD7472

... DVDD to AGND/DGND . . . . . . . . . . . . . . . . . –0.3 V to +7 V VDRIVE to AGND/DGND . . . . . . . . . . . . . . . . –0.3 V to +7 V AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V VDRIVE to DVDD . . . . . . . . . . . . . . . –0.3 V to DVDD + 0.3 V AGND to DGND . . . . . . ...
INA101 数据资料 dataSheet 下载
INA101 数据资料 dataSheet 下载

... obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the speci ...
Non-inverting amplifier
Non-inverting amplifier

... S (V/ms) = 0.3 fT (MHz); fT = frequency at which gain = 1 ...
harmonic reduction in a single-switch three-phase
harmonic reduction in a single-switch three-phase

... range complicates boost inductor design, device selection, and EMI filter design. The second example [4] concerns an output low-frequency ripple (sixth-order) feedback control PWM. For a rectifier with a resistive load and fed by a balanced threephase AC power, the sixth-order output voltage ripple ...
ST7580 power line communication system-on
ST7580 power line communication system-on

NE555 555 Timer - West Florida Components
NE555 555 Timer - West Florida Components

< 1 ... 48 49 50 51 52 53 54 55 56 ... 241 >

Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is ""fed back"" toward the input forming a loop.Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
  • studyres.com © 2025
  • DMCA
  • Privacy
  • Terms
  • Report