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74LCX257 Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs 7
74LCX257 Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs 7

... outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true (non inverted) form. The ...
High Efficiency, Fast Transient Synchronous Step
High Efficiency, Fast Transient Synchronous Step

LSF010x 1/2/8 Channel Bidirectional Multi
LSF010x 1/2/8 Channel Bidirectional Multi

... Increased MAX value for TA, Operating free-air temperature, from 85°C to 125°C. .............................................................. 5 ...
ADL5387 数据手册DataSheet 下载
ADL5387 数据手册DataSheet 下载

... range suitable for the demanding infrastructure direct-conversion requirements. The differential RF/IF inputs provide a wellbehaved broadband input impedance of 50 Ω and are best driven from a 1:1 balun for optimum performance. ...
0.1Hz to 10Hz Noise Filter
0.1Hz to 10Hz Noise Filter

... It is important for this circuit to have good gain accuracy and accurate cutoff frequencies. The accuracy of the cutoff frequencies is determined by tolerance of the resistors and capacitors in the filters. In general, the tolerance of the capacitors will be the limiting factor. The COG / NPO type c ...
ADC0802, ADC0803 ADC0804
ADC0802, ADC0803 ADC0804

9-W Stereo Class-D Audio Power Amplifier w/DC Volume Control
9-W Stereo Class-D Audio Power Amplifier w/DC Volume Control

... are enabled. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode to be used as line-level outputs for external amplifiers. ...
MAX5037A VRM 9.0/VRM 9.1, Dual-Phase, Parallelable, Average-Current-Mode Controller General Description
MAX5037A VRM 9.0/VRM 9.1, Dual-Phase, Parallelable, Average-Current-Mode Controller General Description

... The MAX5037A dual-phase, PWM controller provides high-output-current capability in a compact package with a minimum number of external components. The MAX5037A utilizes a dual-phase, average-current-mode control that enables optimal use of low R DS(ON) MOSFETs, eliminating the need for external heat ...
ONET4291T 数据资料 dataSheet 下载
ONET4291T 数据资料 dataSheet 下载

... cancellation, AGC, and RSSI control circuit block. If the dc input current exceeds a certain level, it is partially cancelled by means of a controlled current source. This measure keeps the transimpedance amplifier stage within sufficient operating point limits for optimum performance. Furthermore, ...
ADC0802, ADC0803 ADC0804
ADC0802, ADC0803 ADC0804

Study on the Frequency Dependence of Harmonic Current
Study on the Frequency Dependence of Harmonic Current

Title : Feasible Performance Evaluations of Digitally
Title : Feasible Performance Evaluations of Digitally

... oscillating switching technique. The phase error is suppressed in a wide range of operating frequencies in comparison with Phase Locked Loop (PLL) techniques. The proposed switching method has the capability of tuning under fast changes in the resonant frequency. According to this switching method, ...
MCF5474 数据手册 DataSheet 下载
MCF5474 数据手册 DataSheet 下载

LM3915 Dot/Bar Display Driver
LM3915 Dot/Bar Display Driver

AN3499, Clock Options on the HC9S08 Family
AN3499, Clock Options on the HC9S08 Family

System clocks
System clocks

...  Allows the CPU and peripherals to operate from different clock sources;  The system clocks depend on the device in the MSP430 family:  MSP430x2xx: • The Basic Clock Module+ (BCM+); – One or two oscillators (depending on the device); – Capable of working with external crystals or resonators; – In ...
Cut Sheet - Myers Power Products
Cut Sheet - Myers Power Products

3-A 60-V Step-Down DC/DC Converter With
3-A 60-V Step-Down DC/DC Converter With

... Using the enable pin, the supply shutdown current is reduced to 1 μA. An open drain reset signal indicates when the nominal output drops below the threshold set by an external resistor divider network. The output voltage start up ramp is controlled by a soft start capacitor. There is an internal und ...
TPA3110D2 数据资料 dataSheet 下载
TPA3110D2 数据资料 dataSheet 下载

... Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to abso ...
LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational
LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational

... Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absol ...
AD8325 - Analog Devices
AD8325 - Analog Devices

System clocks
System clocks

...  Allows the CPU and peripherals to operate from different clock sources;  The system clocks depend on the device in the MSP430 family:  MSP430x2xx: • The Basic Clock Module+ (BCM+); – One or two oscillators (depending on the device); – Capable of working with external crystals or resonators; – In ...
AVR1606: XMEGA Internal RC Oscillator Calibration
AVR1606: XMEGA Internal RC Oscillator Calibration

MT8880
MT8880

AN-804 Improving A/D Converter Performance Using Dither
AN-804 Improving A/D Converter Performance Using Dither

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Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is ""fed back"" toward the input forming a loop.Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
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