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Q1 - Texas Instruments
Q1 - Texas Instruments

... differential receiver, which operate from a single power supply. In the 'HVD1782, the driver differential outputs and the receiver differential inputs are connected internally to form a bus port suitable for half-duplex (two-wire bus) communication. This port features a wide common-mode voltage rang ...
Nonvolatile Memory, 1024-Position Digital Potentiometer AD5231
Nonvolatile Memory, 1024-Position Digital Potentiometer AD5231

... that uses a standard 3-wire serial interface for 16 modes of operation and adjustment, including scratchpad programming, memory storing and restoring, increment/decrement, ±6 dB/step log taper adjustment, wiper setting readback, and extra EEMEM for user-defined information, such as memory data for o ...
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SKY13415-485LF 数据资料DataSheet下载

... TSTG ...
MN-0000035 r5 SLM-5650A 2
MN-0000035 r5 SLM-5650A 2

... ©2011 by Comtech EF Data, Inc. All rights reserved. No part of this manual may be copied or reproduced without prior written permission of Comtech EF Data, Inc. IMPORTANT NOTE: The information contained in this document supersedes all previously published information regarding this product. Product ...
AD8195 数据手册DataSheet 下载
AD8195 数据手册DataSheet 下载

... color (12-bit color) HDMI formats and greater than UXGA (1600 × 1200) DVI resolutions. Input cable equalizer enables use of long cables; more than 20 meters (24 AWG) at data rates up to 2.25 Gbps. Auxiliary buffer isolates and buffers the DDC bus and CEC line for a single chip, fully HDMI 1.3a-compl ...
AAT3177 数据资料DataSheet下载
AAT3177 数据资料DataSheet下载

... Features ...
AD7893 - Analog Devices
AD7893 - Analog Devices

... Serial Data Output. Serial data from the AD7893 is provided at this output. The serial data is clocked out by the rising edge of SCLK and is valid on the falling edge of SCLK. Sixteen bits of serial data are provided with four leading zeros followed by the 12 bits of conversion data. On the sixteent ...
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NE5000E Product Description

... the customer. All or part of the products, services and features described in this document may not be within the purchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information, and recommendations in this document are provided "AS IS" without warranties, ...
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Fachbereich Informatik und Elektrotechnik

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TCAM - Renesas e-Learning

... address, and receives the data stored at the supplied address  With a CAM, the operating system supplies the data, and the CAM returns a list of addresses where the data is stored, if it finds any  A CAM searches the entire memory in one operation, so it is considerably faster than RAM  Any switc ...
ADF4360-1 Integrated Synthesizer and VCO Data Sheet (REV. 0)
ADF4360-1 Integrated Synthesizer and VCO Data Sheet (REV. 0)

... The dual-modulus prescaler (P/P + 1), along with the A and B counters, enables the large division ratio, N, to be realized (N = BP + A). The dual-modulus prescaler, operating at CML levels, takes the clock from the VCO and divides it down to a manageable frequency for the CMOS A and B counters. The ...
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Mobile Device Power Monitor Manual

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SN74GTLPH16916 数据资料 dataSheet 下载

... Additionally, the SN74GTLPH16916 allows for transparent conversion of CLKAB-to-GTLP signal levels (CLKOUT) and CLKOUT-to-LVTTL logic levels (CLKIN). Data flow in each direction is controlled by clock enables (CEAB and CEBA), latch enables (LEAB and LEBA), clock (CLKAB and CLKBA), and output enables ...
DS2781 - Maxim Part Number Search
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... In SLEEP mode, the DS2781 conserves power by disabling measurement and capacity estimation functions, but preserves register contents. SLEEP mode is entered under two different conditions. An enable bit makes entry into SLEEP optional for each condition. The first condition in which SLEEP is entered ...
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MAX3171/MAX3173 +3.3V Multiprotocol 3Tx/3Rx Software-Selectable Control Transceivers General Description

... data communications equipment (DCE) interface port that supports V.28 (RS-232) and V.10/V.11 (RS-449, V.36, EIA-530, EIA-530-A, X.21, RS-423) protocols. The MAX3171/MAX3173 transceivers carry the serial interface control signaling; the MAX3170 transceivers carry the clock and data signals. The MAX31 ...
High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator MAX9611/MAX9612 General Description Features
High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator MAX9611/MAX9612 General Description Features

... voltage (440mV, 110mV, and 55mV) allows for a wide dynamic range current measurement and application flexibility in choosing sense resistor values. The I2C bus is 1.8V and 3.3V logic compatible and can interface with modern microcontrollers. An internal 12-bit, 500sps integrating analog-to-digital c ...
Complete PDF Edition (1,164 KB)
Complete PDF Edition (1,164 KB)

... The NF series features IGBT modules that use CSTBTs. CSTBTs, which surpass the theoretical barriers for IGBT performance, have the most advanced fundamental characteristics while still using essentially the same technology as conventional trench IGBTs. In planning NF Series products, ease of use and ...
Full User Guide ACT350 Transmitter English (30MB)
Full User Guide ACT350 Transmitter English (30MB)

... This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment genera ...
BDTIC www.BDTIC.com/infineon Wireless Components ASK/FSK Single Conversion Receiver
BDTIC www.BDTIC.com/infineon Wireless Components ASK/FSK Single Conversion Receiver

... All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes the type of component and shall not b ...
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MAX34408/MAX34409 SMBus Dual/Quad Current Monitor General Description Features

... hardware output to provide an immediate indication to shut down any necessary external circuitry. The devices provide an ALERT output signal. Host communications are conducted through a SMBus-compatible communications port. ...
RIGHT ARM®3 - Apollo Design
RIGHT ARM®3 - Apollo Design

SN65HVD178x Fault-Protected RS-485
SN65HVD178x Fault-Protected RS-485

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Silicon photonics-wireless interface ICs for micro-/millimeter

HFDN-26.2 MAX3735A Laser Driver Output Configurations, Part 3
HFDN-26.2 MAX3735A Laser Driver Output Configurations, Part 3

... large affect on the overall performance when using a differential-drive output. Ideally, the laser anode and cathode should be isolated from the case and the photodiode when using a differential-drive structure (Configuration #1, Figure 9). The other configurations can also work, but performance wil ...
Interfacing LVPECL 3.3V Drivers with Xilinx 2.5V Differential Receivers Summary
Interfacing LVPECL 3.3V Drivers with Xilinx 2.5V Differential Receivers Summary

... a reduction of the common mode voltage. This technique can provide protection against extreme DC voltages and can be useful for board-to-board or system-to-system interfaces. An example of such an interface is shown in Figure 6. AC coupling of links that have long idle periods, or where the signal i ...
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UniPro protocol stack

In mobile-telephone technology, the UniPro protocol stack follows the architecture of the classical OSI Reference Model. In UniPro, the OSI Physical Layer is split into two sublayers: Layer 1 (the actual physical layer) and Layer 1.5 (the PHY Adapter layer) which abstracts from differences between alternative Layer 1 technologies. The actual physical layer is a separate specification as the various PHY options are reused in other MIPI Alliance specifications.The UniPro specification itself covers Layers 1.5, 2, 3, 4 and the DME (Device Management Entity). The Application Layer (LA) is out of scope because different uses of UniPro will require different LA protocols. The Physical Layer (L1) is covered in separate MIPI specifications in order to allow the PHY to be reused by other (less generic) protocols if needed.OSI Layers 5 (Session) and 6 (Presentation) are, where applicable, counted as part of the Application Layer.
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