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PCA9517 1. General description Level translating I
PCA9517 1. General description Level translating I

... While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517 enables the system ...
SOC-CH5b
SOC-CH5b

... leave node after h=1 cycles) ...
74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs 7
74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs 7

... www.fairchildsemi.com ...
USB1T11A — Universal Serial Bus Transceiver U S B
USB1T11A — Universal Serial Bus Transceiver U S B

... The USB1T11A is a one-chip, generic USB transceiver. It is designed to allow 5.0V or 3.3V programmable and standard logic to interface with the physical layer of the Universal Serial Bus. It is capable of transmitting and receiving serial data at both full-speed (12Mbit/s) and low-speed (1.5Mbit/s) ...
DS1821 Programmable Digital Thermostat and Thermometer FEATURES PIN ASSIGNMENT
DS1821 Programmable Digital Thermostat and Thermometer FEATURES PIN ASSIGNMENT

... When the DS1821 is in thermostat mode (T/R̄ = 1 in the status/configuration register), temperature conversions are performed continuously beginning at power-up (regardless of the value of the 1SHOT bit), and the DQ pin serves as the thermostat output. The DQ output will become active when the temper ...
tele - De Montfort University
tele - De Montfort University

... There is a penalty with this concept. The propagation delay within the complete network must be substantially less than bit rate, to ensure that a competing bit from the opposite end of the network arrives in time arbitrate with all nodes. 2.3 LLC Layer In the discussion of the MAC layer it will be ...
ADS1110: 16-Bit Analog-to-Digital Converter with Onboard
ADS1110: 16-Bit Analog-to-Digital Converter with Onboard

... carries data; SCL provides the clock. All data is transmitted across the I2C bus in groups of eight bits. To send a bit on the I2C bus, the SDA line is driven to the appropriate level while SCL is LOW (a LOW on SDA indicates the bit is zero; a HIGH indicates the bit is one). Once the SDA line has se ...
Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator ADM3052
Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator ADM3052

... The ADM3052 is an isolated controller area network (CAN) physical layer transceiver with a V+ integrated linear regulator. The ADM3052 complies with the ISO 11898 standard. The device employs Analog Devices, Inc., iCoupler® technology to combine a 3-channel isolator, a CAN transceiver, and a linear ...
ABRIDGED DATA SHEET DS28E01-100 1Kb Protected 1-Wire EEPROM with SHA-1 Engine
ABRIDGED DATA SHEET DS28E01-100 1Kb Protected 1-Wire EEPROM with SHA-1 Engine

... relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed. System requirement. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The specified value here applies to systems w ...
Triggering on MIL-STD 1553 Signals
Triggering on MIL-STD 1553 Signals

...  Signal transitions should always occur near mid-point of each bit time.  Signal transitions may or may not occur near bit time boundaries. ...
MAX3053 ±80V Fault-Protected, 2Mbps, Low Supply Current CAN Transceiver General Description
MAX3053 ±80V Fault-Protected, 2Mbps, Low Supply Current CAN Transceiver General Description

... the bus lines in a CAN. It is primarily intended for industrial systems requiring data rates up to 2Mbps and features ±80V fault protection against shorts to high-voltage power buses. The device provides differential transmit capability to the bus and differential receive capability to the CAN contr ...
EFFICIENT FPGA IMPLEMENTATION OF PWM CORE
EFFICIENT FPGA IMPLEMENTATION OF PWM CORE

... sophisticated IP cores to fulfill application-specific needs. • Each IP core needs silicon technology support to ensure that the IP core is reusable and verified. • The integrated-circuit industry is entering a system-on-chip era in which IP cores will be the key to enhancing design productivity and ...
Designing High-Power Arrays Using Maxi, Mini and Micro
Designing High-Power Arrays Using Maxi, Mini and Micro

... High-speed buffering may be required with large arrays or if the distance between modules is greater than a few inches. This is because all modules, except the one that’s talking, are in the listening mode. Each listener presents a load to the master (talker) of approximately 500 Ω shunted by 30 pF; ...
DS1372 General Description Features
DS1372 General Description Features

... Measured with a 32.768kHz crystal attached to the X1 and X2 pins. The I2C minimum operating frequency is imposed by the requirement of timeout period. The first clock pulse is generated after this period. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to ...
Fundamentals of Bus Bar Protection
Fundamentals of Bus Bar Protection

... ZR – relay tap impedance ZC – sum of all linear coupler self impedances If = 8000 A Internal Bus ...
abridged data sheet - Maxim Part Number Search
abridged data sheet - Maxim Part Number Search

... relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed. System requirement. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The specified value here applies to systems w ...
The Power Flow Equations
The Power Flow Equations

... quantities. We motivate these ideas by introducing a simple example. We assume that all electrical variables in this document are given in the per-unit system. Fig. 1 shows a network represented in a hybrid fashion using oneline diagram representation for the nodes (buses 1-4) and circuit representa ...
Transmission at 200 Mbps in VME Card Cage
Transmission at 200 Mbps in VME Card Cage

... termination resistors. The double termination doubles the load on the driver. To maintain the same signal levels on the bus as for a singly-terminated LVDS, the line driver current must be doubled, because it sources two transmission lines in parallel. Double termination of the bus allows for half-d ...
ADS1000 数据资料 dataSheet 下载
ADS1000 数据资料 dataSheet 下载

... carries data; SCL provides the clock. All data is transmitted across the I2C bus in groups of eight bits. To send a bit on the I2C bus, the SDA line is driven to the bit level while SCL is low (a Low on SDA indicates the bit is '0'; a High indicates the bit is '1'). Once the SDA line has settled, th ...
PL-2303 USB to RS-232 Bridge Controller Product
PL-2303 USB to RS-232 Bridge Controller Product

... ds_pl2303_v14 ...
MX7534/MX7535 Microprocessor-Compatible, 14-Bit DACs _______________General Description
MX7534/MX7535 Microprocessor-Compatible, 14-Bit DACs _______________General Description

... must be grounded directly to a single-point ground through a separate, very-low-resistance path. Note that the output currents at IOUT and AGNDF vary with input code and create code-dependent error if these terminals are connected to ground (or a virtual ground) through a resistive path. To obtain h ...
The Power Flow Equations
The Power Flow Equations

... quantities. We motivate these ideas by introducing a simple example. We assume that all electrical variables in this document are given in the per-unit system. Fig. 1 shows a network represented in a hybrid fashion using oneline diagram representation for the nodes (buses 1-4) and circuit representa ...
Documentation
Documentation

... EN 60079-15. A housing with protection class IP54 is required for non-conductive dust. IP6X is required for conductive dust according to EN 60079-31. Observe the temperature at the cable entry points into the housing. If the temperature during nominal operation is higher than 70 °C at the entry poin ...
Impedance Spectroscopy, Strength and Limitations
Impedance Spectroscopy, Strength and Limitations

... show the number of time constants (transport, transfer and relaxation processes) that contribute to the frequency dispersion. Using just a simple equivalent circuit may yield visually an acceptable fit in the impedance or admittance representation, or even a seemingly excellent fit in a Bode represe ...
SN65HVD26x Turbo CAN Transceivers for CAN FD (Flexible Data
SN65HVD26x Turbo CAN Transceivers for CAN FD (Flexible Data

... Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absol ...
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MIL-STD-1553

MIL-STD-1553 is a military standard published by the United States Department of Defense that defines the mechanical, electrical, and functional characteristics of a serial data bus. It was originally designed as an avionic data bus for use with military avionics, but has also become commonly used in spacecraft on-board data handling (OBDH) subsystems, both military and civil. It features multiple (commonly dual) redundant balanced line physical layers, a (differential) network interface, time division multiplexing, half-duplex command/response protocol, and can handle up to 31 remote terminals (devices). A version of MIL-STD-1553 using optical cabling in place of electrical is known as MIL-STD-1773.MIL-STD-1553 was first published as a U.S. Air Force standard in 1973, and first was used on the F-16 Falcon fighter aircraft. Other aircraft designs quickly followed, including the F-18 Hornet, AH-64 Apache, P-3C Orion, F-15 Eagle and F-20 Tigershark. It now is widely used by all branches of the U.S. military and has been adopted by NATO as STANAG 3838 AVS. STANAG 3838, in the form of UK MoD Def-Stan 00-18 Part 2, is used on the Panavia Tornado; BAE Systems Hawk (Mk 100 and later); and extensively, together with STANAG 3910 - ""EFABus"", on the Eurofighter Typhoon. Saab JAS 39 Gripen uses MIL-STD-1553B. The Russian made MiG-35 also uses MIL-STD-1553. MIL-STD-1553 is being replaced on some newer U.S. designs by IEEE 1394.
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