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a 14-Bit, 125 MSPS TxDAC D/A Converter
a 14-Bit, 125 MSPS TxDAC D/A Converter

... Differential current outputs are provided to support singleended or differential applications. Matching between the two current outputs ensures enhanced dynamic performance in a differential output configuration. The current outputs may be tied directly to an output resistor to provide two complemen ...
MAX13174E +5V Multiprotocol, Pin-Selectable Cable Terminator General Description
MAX13174E +5V Multiprotocol, Pin-Selectable Cable Terminator General Description

... 104Ω typical differential resistance and high-Z common-mode impedance. The MAX13170E's internal V.28 termination is disabled by opening S3. The V.11 specification allows for signals with commonmode variations of ±7V and differential signal amplitudes from 2V to 6V. The MAX13174E maintains terminatio ...
STLC3075
STLC3075

... to generate the negative battery voltage needed for the device operation. The DC/DC converter controller is synchronized with an external CLK (125 kHz typ.) or with an internal clock generated when the pin CLK is connected to CVCC. One RSENSE in series to PGND supply (Flyback) or to VPOS supply (Buc ...
AMES Sample
AMES Sample

... numbers. So, how do you multiply a string of numbers against another string of numbers? Take the first number in Row 1, multiply it by the first number in Column 1, add it to the second number in the row times the second number in the column, and continue the process for that row and column. This su ...
High Speed Digital Input Buffer Circuits
High Speed Digital Input Buffer Circuits

R Metric and ultrametric spaces of resistances a
R Metric and ultrametric spaces of resistances a

... all equations are satisfied, and we stop. Yet otherwise, we obviously can proceed with the potential reduction. Thus, the limit values of x solve (G, a, b) for xa = x0a and xb = x0b .  Remark 1 A very similar monotone potential reduction, or pumping, algorithm for stochastic games with perfect infor ...
MAX3188E/MAX3189E ±15kV ESD-Protected, 1Mbps, 1µA RS-232 Transmitters in SOT23-6 General Description
MAX3188E/MAX3189E ±15kV ESD-Protected, 1Mbps, 1µA RS-232 Transmitters in SOT23-6 General Description

... TIN, SHDN to GND ...................................................-0.3V to +7V TOUT to GND (SHDN = GND)..........................................±13.2V TOUT to GND (SHDN = VCC) ................................................±7V ...
An Introduction to BJT
An Introduction to BJT

... VCE = VCC – ICRC = 10 – 2010-3220 = 5.6 V This Q-Point is shown as Q1. (b) IC = dcIB = 100300  10-3 = 30 mA VCE = VCC – ICRC = 10 – 3010-3220 = 3.4 V This Q-Point is shown as Q2. (c) IC = dcIB = 100400  10-6 = 20 mA VCE = VCC – ICRC = 10 – 4010-3220 = 1.2 V This Q-Point is shown as Q3. ...
electric circuits - Van Buren Public Schools
electric circuits - Van Buren Public Schools

Hex Inverters (Rev. B)
Hex Inverters (Rev. B)

... Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO ...
Figure 2.3 S-Parameter 2-port networks. [4 ]
Figure 2.3 S-Parameter 2-port networks. [4 ]

... A balun circuit is a type of electrical transformer which converts balanced electrical signals to unbalanced electrical signals and vice-versa. A balanced or differential signal is the one which has both its conductors having equal voltages and an unbalanced or singleended signal is the one having o ...
Lecture 13: Amplifier Noise Calculations - RFIC
Lecture 13: Amplifier Noise Calculations - RFIC

... impedance match and low noise figure. We see that the noise figure of an LNA using MOSFETs can be made low by increasing the gm of the device and with proper layout (multi-finger device). But the gate of a MOSFET is predominantly capacitive which presents a bad match to 50Ω Do we really need to do a ...
AD630 数据手册DataSheet 下载
AD630 数据手册DataSheet 下载

... The feedback synthesis of the AD630 may also include reactive impedance. The gain magnitudes will match at all frequencies if the A impedance is made to equal the parallel combination of the B and F impedances. The same considerations apply to the AD630 as to conventional op amp feedback circuits. V ...
EEC 115 Electrical Engg Science 1 theory - Unesco
EEC 115 Electrical Engg Science 1 theory - Unesco

High Speed, Triple Differential Receiver with Comparators AD8145
High Speed, Triple Differential Receiver with Comparators AD8145

... The maximum safe power dissipation in the AD8145 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the ...
Equalizing voltage levels in MV distribution network of Elektra Zagreb
Equalizing voltage levels in MV distribution network of Elektra Zagreb

... supply of medium voltage (MV) network from one 110/10 kV or 30/10 kV substation to another is conducted almost on daily basis due to different reason, for example maintenance process. This kind of manipulations can cause severe change of voltage levels in low voltage (LV) network powered by 10/0,4 k ...
STGP19NC60S
STGP19NC60S

... Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ...
Applications of Circuits
Applications of Circuits

AP2552-53(A) - Diodes Incorporated
AP2552-53(A) - Diodes Incorporated

Stability Investigation using SPICE of BUCK DC-DC Converter
Stability Investigation using SPICE of BUCK DC-DC Converter

... The basic methods of control used in the BUCK DC-DC converters are voltage mode control (VMC), peak current mode control (CMC) and average current mode control (ACMC). Their advantages and disadvantages are systematically summarized in [1,2,3]: Voltage Mode Control: The advantages are: stable modula ...
for t>0.
for t>0.

single stage-cascode
single stage-cascode

Understanding The TV Horizontal Output Stage
Understanding The TV Horizontal Output Stage

Monolithic transformers and their application in a differential CMOS
Monolithic transformers and their application in a differential CMOS

... complete transformer. The element values of the compact model of Fig. 1(d) are chosen to provide a good fit between the impedance characteristics of the compact and complete models. As suggested in Fig. 1(d), the compact circuit model is symmetrical because the primary and the secondary spirals are ...
299 8.1 COMBINED ANALOG/DIGITAL COMPUTING ELEMENTS
299 8.1 COMBINED ANALOG/DIGITAL COMPUTING ELEMENTS

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