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Transcript
ECE 570
Session 4
Computer Aided Engineering for Integrated Circuits
IC 752-E
Diode model
Objective:
Introduce concepts in device modeling for circuit analysis
Outline:
1. P-N junction diode DC model
2. Dynamic model
3. Diode equivalent circuit
Supplemental reading:
Antognetti and Massobrio, Chapter 1
1
1. P-N junction diode DC model
Supporting reading: Antognetti, Massobrio, model based on P-N junction theory.
Circuit symbol
vD
+
N1
-
N2
iD
The relations are composed of: A) static model (I-V characteristics)
A) dynamic model- (C-V characteristics).
Static model
An important constant - thermal voltage:
kT
VT =
q
k - Boltzmann constant, T - absolute temperature, q - electron charge.
2
I-V characteristic
Is e
vD
nVT
− 1 + v DGmin
;
−5VT ≤ v D
− I s + v DGmin
;
− BV < v D < −5VT
− I BV
;
v D = − BV
;
v D ≤ BV
iD =
Is e
BV + v D
nVT
BV
−1+
VT
Model parameters:
n - emission coefficient (empirical, 1 ≤ n ≤ 2 ), I s - saturation current,
I BV - break down current,
BV
- break down voltage,
Gmin
- minimum conductance (introduced to facilitate numerical calculations).
3
Sketches of I-V relations
Logarithmic scale ( v D ≥ −5VT )
Linear scale
iD
ln ( i D ) = ln ( I s ) +
− BV
vD
VT
1 vD
n VT
ln ( i D )
Slope =
1
n
vD
VT
4
2. Dynamic model (describing charge storage capability)
Two components are distinguished in the charge,
QD
, stored in a diode
Q D = Q s + Qd
Qs
- the charge stored in the neutral regions (NR), formed by minority carriers injected
into NR. This charge is determined by the formula
Qs = τ D i D
where
τ D is the transit time, a model parameter.
Qd
- the depletion region charge, also called the junction charge or space charge.
The model of junction charge is based on approximate theory of abrupt P-N junction.
The model of junction charge can be represented in the integral form
−m
v
Qd = C do
D
1−
0
where:
m
Φo
v
Φo
dv
1
≤m≤
- is the grading coefficient (empirical, 3
- is the junction built-in potential,
capacitance.
Cdo
1
2 ),
- is the zero bias junction
5
Note:
Cdo
- as a zero bias junction capacitance is often denoted by
C jo
. This is an
incremental capacitance
The diode charge storing capability in the depletion region can alternatively be represented by
an incremental capacitance
−m
dQd
vD
= C do 1 −
Cd =
Φo
dv D
.
6
The model of depletion charge is discontinuous at v D = Φ o . In practice v D < Φ o and
theoretically there is no problem with this discontinuity. However, in actual computations, due
to numerical errors it is possible that v D ≥ Φ o and the model has to be modified. A
modification used in SPICE is explained in the figure below:
Cd
Theoretica
l relation
Numerical
approximation
C do
FC ⋅ Φ o
Φo
vD
The parameter FC determines the diode potential assumed as a fraction ( 0 < FC < 1 ) of built
in voltage, Φ 0 , above which the diode C-V characteristic is represented a linear function of the
bias voltage.
The linear approximation is constructed in such a way that at v D = FC ⋅ Φ o begins at the
capacitance determined by the theoretical curve and its slope is determined by the slope of the
tangent to the theoretical curve at the break point v D = FC ⋅ Φ o .
7
The modified model of the junction charge is
vD
C do
1−
0
v
Φo
−m
dv
;
v D < FC ⋅ Φ o = Φ ∗
;
vD ≥ Φ∗
Qd =
v
C do
mv
1 D
F1 +
F3 +
dv
F2 Φ∗
Φo
The constants, F1 , F2 , F3
condition of approximation are:
F1 =
, determined mathematically by the above specified
Φ0
1− m
1 − (1 − FC )
1− m
F2 = (1 − FC )
1+ m
.
F3 = 1 − FC (1 + m )
8
3. Diode equivalent circuit
It is convenient to represent the model in the form of equivalent circuit shown below
(models of transistors are also represented using suitable equivalent circuits)
N1
+
N1
rs
iD
+
vD
vD
QD
iD
-
N2
N2
9
Summary of model parameters (SPICE)
5 static model parameters:
Is
current,
- saturation current,
n
BV
- emission coefficient,
- break down voltage,
rs
IBV
-
break
down
- resistance of neutral regions.
Numerical constant
Gmin - minimum conductance (constant selected for numerical reasons,
same for all elements).
5 dynamic model parameters:
τD
m
FC
- transit time,
C do - zero-bias junction capacitance, Φ o - built-in voltage,
- grading coefficient,
- fraction of built-in voltage used as a delimiter between nonlinear and linear
sections of C-V characteristic.
10