Download lecture 3:common-emitter amplifier

TRANSISTOR AMPLIFIER
CONFIGURATION
COMMON – EMITTER AMPLIFIER
Introduction

3 basic single-transistor amplifier configuration
that can be formed are:
Common-emitter (C-E configuration)
 Common collector / emitter follower (C-C
configuration)
 Common base (C-B configuration)


Each configuration has its own advantages in
form of:



Input impedance
Output impedance
Current / voltage amplification
Basic BJT Amplifier
Signal and load coupling
Basic amplifier dc analysis
Basic amplifier ac analysis
Common-emitter amplifier
Common-collector amplifier
Common-base amplifier
Basic common-emitter amplifier circuit
-Figure aVoltage divider biasing
Coupling capacitor -> dc isolation
between amplifier and signal source
Emitter at ground
-> common emitter
Cont..
Assume Cc =10μF and f=2kHz.
 Magnitude of capacitor impedance, |Zc| is:

Zc 

1
1

 8
3
6
2fC c 2 ( 2  10 )(10  10 )
This impedance is much less than Thevenin
resistance at capacitor terminal, that is:
R1 R 2 r

So, assume capacitor is a short circuit to signals
with f>2kHz. Also neglect any capacitance effect
within transistor. These assumptions will be used
in later analysis.
Cont..

From the previous circuit, small-signal equivalent
circuit with Cc short-circuited is shown as below:
Inside the transistor
Cont..
 R1 R2 r


V
V  
 R1 R2 r  RS  s


Ri  R1 R2 r
Vo  gmV ro RC 
Ro  ro RC
 R1 R2 r

Vo

r R 
Av    g m 
o
C


Vs
 R1 R2 r  RS 
Example 6.5





Determine small-signal voltage gain, input resistance
and output resistance of the circuit in Figure a. β=100,
VBE(on)=0.7V and VA = 100V.
1st step: DC solution
Find Q-point values.
ICQ = 0.95mA
VCEQ=6.31V.
Amplifier dc equations
Amplifier dc equations
Amplifier dc equations
Common-emitter dc equivalent circuit
Q-point
Q-point locus
DC load line change as Vcc change
DC load line change as Rc change
2nd step: AC analysis (Example 6.5)

Small-signal hybrid-π parameters are:
VT  (0.026)(100)
r 

 2.74k
I CQ
0.95
gm 
I CQ
VT
ro 

0.95
 36.5mA / V
0.026
VA
100

 105k
I CQ 0.95
Cont ac analysis..

Assume CC is short-cct, small-signal o/p voltage is:
Vo  ( g mV )( ro RC )

Dependent current, gmVπ flow through parallel
combination of ro and RC, but in direction that produces
–ve o/p voltage.
 R1 R2 r


 V
V 
s
R R r R 
S 
 1 2 

Small-signal voltage gain is:
 R1 R2 r 
Vo
( r R )
Av 
 gm 
R R r R  o C
Vs
S 
 1 2 
Cont..
 5.9 2.74 
(105 6)  163
Av  ( 36.5)
 5.9 2.74  0.5 



Input resistance, Ri is:
Ri  R1 R2 r  5.9 2.74  1.87k

O/p resistance, Ro -> by setting independent source
Vs = 0 -->no excitation to input portion, Vπ=0, so
gmVπ=0 (open cct).
Ro  ro RC  105 6  5.68k
Cont Example 6.5: Effect of RS

Using 2-port equivalent cct with input signal source to
determine the effect of RS with respect to input
resistance, Ri. Using voltage divider equation, input
voltage is actually:
 Ri

 1.87 
V s  
Vin  
V s  0.789V s  80%V s
 1.87  0.5 
 Ri  R S 
This is due to input resistance is almost
equal to source resistance. The input
voltage is reduced to 80% of
source voltage.This is called
loading effect. To minimize loading
effect, try to make:
C-E with emitter resistor
The basic common-emitter used in previous
analysis cause a serious problem when:
 If BJT with VBE=0.7V is used, we get IB=9.5μA
and IC=0.95mA but..
 If a new BJT with VBE=0.6V is used, IB=26μA
will make transistor goes into saturation  not
practical.
 Improved design  include an emitter resistor.

Cont..



Q-point is stabilized against
variation of β if emitter
resistor included in cct. (in
dc biasing design)
For ac signal, voltage gain
with RE is less dependent
on current gain, β.
Eventhough emitter is not
ground potential, cct still
referred as a commonemitter cct.
Cont..

Assume:



Cc -> short circuit
Early voltage -> ∞, o/p resistance ro is neglected (open cct).
Cont..

The ac output voltage is: (if we consider equivalent
circuit with current gain β)

Vo  (  I b ) RC
Input voltage equation:

Vin  I b r  ( I b  I b ) R E
Input resistance looking into the base of BJT, Rib:
Vin
Rib 
 r  (1   ) R E
Ib

Input resistance to the amplifier is:
R i  R1 R 2 R ib
Resistance reflection rule
Cont..

By voltage divider, we get relate Vin and Vs:
V in



Ri

V s

 Ri  R S 
Small-signal voltage gain is then:
Vo
 RC
Av 

V s r  (1   ) R E

 Ri



 Ri  R S 
If Ri>>RS and if (1+β)RE >> rπ, voltage gain is:
Vo
 RC
 RC
Av 


V s (1   ) R E
RE
Example 6.6

Determine the small-signal voltage gain and input
resistance of C-E circuit with an emitter resistor. β=100,
VBE(on)=0.7V and VA=∞.
Cont example 6.6

Small-signal equivalent circuit of C-E with RE
C-E Amplifier with Emitter Bypass Capacitor
CE provides a short circuit to
ground for the ac signals
Cont..


By include RE, it provide stability of Q-point.
If RE is too high +++> small-signal voltage gain will be
reduced severely. (see Av equation)
Thus, RE is split to RE1 & RE2 and the second resistor is
bypassed with “emitter bypass capacitor”. CE provides a
short circuit to ground for ac signal.
 So, only RE1 is a part of ac equivalent circuit.
 For dc stability: RE=RE1+RE2
 For ac gain stability: RE=RE1 since CE will short RE2 to
ground.

AC Load Line Analysis
Dc load line -> a way of visualizing r/ship
between Q-point and transistor characteristic.
 When capacitor included in cct, a new effective
load line  ac load line exist.
 Ac load line -> visualizing r/ship between smallsignal response and transistor characteristic.
 Ac operating region is on ac load line.

Ac load line
Ac load line
For Dc load line:
 Apply KVL around collector-emitter loop,


But

Substitute and rearrange both equations:

If β>>1, then we can approximate
Dc load line
equation
Cont..

For ac analysis, apply KVL around collector-emitter loop,
i c RC  v ce  i e RE 1  0

Assume ic ≈ ie,
vce  ic ( RC  RE 1 )

The slope is given by:
1
Slope 
RC  R E 1

The slope of ac load differ from dc load line  RE2 is
not included in the equivalent circuit. Small-signal C-E
voltage and collector current response are functions of
resistor RC and RE1.
Dc and ac load lines for CE circuit
AC operation
AC load line
+ IC
icsat  I CQ 
i
VCC
RC  RE
VCEQ
RC RL
0
RC RL
Q
ICQ
i 
VCEQ
VCEQ
VCC
v  I CQ  ( RC RL )
v
+ VCE
vcut  off  VCEQ  I CQ  ( RC RL )
WAVEFORMS
Maximum symmetrical swing
When symmetrical sinusoidal signal applied to
i/p of amplifier, symmetrical sinusoidal signal
generated at o/p.
 Use ac load line to determine the maximum
output symmetrical swing.
 If output exceed limit, a portion of o/p signal will
be clipped and signal distortion occur.

1. draw the ac load line
2. add the Q point
3. add ib~ vin
IC
Q
ac load line
0
4. add reference lines
5. sketch ic
6. sketch vce
VCE
SATURATION & CUT- OFF REGIONS
RESTRICT MAXIMUM UNDISTORTED SIGNAL
Maximum undistorted signal
BIAS (ICQ) BELOW LOAD LINE CENTRE
ac load line
IC
ICmax
I C peak  I CQ  0.05  I C max
Q
ICQ
0
VCEQ
v peak  peak  2  ( I CQ  0.05 I C max )  ( RC RL )
VCE
v peak  ( I CQ  0.05 I C max )  ( RC RL )
BIAS (ICQ) ABOVE LOAD LINE CENTRE
ac load line
ICmax
I C peak  0.95  I C max  I CQ
IC
Q
ICQ
0
VCE
v peak  (0.95 I C max  I CQ )  ( RC RL )
v peak  peak  2  (0.95 I C max  I CQ )  ( RC RL )
VCEQ
SATURATION DISTORTION
ac load line
IC
ICQ
0
Q
VCE
CUT-OFF DISTORTION
ac load line
IC
ICQ
0
Q
VCE
CLIPPING
ac load line
IC
ICQ
0
Q
VCE