Download 1- SPECIFIC AIMS

Principal Investigator: Harris, John G.
1- SPECIFIC AIMS
The overall goal of this project is to design a new generation of fully implantable flexible substrate
microelectrode array probes to record neural activity from behaving rodents. In existing approaches, the
behaving rodents are either tethered or encumbered by external devices strapped to their bodies. A fully
implantable unit would allow improved characterization of brain function via neural recordings in rats in an
unrestrained condition. The proposed device is a battery powered electronic chip that utilizes the state-of-theart integrate-and-fire (IF) representation and proven protocols: microwire array, flexible substrate, and wireless
communication. What makes this implantable specification possible is a new IF sampling principle that is able
to reduce both the power dissipation and the necessary bandwidth to transmit high resolution data. We
anticipate that it is possible to build an implant that uses less than 2 mW of total power dissipation to record,
amplify, encode and transmit wirelessly 16 channels of field potentials and extracellular action potentials, which
enables a battery powered, completely subcutaneous probe for behavior experiments for 40-100 hours
depending on the data rates. An external signal reconstruction algorithm will output neural data with at least
40dB accuracy (better on high amplitude signal regions) at a 20 kHz sampling rate. In order to design,
characterize, build and test in vivo the Florida Wireless Implantable Recording Electrodes (FWIRE), we
specifically propose:
1. To design, fabricate in VLSI, test in vivo and formulate system specifications for an ultra low power 16channel amplifier with pulsed output based on the novel integrate-and-fire sampling scheme. The
overall power consumption of this subsystem will be below 1 mW.
2. To design an ultra low-power (1 mW), low-bandwidth (500 Kpulses/sec) wireless link and integrate the
multiple modules (electrodes, integrate-and-fire amplifiers, communication link) into an implantable
package using a flexible substrate.
3. To study in vivo the characteristics of FWIRE during the full duration of the implantable probe
development. Bottlenecks in the design will be anticipated, found, and corrected; system performance
will be fully characterized.
.
2- BACKGROUND AND SIGNIFICANCE
Neuroscientists have long recognized the importance of distributed representations to understand brain
function [Hebb 1949; Lilly 1958; Adrian 1965; Fetz and Finocchio 1975; Mountcastle, Lynch et al. 1975;
Georgopoulos, Kalaska et al. 1982; Kruger 1983; Georgopoulos, Schwartz et al. 1986; Abeles 1991; Rieke
1996; Nicolelis, Ghazanfar et al. 1997; Freeman 2000]. The wish list of the neuroscientist for microelectrode
array systems includes (but it is not limited to): minimal injury to brain tissue, biocompatibility, longevity,
subcutaneous implantation, long operation, plenty of channels, high and stable cell yields, and access to the
spike data and/or field potentials with high signal-to-noise ratio.
From an engineering perspective, the functional building blocks of a probe are the electrodes, the
amplification stages, and the transmission of information to a base station if the animal is not tethered. The
design constraints are easy to state but much harder to comply with: basically one wishes to minimize the
power consumption per transmitted bandwidth with a given signal-to-noise ratio from the electrode to the
external receiver. The degrees of freedom (materials, electrode geometries, amplification, A/D, wireless) to
accommodate the experimentalist and engineering are enormous, and are visible on the very different
engineering solutions proposed and implemented by many research groups [Salcman 1976; Kruger 1982;
Buzsaki 1989; Kennedy 1989; Palmer 1990; Blum, Carkhuff et al. 1991; Campbell, Jones et al. 1991; Jones
and Normann 1997; Akin, Ziaie et al. 1999; Bai and Wise 2001; Berger, Baudry et al. 2001; Chang, Brewer et
al. 2001; Tsai and Yen 2003; Moxon, Leiser et al. 2004; Obeid, Nicolelis et al. 2004; Wise, Anderson et al.
2004]. To date, the most commonly used neural recording electrodes are still the insulated microwire arrays
(titanium or platinum) because they have been the most successful for chronic implantation [Schmidt 1980;
Kaltenkack and Gerstein 1986; Fee, Mitra et al. 1996; Westby and Wang 1997; Nicolelis 1999; Porada, Bondar
et al. 1999; Williams, Rennaker et al. 1999], and they can be handcrafted and shaped at the time of the implant
in the researcher’s lab, allowing for many different possibilities of insulation and tip coating. In our collaboration
with Dr. Nicolelis’ group at Duke University, we have firsthand experience with the high yield (activity of 198
neurons) and stability from session to session of the microwire arrays implanted in motor cortex of monkeys.
However, microwires have a low RS/NTD (recording sites per volume of neural tissue displaced), the interface
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Principal Investigator: Harris, John G.
with on-board electronics is difficult and reliability is low due to the one-on-one manufacturing that can not
standardize impedances, insulation etc. [Bement et al, 1986]. Our experience with Tucker Davis Technologies
microwire arrays has been positive but the form factors including the printed circuit board and standard
Omnetics connector are very large. In our brain machine interface experiments with rodents conducted in the
U. of Florida Brain Institute, the microwires are connected to an external head stage with local amplification,
and the signals are routed through wires to high quality amplifiers and A/D converters to display, store and
further process the neural data. Other laboratories use wireless links, but a large backpack is still necessary
[Strumwasser 1958; Warner, Robinson et al. 1968; Beechey and Lincoln 1969; Edge, Horn et al. 1969;
Eichenbaum, Pettijohn et al. 1977; Grohrock, Hausler et al. 1997; Xu, Talwar et al. 2004]. Other wireless
systems are under development but they are still larger and require more power and data bandwidth per
channel than our proposed system [Obeid et al, 2004][Neihart & Harrison, 2005][Mohseni et al., 2001][Takeuchi
& Shimoyama, 2004][Nordhausen et al.,1996][Hoogerwerf & Wise, 1994][Johannessen et al., 2004]. An
intermediate electrode design known as the Utah probe [Nordhausen, Rousche et al. 1994; Nordhausen,
Maynard et al. 1996; Maynard, Nordhausen et al. 1997; Rousche and Normann 1998] uses micromachined
arrays of single contact electrodes, and then electroplated to a connector with local amplification [Fofonoff,
Martel et al. 2004]. So the manufacturing repeatability of this electrode system is much higher than the
microwires, but the RS/NTD is virtually the same.
The limitations of mechanically assembled electrode arrays can be overcome using microfabrication
and micromachining employed in integrated circuits and micro- and nano-technologies. The Michigan group is
one of the world leaders in this approach. Using photolithography to transfer electrode patterns, precise
control of electrode geometry to less than 1m tolerance has been demonstrated. Electrode shanks have
been realized by selective etching using impurity etch stops in concert with anisotropic liquid etchants as well
as anisotropic dry etches [Wise, Anderson et al. 2004]. The recording sites consist of exposed metal electrode
pads located on a rigid silicon or silicon nitride shank that are connected via interconnect traces to output leads
or to signal processing circuitry. The presence of multiple recording sites along the length of the shank allows
the interrogation of neurons at varying depths in the neural tissue. Many similar micromachined probes have
been reported [Wise and Angell 1971; Najafi and Wise 1986; Ji and Wise 1992; Hughes, Bustamante et al.
2000]. The great appeal of this solution is that inter-component assembly is virtually eliminated which is a big
plus in the harsh environment of brain fluids. Moreover the RS/NTD is much higher because the electrode
form factor is smaller and multiple pads can be placed in the same tip. However, the optimization of each
piece is not possible because electrodes and electronics share the same substrate. The electronics
themselves are very sophisticated. First, the amplifiers have to provide high CMRR, high gains with very small
power. Second, the wireless system has to transmit very large data rates also with constraints in power. In
order to make the transmission more reliable, the analog signal must be converted to a digital representation
which adds substantially to the total power consumed. Typical numbers for the transmission per channel are
around ~144 Kbits/channel (12.5 kHz  12 bits). For a 16 electrode probe, this data rate is around 2.3
Mbits/sec.
This very brief review provides the context to outline the solution investigated in this proposal. At the
core of the engineering difficulty are the data rates required, which are related to the representation of
information from analog to digital domains embodied in the Nyquist theorem. The core innovation of this
proposal is an alternate signal representation to translate analog waveforms to samples which we call
integrate-and-fire (IF) that uses asynchronous sampling: the integral of the analog voltage is transformed into a
pulse when it reaches a threshold. Hence the information about amplitude is contained in the timing of the
pulse. There are three main advantages of the IF representation: (1) the implementation of the IF in analog
VLSI is trivial compared with the A/D converter resulting in substantial power savings; (2) the data rates
decrease drastically because the information is in the timing of pulses, so transmitting a continuous sequence
of for example 12 bits per sample is not necessary; (3) wireless asynchronous communications are possible,
which also simplifies the circuitry in the RF part. Preliminary results show that the IF representation utilizing 20
kpulses per second provides an equivalent overall reconstruction accuracy at the receiver of 40 dB (better in
the high amplitude signal regions) at 20 kHz. This is roughly an improvement of the data rate by a factor of 7
over conventional periodic sampling. Of course we pay a price in the complexity of the reconstruction algorithm
at the receiver, but the computational bandwidth (40 MFLOPS for 16 channels) is well within today’s DSP
processors. The power budget for 16 channel amplifiers (40 dB gain), pulse generators, and the multiplexer is
projected to be 1 mW.
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Principal Investigator: Harris, John G.
A fully implantable, 16 channel probe with wireless transmission of all the collected electrophysiological
data for a few hours becomes possible with the savings in power and bit rates embedded in the IF
representation. This means that researchers will be able to conduct behavioral experiments in untethered
rodents (or other animals) without any external attachments. Indeed, the lower bit rates and asynchronous
communication allow efficient ultra wideband (UWB) modulation which enable under the skin transmission with
an estimated power consumption of 1 mW. Using the power savings possible with IF and proven microwire
array, flexible substrate, and wireless communication protocols, we propose to develop a fully implantable
wireless neural recording array with the focused aims summarized below:
1. To design, fabricate in VLSI, test in vivo and formulate system specifications for an ultra low power 16channel amplifier with pulsed output based on the novel integrate-and-fire sampling scheme. The
overall power consumption of this subsystem will be below 1 mW.
2. To design an ultra low-power (1 mW), low-bandwidth (500 Kpulses/sec) wireless link and integrate the
multiple modules (electrodes, integrate-and-fire amplifiers, communication link) into an implantable
package using a flexible substrate.
3. To study in vivo the characteristics of FWIRE during the full duration of the implantable probe
development. Bottlenecks in the design will be anticipated, found, and corrected; system performance
will be fully characterized.
An asset of this project is the close proximity and on-going collaborations of the engineering research
team with the UF Brain Institute. We plan throughout the design and development to interact frequently (on a
weekly basis) with the researchers in the animal lab, not only to test the developed hardware in vivo, but also
specify improvements and avoid bottlenecks.
The research team is headed by Dr. John Harris, Professor of Electrical and Biomedical Engineering,
who is an expert in analog VLSI design and neuromorphic chip design. The Co-PI is Dr. Jose Principe,
Distinguished Professor of Electrical and Biomedical Engineering with a long track record in biomedical signal
processing in particular brain wave analysis and brain machine interfaces. The other members of the team are:
Dr. Toshi Nishida, Associate Professor of Electrical Engineering and Co-Director of the Interdisciplinary
Microsystems Laboratory at the U. of Florida, Dr. Rizwan Bashirullah, Assistant Professor of Electrical
Engineering with expertise in wireless links for retinal implants, and Dr. Justin Sanchez an Assistant Professor
of Pediatric Neurology in the UF Brain Institute with expertise in brain machine interfaces.
3- PRELIMINARY STUDIES
Methods and implementation of integrate-and-fire (IF) representations
Detection of extracellular neural signals. The analog hardware design for the amplification of extracellular
neural signals is quite challenging. These neural signals have amplitudes ranging from 50 to 500 V [Wise et
al, 1970], but large DC offsets also arise across different recording electrodes due to electrochemical effects at
the electrode-tissue interface. The magnitude of these DC offsets is about 1-2 V [Ferris, 1978], much larger
than the neural signals to be measured. The relevant frequencies of the brain waves range from 100 Hz to 7
kHz [Najafi & Wise, 1986], while the Local Field Potentials (LFP) extend to below 1 Hz. Thus, the ideal bandpass filter for neural recording must reject the DC offset while passing the LFP signal. Although the recording
signal is analog, post-processing algorithms are more and more digitally based, which raises the need of
translating the analog signals to digital representations through analog to digital converters (ADC) [Najafi &
Wise, 1986]. An on-chip ADC is required to enhance signal-to-noise ratio, increase robustness and provide a
wireless transmission interface to reduce the risk of infection for chronic recording [Akin et al, 1998],[Huang &
Oberle, 1998],[Ji & Wise 1992]. In our work, an alternative integrate-and-fire (IF) method is employed which
encodes the analog information as an asynchronous train of pulses. The principle is to encode amplitude in
the time difference between events. The advantage is that a single event represents a high resolution
amplitude measurement, therefore great bandwidth and power savings are possible.
Amplifier design. In our IF circuitry, the analog output of the amplifier is translated to a series of asynchronous
pulses which has better noise immunity than conventional analog signals in transmission and also eliminates
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Principal Investigator: Harris, John G.
the need for a traditional ADC [Chen, Harris & Principe, 2004]. Earlier versions of our pulse-based ADCs have
resulted in 300 W power consumption [Wei & Harris, 2004] and the latest version using a delta-sigma
modulation style to produce timing events resulted in 52 W of power dissipation with 8-bit resolution [Wei &
Harris, 2005]. We have shown mathematically that in all of our systems, the original bandlimited signal can be
perfectly reconstructed solely from noise-free pulse timings. Our fabricated on-chip circuitry is divided in the
following blocks. (1) The first stage is a pre-amplifier providing about 40 dB gain at the passband and an AC
coupling technique is used to reject the inherent DC offset. (2) The second stage is an integrate-and-fire
module which encodes the analog information as an asynchronous train of pulses. The voltage output of the
amplifier is first converted into current and, by integrating this current, the amplitude information is encoded
into an asynchronous digital pulse train. The structure of the preamplifier was originally proposed by Harrison
[Harrison & Guereri, 2003]. Fig. 1 includes the schematic of the bio-amplifier as the first stage. The midband
gain Am is C 1 /C 2 , the bandwidth is approximately gm  ( AM CL ) , where g m is the transconductance of the
operational transconductance amplifier (OTA). The four diode-connected PMOS transistors M a M d in Fig. 1
act as a “pseudo-resistor”. The pseudo-resistor functions using a pair of diodes in parallel, with opposite
polarity. The current increases exponentially with voltage for either sign of voltage, and there is an extremely
high resistance region around the origin. For   V  02 V, we measured dV dI  1011  . The I-V relationship
of the pseudo-resistor shows that the effective resistance is huge for small signals and small for large signals
as shown in Fig. 2. We use two pseudo resistors in series to provide a larger voltage range. The lower cutoff
frequency L is approximately 1 (2rp C2 ) . The OTA is a typical two stage CMOS amplifier with a P-type input
differential pair for lower flicker noise [Johns & Martin 1997]. The circuit operates from a 5 V power supply.
The input differential pair M1/M2 is actively loaded by Wilson current mirrors.
A/D Converter Design. The most popular class of A/D converter is the periodic sampler implementing Nyquist
sampling. The resolution of the conventional A/D converter for biomedical applications is limited by the power
budget. Scaling to submicron technologies, this high resolution analog circuit is complicated by low-power
supply and poor transistor output resistance (caused by the body-effect). One solution to this limitation is to
employ a    A/D converter which simplifies circuitry but increases power consumption.
Our approach departs from traditional principles and employs an integrate-and-fire (IF) asynchronous
mechanism for A/D conversion inspired by biological neurons. The principle is to encode amplitude in the time
difference between events. The advantage is that a single event represents a high resolution amplitude
measurement, therefore great bandwidth savings are possible. As Fig. 1 shows, the voltage output of the
amplifier is linearly converted to current by dropping the voltage across a fixed resistor R. Vref  supply is used to
adjust the DC current shift. Since the following stage only deals with unipolar current, Vref  supply should be less
than Vmid - bAm , where b is the maximum input signal. This current charges Ci until the voltage across the
capacitor reaches a fixed voltage threshold Vth, then the comparator output turns to high. The high voltage
opens switch M5 and quickly pulls the positive node of the comparator down to ground, the output of
comparator goes down correspondingly, thus generating a pulse. The width of the pulse is decided by the
speed of the comparator and the time delay of the buffer. The interval between two adjacent pulses represents
the charging time given by
vout amp  AM vin
(1)
where AM is the midband gain of the bio-amplifier; M 1 works as a voltage follower. The AC signal at the
source of M 1 approximately equals the output of the bio-amplifier, which yields.

tk 1
tk
[vin Am  Vref  supply  Vmid ]dt  VthCi R
(2)
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Principal Investigator: Harris, John G.
12
x 10
-7
10
8
Current (A)
6
4
2
0
-2
-1
Figure 1. Block diagram of on-chip circuitry
-0.8
-0.6
-0.4
-0.2
0
0.2
Voltage Cross the Device (V)
0.4
0.6
0.8
1
Fig 2. Measured I-V curve of pseudo resistor
If the input signal is bounded by a constant b and bandlimited to  , the lower and upper bounds on the
distance between two consecutive pulses t k and tk 1 is given by:
tk 1  tk 
Vmid
Ci RVth
 Vref supply  bAm
(3)
tk 1  tk 
Vmid
Ci RVth
 Vref  supply  bAm
According to the results in [Feichtinger & Grochenig, 1994] and [Lazar & Toth, 2003], if tmax 
analog signal can be recovered perfectly. By carefully choosing
Vref  supply ,
(4)


, the original
Vth , Ci ,and R, we perfectly reconstruct
the input analog signal using only the timing information of the pulse train output.
Power consumption is another major concern for many biomedical circuits. The IF representation
consumes far less power than A/D converters. There are three major subcircuits to consider in computing the
total power of the IF implementation: 1) the bio-amplifier and comparator, 2) the V-I converter and 3) the delay
circuit. The power consumption of the bio-amplifier and comparator is determined by the bias currents. The
power consumption of the V-I converter is: PV  I  I rmsVDD where I rms is the current across R. Since the input
signal is bounded, an upper bound for PV  I is PV  I 
(Vmid  Vref  supply  bAm )VDD
(5)
R
The average power consumption in conventional CMOS digital circuits can be expressed as the sum of three
main factors: the dynamic (switching) power consumption, the short-circuit power consumption, and the
leakage power consumption [Kang & Leblebici, 1999]. The first component represents the power dissipated
during a switching event. The average power dissipation of the CMOS logic gate can be calculated from the
energy required to charge up the output node to VDD and discharge the output load capacitance to ground
2
[Kang & Leblebici, 1999]: Pavg  CloadVDD
(6)
f
where Cload is the load capacitance the inverters drive; f is the switching frequency of the inverters. For the
pulse generator, the switching speed is determined by the input. If the input is bounded by a constant b , the
highest switching frequency is: f pmax  Vmid  Vref  supply  bAm
(7)
2
The average dynamic power dissipation is bounded by: Pavg (dynamic)  CloadVDD
f pmax
(8)
Vth RCi
The power dissipation caused by the current when nMOS (kn) and pMOS (kp) transistors are simultaneously
open and assuming  n   p   , VT  n  VT  p  VT and equal rise and fall time (  rise   fall   ):
Pavg ( short  current ) 
1
 f p max (VDD  2VT )3
12
(9)
Since there are only 5 transistors used in this part of the circuit, the leakage power dissipation caused by
reverse leakage and subthreshold current in our design is negligible. Thus, the total power dissipation caused
by the delay is the sum of (6), (8) and (9).
We fabricated the circuitry in the AMI 0.5  m three-metal two-poly process. The designed amplifier gain is
40 dB. Using poly-to-poly capacitors, we set C2 to 200 fF, C1 to 20 pF, CL to 6 pF and Ci to 10 pF. The
resistance value of R is set to 15 k  and built with a long poly wire. We used the signal analyzer from Audio
Precision Inc. to measure the analog specifications. Fig. 3 shows the frequency response. The measured
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Principal Investigator: Harris, John G.
midband gain is 39.5 dB and high cutoff frequency is 5.4 kHz. The measured lower cutoff frequency is around
0.3 Hz. Other specifications are shown in Table 1.
Table 1. Measured characteristics of bio-amplifier
Parameter
Measured results
Supply voltage
5V
Supply current
8 A
Gain
39.5dB
Bandwidth
5.4K Hz
Lower cutoff frequency
~0.3 Hz
Input referred noise
9.56  Vrms
CMRR
PSRR
Fig. 3 Measured frequency response.
~59.2dB
~45dB
Signal reconstruction from events The reasons periodic sampling is widely utilized are the well understood
mathematical framework (sampling theory [Marks, 1991]) and the relatively easy implementations of both the
encoder (sampler) and the decoder (reconstructor). However, many emerging applications require simple
encoders at the expense of more complex reconstruction algorithms at the decoder such as in brain machine
interfaces (BMIs), where hundreds of microwires have already been implanted in the motor cortex of monkeys
[Nicolelis 1999]. The problem is one of transmitting the field potentials and spikes to the outside while
constraining the power, SNR, bandwidth and reliability of the BMI. Moreover, the transmission should be
impulsive to better resist noise with low power transmitters. We have developed the integrate-and-fire signal
representation to address these applications. Given a bandlimited continuous signal x(t), we create an
alternate representation xˆ (t )  h(t ) * wk  (t  tk ) 
(10)
wk h(t  tk )


k
k
where x(t )  xˆ (t )   for all time, wk are appropriate weights and h(t) is the sinc function. Sampling times ti are
f (t k )  k
given by:
where

t k 1
t
x(t )dt  

and f (t )  x( )d
tk
(11)
t0
Previously, simple linear low-pass filters were used as crude reconstruction filters from integrate-and-fire
outputs, computing something similar to rate coding from the spike train, and the performance was poor [Bayly,
1968]. Pulse times are determined by the local area under the signal input x(t), and they can be used for
perfect reconstruction. Let us assume that x(t) is bandlimited to Ωs and the maximum interspike interval Tmax
satisfies Tmax    . From mathematical frame theory, it is known that any bandlimited signal can be
s
expressed as a low-pass filtered version of an appropriately weighted sum of delayed impulse functions [Duffin
& Schaeffer, 1952][Feichtinger & Grochenig, 1994] which is expressed in Eq. 1. So the signal recovery
problem is how to calculate the appropriate weights. We can define the timing of pulses: T=[ t1 t2 tk  tt 1  ].
Let x(t )  vin Am  Vref  supply  Vmid . Substituting Eq. 11 into Eq. 10, we obtain
 
t i 1
ti
ti1
x(t ) dt  t
 w h(t  t ) dt
j
i
j
j
  w j  h(t  t j ) dt
ti1
j
ti
cij 

t i 1
ti
h(t  t j ) dt
(12)
(12)
which can be rewritten in matrix notation as CW = θ.
Unfortunately, C is usually ill-conditioned necessitating the use of a SVD-based pseudo-inverse to calculate
the weight vector W. Our reconstruction method provides the foundation for the development of a new class of
small, low-power, and exceeding simple sensors without requiring a traditional analog to digital (A/D)
converter. The output pulse train can be efficiently transmitted using standard digital asynchronous logic
techniques because it is very sparse. Power consumption of the integrate-and-fire front-end can be an order of
magnitude smaller than the lowest power commercial A/D converters [Wei & Harris, 2005]. As it is well known
from communication theory, spikes provide very good robustness against noise, so the transmitting power for a
given SNR can be very low. We used an Agilent 1693 digital analyzer to record the timing information of the
pulse output with the sample rate of 5ns. When the bias current of the comparator was 0.3  A , the average
pulse width was 108.24 ns with a standard deviation of 2.39 ns. As IEEE-STD-1241 requires, a curve fitting
method (sine wave fitting) was used to evaluate the reconstruction performance with the algorithm described
below. There are 4 basic steps to characterize an ADC [ADC standard]: 1) set up the device; 2) apply a single
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Principal Investigator: Harris, John G.
A m p lit u d e ( m V )
A m p l itu d e ( m V ) A m p l itu d e ( m V )
tone sine wave as an input; 3) collect sampled and quantized data; and 4) calculate standardized parameters
using off-line algorithms. The input is a 2 mV 1 kHz sine wave. The off-line algorithm we use is an ADC test
evaluation program [Markus and Kollar, 2001], which determines that the reconstructed sine wave has 13
effective bits. This figure of merit can be the basis for practical evaluations of the IF representation with real
data. Fig. 4 shows the recorded pulse train and reconstructed sine wave, and Fig 5 shows three segments of
an amplified neural recording with a spike clearly visible.
Fig. 4. Measured pulse output.
10
0
-10
0
0 .0 0 5
0 .0 1
0 .0 1 5
0 .0 2
0 .0 2 5
0 .0 3
0 .0 3 5
0 .0 4
0
0 .0 0 5
0 .0 1
0 .0 1 5
0 .0 2
0 .0 2 5
0 .0 3
0 .0 3 5
0 .0 4
0
0 .0 0 5
0 .0 1
0 .0 1 5
0 .0 2
T im e ( s e c o n d )
0 .0 2 5
0 .0 3
0 .0 3 5
0 .0 4
10
0
-10
10
0
-10
Fig. 5 Test of amplifier/ IF reconstruction with spikes
Progress towards Low Power Wireless Interfaces
In order to accommodate new data acquired over the past six months, we were forced to reduce the text
related to general description of rationale and approach of power transfer and telemetry links for the wireless
interface. We felt that this was an acceptable compromise since the review panel clearly stated that we had
demonstrated good understanding of the critical issues in wireless link analysis including RF penetration in
biological tissue and choice of carrier frequencies to minimize overall implant footprint and attain good power
efficiencies. To assist the reviewer in evaluating our response to the Summary Statement and our progress
since our last submission, only newly acquired data is presented below.
Power interface and battery management system design and experiments
Our vision towards a neural recording system that does not require an extracorporeal unit for continuously
powering the implant clearly elucidates the need for a battery operated device. Our initial approach of
employing a rechargeable battery, which was critiqued in our first submission due to concerns of time involved
for recharging the battery in anesthetized animals, and subsequently addressed in our second submission,
continues to be our long term goal. However, to minimize potential concerns with anesthetized animals and
animal restraint mechanisms, we have decided to employ an architecture that is fully compatible with primary
batteries as well. Our initial assessment indicates that this is a reasonable approach as the energy densities of
primary batteries is generally an order of magnitude higher than rechargeable or secondary batteries for any
given battery chemistry composition (Lithium, Zinc air, Silver Oxide, Carbon-Zinc, etc), offering researchers
who perform short (1-2month) electrophysiological studies the option to implant once without the difficulties of
recharging.
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Principal Investigator: Harris, John G.
To assure that battery recharging is indeed possible with very low hardware complexity and power dissipation,
we designed and tested an initial prototype of a wireless powered battery management system. The powering
scheme employs low frequency inductive links previously described in literature [Donaldson & Perkins, 1983]
[Ko et al., 1977][Soma et al., 1987][Galbraith et al.,1987][Hochmair, 1984], including work by our coinvestigator (Bashirullah) [Bashirullah et al., 2003][Kendir, Liu, Bashirullah, et al 2004][Wang, Liu, Bashirullah
et al 2004][Liu et al 2003][Liu, Bashirullah, et al 2003]. A prototype chip was fabricated in standard 0.6µm 3metal 2-poly 5V Bulk CMOS technology in order to validate circuit functionality [Bashirullah, ISCAS2006,
EMBC 2006]. A custom package platform was developed to test the proposed circuits. As shown in Fig. 6a, a
chip-on-board (COB) technique is used to attach the fabricated CMOS die onto a standard circular printed
circuit board (PCB). In addition to serving as a platform for the die, the 9mm diameter circular 16mil thick PCB
serves as a fixture for the secondary inductor constructed using standard 3/44 AWG litz wire. Notice that since
the die is directly above the inductor, the measurements also include the effect of induced fields and potential
noise pickup from the coil – this leads to a more realistic test environment for the targeted space limited
implant. Fig. 6b shows the transient regulator response when an externally generated 0 to 2mA load step is
applied as the link is powered by the primary coil voltage. The regulator exhibits a load regulation of 2mV/mA
(or 240ppm/1mA), a line regulation 2mV/V and a low dropout voltage of 50mV. The quiescent current of the
front-end circuitry is 22.5µA when Vi=4.2V (or power dissipation ~95µW). The charging profile of the battery
control loop were verified using a large storage capacitor (instead of a battery) to decrease the charge time
and illustrate the dynamic voltage and current waveforms. The voltage difference across an external 200Ω
sense resistor was measured to determine the charge current, as shown in Fig. 6c. During the constant-current
phase, the circuit delivers 1.5mA resulting in a linear increase in battery voltage (V BAT). The end-of-charge
(EOC) signal during the constant-voltage phase is generated once the battery current reaches 5% of the
nominal constant charging current of 1.5mA. The measured power dissipation of the battery control loop is
160µW, with an efficiency that ranges from 66% to 95%, depending on the charging phase. The total
measured loaded power dissipation of the chip is 8.4mW when delivering 1.5mA at 4.1V to the load (or
6.15mW) for an efficiency of 73% - this includes secondary coil loss, rectifier, RF limiter, regulator and battery
control loop. The overall area of the front-end circuits and control loop is 0.3mm2, while the 2.2nF charge
storage capacitor occupies an additional 920µm by 1560µm (or 1.435mm2).
Wireless forward telemetry link (downlink) experiments
Our next step towards the wireless interface for the FWIRE was to design the forward telemetry link (or
downlink). This wireless interface is intended for low data rate transmission from an external base station to the
implant microchip for status update and system programmability, and employs the low frequency (4MHz)
inductive link used above for wireless power transfer. The downlink uses a very low duty cycle modulation
scheme based on amplitude shift-keying (ASK) and pulse position modulation (PPM) that yields low power
dissipation and facilitates clock and data recovery (CDR) [Bashirullah, CICC 2006]. A prototype test chip has
been fabricated in 2-poly 3-Metal 0.6µm bulk CMOS technology and tested using a custom package platform.
Fig. 6.5a shows the measured voltage at the input of the ASK demodulator circuit, which has been wirelessly
coupled using the inductive link. An arbitrary waveform generator (Agilent 33120) is used to modulate the
4MHz carrier with an index of m=1 and data encoding with pulse position of 60%/40% for a logic “1” and
(a)
(b)
(c)
Fig 6. Wireless powering scheme with battery management system (a) IC chip-on-board packaging with test pins and coil (b) loa
response of regulated supply and (b) battery control loop charging.
34
Principal Investigator: Harris, John G.
40%/60% for logic “0”. The ASK circuit exhibits a sensitivity of 3.2mVp-p and generates CMOS level pulse
position modulated signals (VASK). Fig. 6.5b shows the operation of the clock and data recovery circuit. It
employs a charge based technique that does not require delay-locked loops (DLL) to recover clock and data,
resulting in lowered power dissipation. The recovered clock and non-return to zero data signals indicate correct
detection of a “110” test pattern. The CDR is operational for an input data range of 4kb/s to 18kb/s – this is
sufficient to support implant control and update functions from an external wireless device. A die micrograph of
the envelope detector and clock/data recovery circuits is shown in Fig 6.5c. The circuits measure 300µm by
600µm and dissipate 70µW at 2.7V.
(a)
(b)
(c)
Figure 6.5. Experimental results: (a) ASK detector (b) clock and data recovery; (c) die micrograph (actual circuits
measures 300µm by 600µm)
Chronic in vivo microelectrode recording
Rationale: A fundamental challenge in multi-array electrophysiology is to instrument behaving animals with
hardware for data transmission. Fig. 7a depicts a typical scenario encountered in our laboratory where a rodent
in an operant conditioning cage is wire-tethered to amplifiers. Wired paradigms present a challenge. First, the
animal must behaviorally contend with the new sensation of being tethered (several weeks), which is valuable
time lost for recordings from chronic microelectrodes. Secondly, it is difficult to move all of the wired
instrumentation along with the animal. Rodents are naturally exploratory; therefore, once instrumentation is
connected they often chew through cables (we have protected the cable with steel in the figure below) and
headstages. Commutators allow 360 degree rotation of the cable and prevent torque from being applied to the
implant and causing it to be torn from the skull. The most advanced miniature commutators allow a maximum
limit of 36 wires for low torque brush type systems. We will eventually reach a fundamental limit in commutator
design and fabrication. Typically, experimenters utilize low profile connectors from Omnetics (Minneapolis, MN)
however they are still not ideal for chronic rodent applications due to their size and pin arrangement. For 32
recording channels, the total weight of the 2 headstage connectors, screws, cranioplast packaging acrylic, and
electrodes is 8 g.
A
C
B
C
Traditional cranioplast encased
electrodes and headstages leave open
wounds and bulky hardware
35
Principal Investigator: Harris, John G.
Figure 7. a) Tethered rodent, b) Electrode implantation surgery, c) Traditiona
Surgical
Procedures
All cranioplast and headstage prosthetic in Dr. Sanchez’s laboratory.
procedures
have
been
approved by the University of Florida IACUC Board (protocol #D714). Prior to surgery, the rats are
anesthetized with isoflurane or halothane administered by inhalation using a precision vaporizer. Once the rat
is fully anesthetized, the top of the head is shaved, and the surgical site is thoroughly sterilized. The top of the
skull is then exposed by a midsaggital incision from between the eyes, extending caudally exposing bregma
and lambda landmarks of the skull, back to the level of the ears, with a scalpel. The soft tissue is then cleared
from the skull using cotton applicators and cauterization is used to stop bleeding if necessary. The landmarks
bregma and lambda are then located on the skull (Paxinos 1997). Multiple microwire arrays are implanted to
depths of 1.6-2.2 mm into the following structures involved in motor control: primary motor cortex (+0.5-1.0 mm
anterior, 2.0-4.5 mm lateral of bregma) [Sanes et al., 1990], parietal association cortex (-3.8-4.5 mm posterior,
1.5-4.9 mm lateral of bregma), and the premotor cortex (1.0-3.8 mm anterior, 0.1-2.5 mm lateral of bregma)
[Donoghue & Wise, 1982] [Passingham et al., 1988][Preuss, 1995]. The electrode arrays are traditionally
supported and grounded by 1/16” diameter (or smaller) stainless steel screws. The electrodes will be
stereotaxically moved to the appropriate site and lowered to the appropriate depth using a micropositioner (1
mm per hour) to minimize distress to the brain tissue (FHC, Bowdowinham, ME). In Fig. 7b, we present an
image of a 16 channel 50 µm microwire implant surgery performed in the Neuroprosthetics Research Group
lab. Traditionally the surgical procedure is closed by filling in the surface of the skull with medical grade
cranioplast (Fig. 7c). An open wound is left to heal around the cranioplast to allow for low profile Omnetics
connectors to attach the commutator and amplifier wire.
Closed-Loop BMI Testing Dr. Sanchez’s lab has collected, analyzed, and databased thousands of hours of
neuronal recordings (local field potentials, single unit activity) from behaving animals and humans implanted
with 32-128 chronic electrodes (Paiva, Principe et al. 2005; Sanchez, Alba et al. 2005; Sanchez, Principe et al.
2005; Cieslewski, Cheney et al. 2006; DiGiovanna, Sanchez et al. 2006; Patrick, Ordonez et al. 2006;
Sanchez, Carney et al. 2006; Sanchez, Mareci et al. 2006; Wang, Sanchez et al. 2006). Animals and humans
that have been instrumented have participated in operant electrophysiological experiments. Dr. Sanchez has
extensive experience in developing real-time signal processing algorithms to interpret neuronal modulation.
The algorithms have then been implemented in custom real-time computing environments that have been used
in neuroprosthetic systems in complete brain control.
Flexible substrate microelectrode array
Flexible substrate technology The Florida FWIRE
group has successfully tested the feasibility of a
micromachined flexible polyimide ribbon cablebased neural electrode array in vivo in rat (Patrick,
Ordonez et al. 2006) Fig. 8 shows the flexible
substrate electrode array (inset) during implantation.
The array consisted of a row of eight (30 µm
diameter with 50 µm pitch) gold-plated nickel
electrodes with parylene-C insulated shanks that
extend 4 mm from the edge of the flexible polyimide
cable. The microelectrodes were implanted into the
cortical tissue using a hydraulic micropositioning
system and clamping device shown in Fig. 8 to a
depth of 1.6 mm. The electrodes penetrated the
cortical tissue without buckling of the tips.
Additionally, this arrangement was sufficiently rigid Figure 8. Inset: flexible polyimide electrode array.
to ensure only dorsal-ventral movement. Note the Implantation of flexible electrode array.
transparent nature of the ribbon and the straightness
of the array of shanks. Once the electrodes were implanted, the flexible cable was “bowed” and secured to the
skull providing strain relief on the implant. The animal in the image fully recovered from surgery.
Representative neuronal recordings are shown in Fig. 9. The peak-to-peak amplitude of the recorded action
36
Principal Investigator: Harris, John G.
potentials measured 78 µV and 84 µV, respectively. Impedance was measured in vivo for every electrode
across the array at 1 kHz and the average value was 30 kΏ. The average noise floor level was measured to be
10 µV.
The flexible substrate technology will be used to integrate the novel integrate-and-fire sampling scheme
with the proven conventional tungsten microwire array, flexible substrate, and ultra low-power low-bandwidth
wireless link in an implantable neural recording array.
50
40
30
Microvolts
20
10
0
-10
-20
-30
-40
0
0.01
0.02
Time (s)
0.03
0.04
Figure 9. Representative neural recordings
for flexible substrate array.
37
Principal Investigator: Harris, John G.
4- RESEARCH DESIGN AND METHODS.
The overall goal of this project is to design a fully implantable neural recording system to monitor neural
activity from behaving rodents. Our approach departs from traditional principles and employs an integrate-andfire (IF) asynchronous mechanism for A/D conversion inspired by biological neurons. The fundamental principle
is to encode the signal in the time difference between pulse events. The advantage is that the timing of a single
pulse provides a high amplitude measurement, leading to a great reduction in both bandwidth and power
consumption when compared to traditional A/D converters-based systems. Since pulses provide good
robustness against noise, the transmitting power for a given SNR can be very low. Using the state-of-the-art
integrate-and-fire (IF) representation and proven microwire array, flexible substrate, and wireless
communication protocols, the modular nature of the implantable neural recording electrode allows future
enhancements to be seamlessly added to improve future functionality including but not limited to
rechargeability through inductive coupling, custom microelectrode arrays, higher capacity batteries, and more
advanced integrated circuit technologies. In the following sections, the research approach for each specific aim
is described in detail.
Specific Aim 1: To design, fabricate in VLSI, test in vivo and formulate system specifications for an
ultra low power 16-channel amplifier with pulsed output based on the novel integrate-and-fire sampling
scheme. The overall power consumption of this subsystem will be below 1 mW. Design a real time
backend signal reconstruction module.
Hypothesis
The Integrate and Fire (IF) sampling scheme provides better characteristics than the traditional Nyquist
samplers in terms of signal accuracy per bit rate, power consumption and chip area. The IF scheme opens up
entirely new functionalities for implantable electrode arrays such as a compromise of transmitting the full
multielectrode array data with a smooth degradation in neural spike data accuracy. In the IF approach, a single
pulse represents a high resolution amplitude measurement providing a significant reduction in transmission
bandwidth.
Rationale
Our preliminary results show the feasibility of the IF representation as a competitive alternative to Nyquist
sampling and other traditional A/D converters when low power, small chip area and low data rates are a
requirement. There are three important developments needed to make IF representations practical for neural
recordings: (1) The simulations quantifying the accuracy of IF representations need to be extended to real
benchmark neural data sets (spike trains and local field potentials) and solidified with theory to show under
what minimal conditions the pulse times can reconstruct uniquely the input signal and vice versa (i.e. the pulses
constitute a set of sampling in the Paley Wiener space); (2) The design trade-offs need to be quantified and
validated such that specifications can be drawn for the various stages of the FWIRE algorithm and hardware
design; (3) Moreover, the IF building blocks need to be designed and evaluated from first principles,
implemented and tested with a focus on practical evaluation of the signal reconstruction quality versus the
current state of the art (Nyquist samplers). The topics that require further research are:
(1) Biphasic pulse conversion circuitry
(2) Power-efficient multiplexing
(3) Battery operated, portable multichannel IF system testing
(4) Sampling theory for IF representations
(5) Data rates and accuracy trade-offs
(6) Design of the external data decoding system and user interface
Experimental Approach
4.1. Biphasic Pulse Conversion Circuitry. During the first year we will start the design of biphasic pulse
conversion circuitry with the goal of achieving even smaller data rates and less power consumption than the
current design. Our existing pulse output amplifier (described in section 3.2) converted the amplified neural
voltage to a current that was shifted to guarantee positive only outputs. The positive current then was fed into a
38
Principal Investigator: Harris, John G.
simple IF circuit to create a pulse train. Though we successfully demonstrated the IF system, there are three
major problems that need solution to reduce even further the data rates and the overall power consumption:
Problem 1: By shifting the current so that it is only positive, we have increased the overall firing rate and thus
the required data bandwidth of the system.
Problem 2: The peak firing rate of the IF neuron is only bounded by the charge time of the capacitor
(approaching 1MHz) but we know that the bandwidth of the signal is bandlimited to 10KHz. The extra pulses
lead to wasted power consumption, wasted data bandwidth and overburdening the off-chip data multiplexer.
Problem 3: The amplifier and integrate-and-fire blocks are simply cascaded in the current system which
eliminates most of the benefit of the integration stage of the IF circuit. We have found in our previous work that
the integration stage of the IF provides both a higher dynamic range, as in our work with imagers [Qi & Harris,
2004][Luo & Harris, 2004], and lower detection limits, as in our work with integrated chemical sensors [Narula &
Harris, 2004][Narula & Harris, 2005].
We propose to solve each of the three problems above as follows:
Solution 1: Rather than shift the signal to be all positive, we will employ a biphasic pulsing mode using two
different thresholds as shown in Fig. 10. A single capacitor is used to integrate the input current but a positive
and negative threshold are implemented using two different comparators. When the integral of the signal rises
above the positive threshold, a “positive” pulse is created and, similarly, when the integral drops below a
negative threshold a “negative” pulse is created. After either type of pulse is generated, the capacitor is reset
back to a midrange voltage value. Initial simulations on recorded neural data from the rat have shown that a
tremendous reduction in the number of pulses for the same signal reconstruction performance. Furthermore,
this technique has the added advantage of
dynamically reducing the sampling rate in
regions of low input (typically noise) while
keeping a high sampling rate in regions of high
input (typically signal).
Solution 2: The large peak spiking rate can be
reduced with the addition of a “refractory
interval”, i.e. after the comparator fires it will be
disabled for a period of time, say 100 usecs,
reducing the peak spike rate to 10KHz. The
refractory interval can be implemented using a
current source to discharge the integrating Fig 10. Schematic of biphasic pulse converter.
capacitor, essentially increasing the pulse width to a programmable value set by the sizes of the capacitor and
the current source. The reconstruction algorithm can be modified to handle known refractory intervals.
Solution 3: A more powerful design will be in place by end of the third year of the project. It will combine the IF
component with the amplifier taking advantage of the noise reduction aspect of the integration stage. The
design is in its preliminary stages but will likely have a DC-coupled signal to the positive terminal of a
transconductance amplifier with an adaptive mechanism to set the negative terminal voltage to subtract off the
common-mode. The output of the transconductor will be integrated on a capacitor with the two polarities of
pulses generated as described above.
In order to test the biphasic IF scheme, we will modify our existing neural amplifier (shown in Fig. 1) to build an
eight-channel neural amplifier chip in the 0.5um AMI CMOS process during the first year of the project. This
circuit will provide a gain of 100 for each channel with a continuous-time voltage output. We add programmable
gain control; currently the amplifier provides a fixed gain of 100 based on a capacitance ratio but we will allow
four different values of gain to be set by the user. Testing in vivo will be conducted throughout the design in Dr.
Sanchez’s laboratory.
By the end of year 1, we plan to have designed, fabricated and tested the following two chips:
1. An 8-channel amplifier chip with 8 voltage outputs. These amplifiers will be fully characterized on the
benchtop for their input-referred noise, gain, bandwidth, and power consumption. After this electrical full
characterization, the part will then be verified with the neural simulator before testing begins in vivo with
the rodents in Dr. Sanchez’s laboratory as described in Aim 3.
39
Principal Investigator: Harris, John G.
2. An 8-channel biphasic IF chip with on-chip analog voltage used to control the comparator thresholds
and the refractory period length. For a constant input, we will use an Agilent 1693 digital analyzer to
record the timing information of the pulse output with the sample rate of 5ns. We will measure the
dependence of the spike rate on the refractory period and the comparator threshold values. We will
also quantify the amount of jitter in the spacing of the output pulses to obtain a noise estimate. As
described in Section 3, for a sine wave input, we use the IEEE-STD-1241 standard [ADC standard] to
fit a sine wave to the output. Using an off-line ADC test evaluation algorithm, we will determine the
effective number of bits in the conversion [Markus and Kollar, 2001].
4.2. Multiplexing. A scheme for multiplexing the outputs of the multichannel IF system will start in the second
year. In order to multiplex several (here 8 or 16) pulse encoded channels through the single channel
communication system, we will use an asynchronous address event readout (AER) [Boahen, 2000]. In this
multiplexing scheme, an asynchronous digital arbiter scans off the address of each firing comparator. In this
case a 3-bit address will encode the 8 channel addresses. A variation of this scheme is already employed in
the time-to-first-pulse imager chip already designed within the CNEL lab [Qi, Guo and Harris, 2004]. AER takes
advantage of the nature of the slow and sparse timing signals (~milliseconds) compared to the speed of the
digital VLSI circuitry (~nanoseconds). The alternative is to continually poll the outputs of each channel,
checking if the neuron has fired a pulse or not. This approach is both power hungry and prematurely quantizes
the timing of the pulse. By the end of the second year, we will have completed the design of a chip containing
eight-channels of IF components, followed by an AER arbitration mechanism.
Another result of multiplexing onto a single channel is that each pulse must now be tagged with the
appropriate channel address during transmission. For example, different transmission frequencies could be
used for each channel but this would lead to a large cumbersome system. We have decided to use a simple
timing code where we append a second pulse onto each pulse where the first pulse signals the pulse time and
the time until the second pulse encodes the channel number. This mechanism ensures that extremely simple
and low power hardware be used in the implant. The receiver on the cage will record the time of each first
pulse and use the time until the second pulse as a tag. The circuitry for adding the pulse tag requires a 4-bit
digital-to-analog converter (DAC) designed using a current splitter [Bult & Geelen, 1992]. The output current of
the DAC will be proportional to the channel number. We already have had success in our laboratory designing
a similar DAC for another application. A simple timer will be set up using the DAC current to discharge a fixed
capacitance, to fix the time before generating the second pulse.
By the end of year 2, we plan to have designed, fabricated and tested the following two chips:
1. A combined 8-channel amplifier chip with biphasic IF and AER readout. In addition to the DC, sine
wave and neural simulator tests described above, we will feed in neural signals from our recorded
database through a DAC on a PC (see section 4.5 for the full description). The recorded pulse times
will be used to completely reconstruct the original signal and a signal to noise measurement of the
reconstruction will be performed. Finally, this part will be fully characterized and tested in vivo and
compared to a commercially available amplifer, as described in AIM 3.
2. A chip which can automatically tag the channel number with the proper placement of a second bit. On
the benchtop, we will verify that the output pulses properly identify the correct correct channel. We will
test the nonuniformity of the temporal spacing within a chip but also jitter in the pulses for constant input
and their variation from chip to chip. Finally, this chip will be tested with an interface with the back
telemetry system developed in AIM 2.
4.3. Battery Operated, Portable, Multichannel IF System Design and Testing. The results from the first two
years will be used to optimize the design for the two primary design constraints of the electronics: (1) to reduce
the required data bandwidth to allow as many simultaneous recording channels as possible and (2) to reduce
the power dissipation of the electronics to such a level as to allow many hours of in vivo recordings on battery
power. All chips designed in the third year will use automatic voltage references to eliminate the need for wires
to set the various analog voltage parameters in the system. Other user-defined thresholds will be set with a
digital control that is transmitted through the forward telemetry communication system. A simple current
switching DAC will be used to convert the digital bits to analog currents to set the thresholds. The system will
be designed for battery-supply operation and so must be invariant to some amount of power supply droop.
40
Principal Investigator: Harris, John G.
In summary, by the end of year 3, we plan to have designed, fabricated and tested the following two chips:
1. An optimized 8-channel amplifier chip with biphasic IF and AER readout. All external voltages for this
chip will be set with either automatic voltage references (for bias voltages) or programmable digital
controls (for user controlled thresholds and refractory period length). All the performance tests and
measures from the year 2 experiments will again be employed. In addition, the reliability of setting the
analog voltage values using the digital controls. This chip will then be connected to both the forward
and back telemetry systems described in Aim 2 with all the performance tests again being performed,
i.e. DC test, sine wave test, neural simulator test, recorded neural stimulation and finally in vivo with
both forward and backward telemetry intact.
2. A prototype chip for a hybrid amplifier/IF system which combines the two separate systems into one
block to further reduce power. The standard amplifier verifications will again be performed. The key
comparison is if this new style of amplifier can be competitive with our current architecture at a lower
power dissipation. If successful, this part will be tested in vivo to verify its performance compared to
commercially available amplifiers.
During the final two years of the project, we will migrate all of our designs to the 0.18um TSMC CMOS
process. The more aggressive and more expensive technology is necessary to achieve our goals of 16channel implant with low enough data bandwidth and low enough battery power to run experiments with the
rats lasting between 45-60 hours depending upon the accuracy selected. It should be noted that the inductive
recharging approach outlined in the FWIRE vision, although not part of the current proposal scope, will enable
many more neural recording experiments in the future. The fabrication runs in year four will be used to
prototype basic building blocks in the system. We will decide which amplifier type to use in the new process.
The 0.18um process has two types of transistors: nominally digital transistors optimized to run with a 1.8V
supply and nominally analog transistors with thicker oxides. The design will be optimized such that the digital
and analog components are run as fast and low-power as possible. In the final year, all the tested building
blocks will be put together into a single IC. Also, during the final two years of the project, automatic
mechanisms for calibrating the various subsystems will be put in place. Calibration procedures will include a
startup mechanism where each channel will sequentially transmit a known DC value. This will allow the
receiving system to learn both the DC gain of the channel and the values of the time delays for the tagging bits.
By the end of year 4, we plan to have redesigned, fabricated and tested
1. 16-channel amplifier on a single chip in 0.18um technology. These parts will be fully characterized as
described above both on the benchtop and in vivo.
2. 16-channel biphasic IF coding system in 0.18um technology. This chip will be characterized and
interfaced to the forward and backward telemetry system.
Finally, by the end of the project (year 5), we will have:
1. fabricated a final design of the 16-channel amplifier/IF chip with AER readout and pulse tagging.
2. tested the IC with full in vivo testing with both forward and backward telemetry through the
communications chip.
4.4 Sampling Theory for the IF representations
Although the IF sampling scheme provides reconstruction with demonstrated accuracy using Eq. 12, little is
known about the following IF properties: the minimal density of pulses for perfect reconstruction; the
dependency of amplitude accuracy on data rates; aliasing as a function of data rates; power tradeoffs as a
function of data rates. Taking full advantage of these IF representation properties is predicated on extensive
simulations with real data and also on further understanding of the theoretical principles to guide the
parsimonious choice of design parameters. Sections 4.4 and 4.5 will explain the proposed work to quantify the
tradeoffs. Section 4.4 will discuss two separate issues: the conditions for perfect reconstruction at the sampling
frontend, and the reconstruction scheme at the backend.
4.4.1. Perfect reconstruction from IF sampling and rates of convergence: Since the problem formulation is very
similar to the well known Whittaker-Shannon-Nyquist sampling theorem [Marks, 1991], but with non-uniform
samples, the obvious theoretical framework is the generalized sampling theory for non-uniform sampling
[Marvasti, 1987]. We have previously established that the input signal can indeed be reconstructed from the
pulse timing using Eq. 12 with an error as small as desired if tn+1-tn < T, where tn is the timing of pulses
produced by the IF representation and T is the inverse of the highest frequency in the input signal [ref].
41
Principal Investigator: Harris, John G.
However, we also believe that this is a pessimistic bound that will increase unnecessarily the average data
rates produced by the IF representation because it will lead to more pulses than required. It is therefore
important to find a more realistic bound. An experimental approach using simulations with real neurological
data will define the minimum allowed data rates by straight comparisons with the input after reconstruction.
This will be done in our benchmark test discussed in the data interpretation section. However, this
experimental approach is both signal and reconstruction dependent so it is also advisable to seek a theoretical
analysis. The analysis should involve the mimimal density of samples (instead of the pointwise lower bound)
as suggested by the theory of nonuniform sampling using Riesz frames [Benedetto, 1992]. We plan to utilize
the area operator that defines the IF representation to work out the proof. From the proof we expect that a
formal (possibly different) reconstruction method will be established, and will shine light on the structure of the
aliasing error, the reconstruction properties (bounds and rates of convergence) of the IF representation with
finite data and realistic reconstruction filters which are unknown, and should be established (see next section).
4.4.2. Practical reconstruction methods: There are two issues with the current reconstruction that need to be
addressed: Eq. 12 reconstructs the signal in an interval; Eq.12 is computationally intensive when there are
thousands of spikes in a segment of data because there is no obvious structure in the matrix, hence Gaussian
elimination must be utilized.
During the second year, we will simplify the reconstruction process. Towards this goal we will be working in
two parallel directions: (1) Eq. 12 resembles least squares; therefore we can utilize adaptive estimators of the
LMS type [Widrow, 1985] to solve for the optimal solution. Likewise, we can also use the RLS type of
algorithms [Haykin, 1996] to iteratively track the optimal solution. The issues to be investigated are the
accuracy and the convergence time as a function of the size of the interval. (2) The structure of the
reconstruction matrix is a function of the kernel utilized, which has been thus far a truncated sinc function and
can be responsible for the poor conditioning of the matrix. The theoretical solution is the inverse FFT of the
Riezs bases which form the Paley-Wiener space that will be established in 4.4.1. Very likely, the basis will not
admit a close form solution, therefore we propose to approximate it by the dual orthogonality of Slepian’s
prolate spheroidal functions (orthogonality on a finite interval) [Papoulis, 1977], or its sparse approximation
[Fancourt & Principe, 2000]. Alternatively, using the formulation of Higgins [Higgins, 1977], who studied nonuniform sampling in reproducing kernel Hilbert spaces, it is possible to define a kernel that guarantees
reconstruction with a small error for finite number of samples. This link to kernels is very important due to
recent theoretical and computational advances in kernel methods [Schölkopf, 2002], [Jenssen et al, 2004].
4.5. Data rates and fidelity of reconstruction.
One of the appealing characteristics of the IF sampling method is its ability to distribute more pulses in the
areas where the signal amplitude is larger. Intuitively, this brings the ability to reduce data rates and impact
differently the resolution of low and high amplitude signal features. Traditional sampling, without any further
processing will affect equally the data dynamic range [Marks 1991]. Therefore, it is worth studying data rates
smaller than the theoretical minimum determined in section 4.4 because the user may want to recover with
high precision only the high amplitude parts of the signal, decrease the data rate and transmit more channels.
We will illustrate now with an example this characteristic of the IF representation. Fig. 11 depicts the
compression effects for various IF pulse rates. The top left plot shows an original rat recording sampled at 25
kHz from Dr. Sanchez lab. The next three plots show the reconstructed signal using various rates achieved by
varying the comparator threshold, i.e. the minimal time between two consecutive pulses. Pulse rates are
17.8KHz, 9.2KHz and 6.1KHz. As the pulse rate decreases, the distortion in the signal is seen primarily in the
noise region and not in the spike waveform. Fig 11 right panel shows a zoom in of the spike waveform to show
that the reconstruction is preserved in the neural spike regions. From the opposite perspective, aliasing error
(i.e. the error produced by sub-sampling) will start to appear on the low amplitude portions of the signal, which
is very different from the known properties of Nyquist samplers. During the third year the major activity will be
to draw specifications for data rates in order to understand the impact of reduced data rates in the
reconstruction accuracy and to optimally design the multiplexer.
4.5.1. Selection of the IF comparator threshold for a given accuracy in spike wave shapes. One has to
understand that a study of fidelity of reconstruction with the sub-sampled IF representation can only be done for
a given class of wave shapes defined a priori (so it is not recommended for LFPs). Due to the importance of
neural spikes, we propose to conduct a simulation study to experimentally quantify the amplitude dependent
42
Principal Investigator: Harris, John G.
distortion created by a user selected integration threshold. The objective is to specify minimal practical data
rates per channel to support a variety of different experimental situations (visualization of neural activity,
automatic spike detection and spike sorting).
Fig 11. Reconstruction results for biphasic pulses and zoom-in.
Moreover, we will also compare the data rates of the integrate-and-fire representation with respect to the
conventional A/D converter and periodic sampling. The peak data rate will be set initially to guarantee an
accuracy of 8, 10 and 12 bits in the representation of spikes and the overall data rates per channel will be
quantified and compared with the equivalent 8, 10, 12 bit A/D converter data rates.
4.5.2. Multichannel transmission data rates andcollision modeling.
An indirect consequence of the refractory interval/integration threshold selection is their impact on the average
data rates, which ultimately will define the power consumption of the overall chip. Although the average data
rate is not very important for single channel transmission (the transmitter bandwidth for a single channel must
be dimensioned to the peak rate that is controlled by the refractory interval, not the average data rate), multiple
channel transmission is dependent upon the average pulse rate in each channel, and so the refractory
interval/integration threshold affects the overall data rate for multiple channels. Our analysis starts with the
single channel mean data rate. The mean event rate will depend upon the signal time structure, so statistical
modeling will be pursued to establish the sparseness of the IF representation. Our experience in information
theoretic learning [Principe et al, 2000] suggests that the time structure of the envelope of a signal can be
quantified by the kurtosis of the probability distribution of the random process.
The second study is to quantify the aggregate transmission rate of multiple data channels encoded with
the IF methodology. Since signals in each electrode are not perfectly synchronized, when several electrode
data are multiplexed in the common data stream for transmission, the typical overall peak data rates do not
increase proportionally to the number of electrodes. However, this depends upon the frequency and spatial
organization of the spike trains.
The third study is to model collisions in the multiplexing. Collisions (two or more channels placing pulse
events at the same time on the common buffer for transmission) will be modeled statistically. Memoryless
collision modeling will be used for simplicity in spite of the soft error allowed in our hardware design (once a
collision is detected, one pulse is sent and the other delayed which will create an error in accuracy). However,
if the channel being delayed puts out another pulse, a hard error occurs. The multiplexing scheme being
studied codes the channel by including a second pulse delayed by an amount equal to the channel number
(this delay is less than 1/32 of the refractory interval to avoid confusion with true pulses). This scheme will
double the average data rates, raise the constraint for the peak data rate and will also increase the probability
of collisions, but preserves the asynchronous nature of the IF representation.. Our experience of spike train
encoding with IF suggests that an average pulse rate of 10 KHz seems sufficient to represent spike trains,
which provides an overall average pulse data rates of 320 Kpulses/sec for 16 channels. The peak overall data
rates can be larger and meet our target of 500 Kpulses/sec.
4.6. Design of the external data decoding system. The fourth year will address the design of the real time
external data decoding system, which receives the data as a bit stream from the wireless receiver.
43
Principal Investigator: Harris, John G.
4.6.1. Effects of finite bandwidth and phase: The integrate-and-fire representation uses the time of occurrence
of the pulse to encode the amplitude information of the input. Therefore, any jitter in the occurrence of the
pulse as caused by noise or the finite bandwidth of the channel during transmission will be translated in an
amplitude distortion of the original wave. The effect of finite channel bandwidth in the reconstruction of pulses
at the receiver seems the most important. It is known that finite bandwidth channels will distort the pulses (by
convolution or similar operation) [Rice, 1945], [Logan, 1977] and [Marvasti, 1987]. For this reason, we have at
the transmitter to reformat the received waveforms into pulses, as it is done in conventional PPM receivers
[Lathi & Lathi, 1997]. Whenever the channel is stationary, the possible timing errors introduced by nonlinear
phase and finite bandwidth are systematic and can be eliminated from the IF representation. The impact of
jitter in time due to a time varying channels and noise seems a second order effect.
4.6.2. Errors in transmission. The IF representation is an asynchronous sampling scheme which means that
time is a continuous (not discrete) variable. Therefore, errors in the transmission can not be handled as easily
as in digital communications. Pulses are selected to be maximally resistant to noise inside the chip. During
transmission a pulse can be added or missed, which will create an error. The effect of an error in the
reconstruction is to produce a local (potentially high) distortion in the waveform, and to a lesser extent a small
distortion in the neighbourhood. This will be studied specifically through simulation. To mitigate the errors in
transmission we decided for a redundant pulse representation that facilitates multiplexing hardware but
penalizes data rates. We will also use multiple antennas to bring these errors to acceptable levels. The
receiver software will check for pairs of pulses at prescribed intervals for error detection. When an error is
detected, its effects can only be minimized, not corrected. If the error rate is too high under normal conditions,
framing (i.e. digitization of time in known intervals) will have to be implemented.
4.6.3. Real time Signal Reconstruction The goal is to design an add-on module to the instrumentation
conventionally used in the neuroscience laboratories (Plexon and TDT) that can perform the decoding of the IF
representation transparently to the user. We will implement the algorithms judged most appropriate for real
time operation in relatively inexpensive DSP (digital signal processor) systems. Real time means that the
reconstruction of one window must be over before the next window is received. We will use a Texas Instrument
TMS320VC33 Floating Point processor to implement the reconstruction algorithms, which is very powerful (150
MFLOPs, 75 MIPs), low power and inexpensive. The computational bandwidth of the reconstruction is now
around 2.9 MFLOPs per channel for windows with 1,000 spikes, which yields 46 MFLOPS for 16 channels and
provides a comfortable margin for real time implementation. The challenges of this task are the relative small
main memory, and the interrupt driven operation that must be taken into consideration without slowing down
the calculations for a real time operation. The two main classes of reconstruction methods are the analytic
solution and the iterative solutions. The iterative solutions have the interesting characteristic of being the least
computational intensive (O(N)), but they suffer from slow convergence. Therefore it is necessary to provide
users with sufficient control on algorithm parameters (type of reconstruction, accuracy of reconstruction, etc).
Another issue is the window based analysis, which will dictate a small delay in reconstructing the neural data
when applications of BMI are addressed. We will first develop the window based methods studying the effect of
the window length on the accuracy because they are the easier to implement, but we plan to also investigate
recursive implementations of the decoding algorithms that will enable real time reconstruction.
4.6.4. User Interface and ergonomics. Our design goal in the fifth year is to complete an embedded software
module that will control the FWIRE from a TDT system. The idea is to utilize the excellent hardware and
software modularity of the TDT to develop in Visual Basic a set of special windows using Microsoft Active X to
configure FWIRE, run diagnostics and the reconstruction algorithms. The parameters for configuring the
functionality of our probe will be encapsulated in user oriented parameters such that a technician will work with
FWIRE as if it was used with a tethered connection and, at the click of the RUN button, start collecting data to
disk. In terms of modes of operation, FWIRE will have the data collection mode, a configuration mode to select
the parameters, a self test mode, and can be turned off or on. The FWIRE setup protocol bits are: configuration
(on/off) of each channel independently (16 bits); configuration of the integrator threshold (6 bits); configuration
of the refractory period (6 bits); programmable gain (3 bits). These bits will be sent every time the user wants to
make a change in the configuration to minimize the hardware requirements on chip and in the transmission
(which is one directional to the chip and low bandwidth). The user interface will communicate with the chip and
display the battery status. The FWIRE window configuration software will have a preview mode that will allow
the user to turn the chip on and visualize the data. If channels are not working they can be turned off (to save
battery life), electrodes can be selected in the bundle, and the thresholds chosen to provide neural data of
44
Principal Investigator: Harris, John G.
varying quality. When the researcher is happy with the configuration, the reconstruction algorithms will be
selected (least squares or iterative) and configured (window size, reconstruction function, number of
interactions), and the RUN button pressed which will start collecting data to disk or to further processing within
the TDT system. We will provide the ability to dial in the resolution of the representation in each channel of
FWIRE. Users may want to collect and store in full resolution just a few channels, and receive a low resolution
signal in the majority of channels; but in other cases they may prefer to reconstruct the waveforms from all the
electrodes with lower resolution.
Interpretation of Results
In the first year we will collect very high quality single channel spike train and field potentials data from
selected microwires of 4 different rodents (15 minutes per animal) with a TDT system (32 bit resolution, 100
KHz sampling) spanning the conditions of low and high SNR and low and high firing rates as normally
encountered in BMI lever press experiments. This database will be our primary benchmark control, where
systematic comparisons of the IF representation for spike detection, spike sorting and local field potential
accuracy will be performed. From this single channel database, multiple channels will be created with known
(and different) delays to test the multiplexing and collision algorithms.
The algorithms for spike detection will be the basic threshold and matched filter techniques implemented
in the TDT recording system. For spike sorting we will be using clustering in Principal Component Analysis
(PCA) space, see [Lewicki, 1998] for an overview of these methods. The automatic detection and sorting will be
performed in this data and validated with human scoring. Field potentials will also be obtained from these
recordings and independently stored. Tests for field potential accuracy are more difficult to carry out, because it
is not known where the information really resides. We can only rely on the error between the “true” (high
definition) waveform and the reconstructed waveform, so we propose to use several norms of the error to make
the comparison (L1, L2 and Linf).
When necessary for end-to-end testing, these data sets will be transformed by a high resolution (24 bit)
D/A converter back to the continuous time and amplitude domains, attenuated and fed to the FWIRE amplifiers,
IF converters, and wireless blocks. Although there will be much more data used to test our FWIRE, results of
our design and its modifications will always be reported in this benchmark. In this dataset we will have the
possibility of checking the effects of jitter in the IF representation, the SNR in our ultra low power amplifiers, the
effect of data compression in the accuracy of the IF representation, the effects of collision in the multiplexing,
accuracy of the IF reconstruction algorithms, appropriateness of the statistical models developed to specify
performance, etc.
In year one we will simulate the effect of jitter in the IF reconstruction, since we already have this figure
from the chip measurement (see section 3.2). This first test will be all digital: from the high definition sampled
data we will use Simpson’s rule to approximate the integral of eq 11, and will simulate the nonideal effects of
the electronic implementation translated in a random jitter of known standard deviation in the creation of the
pulses. The reconstruction algorithm of Eq. 12 will produce the reconstructed spike data. The spike detection
and sorting algorithms will be applied to this data stream and the results compared with the “ideal” high
resolution data obtained by Nyquist sampling. In year two we will improve the realism of the simulations with
the first end-to-end (analog-in) amplifier and the IF representation chip and reconstruction. We will also test the
effects of the bipolar IF prepresentation, refractory period in data rates and accuracy in waveform quality, as
well as more efficient IF data reconstruction algorithms. In year three we will test the accuracy of multiplexing,
as well as our statistical models for compression accuracy, collision, and data compression. In this year we will
also test again the accuracy of the IF representation with the jitter measured thru the wireless device. Year four
will benchmark the IF representation with the Nyquist sampler with the same peak data rates (worst case
condition), and the same average data rates to simulate the functioning of the multichannel apparatus with
collisions. Year five will compare the full 16 channel chip in the benchmark. These tests are important because
at lower powers jitter and amplifier SNR will change.
4.4.1 Perfect Reconstruction (year 1): This study (for the prototype) will help define the minimal density of
samples and help create the required knowledge for IF representation for neural data. (1) an extensive
simulation with the benchmark dataset to quantify how the density of samples affects the reconstruction error.
Use very large kernel sizes, very large data windows to guarantee a very small reconstruction error due to
finite length effects. Use the L1 Linf norm to quantify the error. Start with the bound and increase t 5 fold.
Plots of the error for several different segment sizes. Pay particular attention to spikes and rhythmic features of
LFP. (2) a mathematical proof that the IF representation is a sampling set; (3) the minimal density of pulses
that obeys the condition for the Paley-Wiener Completeness theorem and a comparison with the simulations;
45
Principal Investigator: Harris, John G.
(4) more insights on the formal reconstruction functions, the structure of reconstruction error, bounds and rates
of convergence.
4.4.2 Reconstruction Error (year 1): This study (for the prototype) will decide the backend reconstruction
algorithms (1) the reconstruction accuracy for several practical sample densities the will be quantified in the
benchmark data set as a function of the two classes of reconstruction algorithms (block methods and iterative
solutions) and their parameters (window size, kernel shape and length. All methods will be compared with the
original high resolution data in terms of L1 , Linf norms. Special attention will be given to reconstruction errors
during spikes. (2) Establish the local and neighbourhood impact of missing pulses in the reconstruction. We will
address both single pulse and burst errors to evaluate the robustness of the reconstruction. (3) Computational
Complexity of the algorithms will also be determined.
4.5.1. Spike Accuracy/Data Rate Tradeoff (year 2): This study (for the prototype) will establish the minimal
data rate (below the theoretical limit) that is still useable for spike train work. (1) Amplitude distortion table as a
function of data rates to guide the establishment of minimal data rates and the user selection of the appropriate
accuracy for their specific application. (2) Effect of spike detection and sorting test programs to spike trains
data reconstructed with different data rates to show the expected degradation in performance. (3) A practical
analysis of the aliasing in the IF representations.
4.5.2 Establishment of the Multichannel Data Bandwidth for transmission (year 3): These studies (for the
prototype) will determine the practical peak and average data rates that can be expected from FWIRE for spike
trains and LFPs. (1) find theoretical bounds for the mean event rate per channel as a function of refractory
period and comparator threshold for several distributions starting with the Poisson (modeling the spike rate)
and the generalized Gaussian distributions (for field potentials). Compare these theoretical bounds with the
rates obtained from real spike train/LFP from 4.4.2 and 4.5.1. (2) Establish a theoretical bound for the peak
data rates assuming that the electrode spike trains are independent across channels. (3) Establish
experimental bounds by aligning and delaying spike trains by known amounts; (4) Compare with practical spike
trains collected from multielectrode arrays during BMI experiments. (5) Duplicate the studies with LFPs. (6)
Replicate for combinations of LFPs in some channels and spike trains in others. (7) Establish through
simulations the probability of collision that will not be noticeable by the user and spike detection and spike
sorting programs.
4.6.1. Jitter in transmission Deliverable (year 4). This study (animal testing) will show that the pulse
reformatting and the transmission will produce a reconstruction error comparable to the jitter produced in the
creation of the spikes by the analog hardware. (1) Send known pulse data through the RF subsystem
implanted in a rat and measure the L1 and Linf error between the true reconstructed signal from the original
pulses and the reconstructed received pulses.
4.6.2. Quantify errors in the transmission Deliverable (year 4). This study (animal testing) will evaluate the
transmission errors with FWIRE implanted in the rat (1) Create statistics for occasional pulse errors (missed or
included noisy pulses) and error bursts during normal operation in a behaving rat. Correlate these errors with
animal behaviour through video. (2) Establish the minimal number of antennas that need to be used to bring
the error rate within acceptable levels given by the reconstruction tests.
Potential Pitfalls and Alternative Approaches
The IF representation is a new sampling scheme that possesses very different trade-offs when compared with
the traditional Nyquist samplers. All of the very interesting properties described in this proposal are derived
from the property that the integral of the amplitude is encoded in the time between pulses, which creates an
asynchronous pulse train. This is also the potential pitfall of the technique because time between pulses is a
continuous variable. Our design preserves this characteristic entirely from generation, to multiplexing to
transmission. The problem of continuous variables is that they are susceptible to noise. We reduced
susceptibility to noise by creating robust, easily detected pulses that carry information only in their time of
occurrence. Jitter in the pulse creation is under control for this application due to the low frequencies of
biological data and is not a major concern. Asynchronous pulses also mean that the traditional techniques of
digital communications cannot be easily applied to error correction. This is a potential problem in the channel
multiplexing and in the transmission. In the AER protocol, one of the pulses will be transmitted while the others
are buffered. This delay will change the firing times of the pulses used in signal reconstruction which adds
distortion to the signal, but it is not catastrophic. We will design the system such that these delay times are as
small as possible relative to the inter pulse intervals thus limiting the amount of distortion to an acceptable
level. In terms of transmission the problem may be more severe. We have created redundancy in the pulses to
46
Principal Investigator: Harris, John G.
implement the channel coding, not only for simplicity but also to enable error detection (although we pay a
penalty in the data rates with this choice). We also create a setup with several receiving antennas to decrease
the probability or error bursts during the transmission. If these measures will not keep the error rates within
reasonable levels, we will have to frame the pulses in the multiplexer (i.e. digitize the pulse location). The
penalty is twofold: first, some error will be incurred (digitization of the time variable), which for our application
will not require a high sampling rate due to the low bandwidth of biological data. Second, the data rates will
also increase because now a continuous transmission of zeros and ones (pulses) is required. A more efficient
multiplexing (frames) can be used which avoids the redundancy. The big advantage is that all the known
methods of error correction in digital communication can now be utilized.
Another major issue in the design of the implanted electronics will be the effective use of calibration. Analog
CMOS implementations are plagued by component mismatches and threshold variations. Fortunately, the
system is robust to most of these imperfections. Certain variations are serious, including 1) variation of the
refractory interval and 2) variation of the interspike interval for the channel encoding. In these cases, small
variations from channel to channel are OK as long as the reconstruction algorithm can estimate the proper
values. Calibration will be implemented by sending a maximum signal through each channel is succession,
allowing the receiver to calculate the refractory period of the channel as well as the channel encoding delay.
Noise, measured as time jitter, will also be monitored by the receiver. This calibration routine will automatically
run at power up. Battery life will be inferred from the changing interspike intervals of the tag pulses.
Specific Aim 2: To design an ultra low-power (1 mW), low-bandwidth (500 Kpulses/sec) wireless link
and integrate the multiple modules (electrodes, integrate-and-fire amplifiers, communication link) into
an implantable package using a flexible substrate.
Hypothesis
An implantable wireless neural recording electrode array is enabled by the bandwidth and power savings from
the integrate-and-fire sampling scheme and a modular approach that allows interchangeable components.
Rationale
For implantable operation, the entire unit needs to be low-power and wireless and hermetically sealable in a
biocompatible unit securable to the skull. In addition to the power savings of the integrate-and-fire sampling
method, the resulting low-bandwidth required for the same resolution reduces the power consumption for
wireless data transmission. The modular approach allows the electrodes, integrate-and-fire amplifiers,
communication link, and power source to be optimized independently and interchanged.
Experimental Approach
The entire FWIRE is a modular system that incorporates a microwire array, a flexible substrate, signal
processing and communication electronics, and a power source in an implantable package. By partitioning the
FWIRE into modules, each may be optimized without constraints from the other parts. This approach is
consistent with established guidelines to maximize feasibility of multifunctional transducers [Senturia, 2001].
Architecture. As illustrated in Fig. 12b, the FWIRE neural recording package consists of a flexible substrate
that serves as the platform for the integrate-and-fire amplifier and wireless telemetry chips, transmit antenna
(TX) on the topside and battery and receive/power coil on the bottomside. Modular electrodes are connected to
attachment points on the flexible substrate as shown. The package will be encased in medical grade silicone.
Screws provide an electrical reference ground for electrical interconnection incorporated in the silicon platform
chip. The size of the implantable unit is illustrated in relation to the anatomical features of the rat skull in Fig.
12a. An expanded assembly view is detailed in Fig. 12c. In addition to the integrate-and-fire amplifier, the key
components in the modular design (i) flexible substrate, (ii) modular electrodes, (iii) wireless telemetry link, and
(iv) battery are described below. The integrate-and-fire amplifier design and testing was discussed in detail in
Specific Aim 1 and will not be repeated here.
47
Principal Investigator: Harris, John G.
IC
Electrode
Array
Patterned
Substrate
Flip-chip
connection
Battery
(i) Flexible Substrate
Using conventional micromachining techniques, we will design a flexible
polyimide substrate, similar to the technique demonstrated by us to
fabricate the flexible substrate electrode array (Patrick 2006). In this
prototype, the electrodes extend from the cable 2 mm and include 20  50
m electrode sites on the tips. The metal traces and corresponding bond
sites can be made to any size specification and spacing distance via
photolithography. Therefore, the integrate-and-fire spike amplifier and the
wireless communication circuit will be packaged on the flexible substrate
using flip-chip bonding techniques.
Coil
Flexible substrate specifications.
(c)
Supporting
Substrate
Electrode
attachment
sites
50µm pitch
Electrodes
Modular
Electrodes
Flexible
substrate
IF-IC
12mm
Thru vias to
RX/Power Coil
28mm
18 mm
+ Thru vias to
Battery
RFIC
Insulation The insulation
is
composed
of
polyimide
and
will
encapsulate the wiring,
thereby
creating
a
flexible substrate.
A
silane primer will be
used
to
promote
adhesion. Flexibility of
the insulator relieves
strain
between
the
silicon platform and the
probes.
TX antenna
Protocol. All processing
is performed on the
Supporting
12.5 mm
screws
surface of a 100 mm
diameter silicon wafer
3.5 mm
covered with Kapton
15mm
tape (which provides
Coil winding
(a)
adequate adhesion for
Coin Battery
(b)
the
subsequent
(10 x 2.5 mm)
polyimide layers). The
Fig 12. Architecture for implantable wireless neural recording electrode system.
polyimide
bottom
(a) illustration of size and placement of implantable unit, (b) top and side view,
insulation layer (PI 2611,
(c) expanded assembly view.
HD Microsystems) is
spin deposited and cured to a final thickness of 20 µm. Sputtered nickel, 100 Å, is patterned to define the
wiring and bond pad dimensions. Then Ni is electrodeposited on the Ni seed to an average thickness of 20 µm
via a 10 mA direct current for 4 hours in a nickel sulfamate bath (Nickel S, Technic Inc.). Adhesion promoter
(VM9611, HD Microsystems) is next applied followed by three spin coatings of the PI 2611 to achieve the final
20m top layer of insulation. Al (1000 Å ) is patterned as a hard mask for the subsequent oxygen plasma etch.
The etching process includes an O2 reactive ion etch (RIE) that removes the polyimide from the top of the
bond pads. Finally, the substrate is immersed in an electroless gold plating solution (TechniIMGorld AT, 600,
Technic Inc.) that covers the bond pad sites with 0.1m of gold.
Biocompatibility. Kapton, a company manufactured polyimide, was given a safe rating (out of safe, unsafe and
doubtfully safe) in a chronically implanted study [Loeb, Walker et al. 1977]. Thus, polyimide is a good choice in
terms of biocompatibility for the insulation material. The nickel and gold bond pads and the electronic
components will be encapsulated in medical grade silicone.
(ii) Modular Electrodes
48
Principal Investigator: Harris, John G.
The primary modular electrode array will consist of conventional 50
m diameter polyimide-insulated tungsten microwires assembled
into arrays which have been extensively used in chronic neural
recording work. Commercially available laser cut tungsten
microwire arrays (Omn1010, Tucker Davis Technologies, Alachua,
Florida) will be modified by removing the Omnetics connector. The
tungsten microwires will be soldered to the bond pads on the flexible
substrate as detailed in Fig. 12b. Conventional tungsten microwire
Fig 13. Tungsten microwire
arrays have limited microwire densities. For higher electrode
Array (Tucker Davis Technologies.
densities, alternative modular electrode designs including a flexible
substrate microelectrode array (Patrick 2006) are discussed in the section Potential Pitfalls and Alternative
Approaches.
(iii) Wireless Interface
The proposed implementation of the FWIRE recording microsystem shown in Figure 12 integrates all
components of the wireless interface including RFIC chip, TX antenna, RX/Power coil and battery in a low
profile and compact platform measuring 3.5mm in thickness, 12.5mm in width and 18mm in length. Our
approach for the RF subsystem in this highly modular architecture takes into consideration the mechanical and
physical constraints of the implant site, and facilitates independent development and testing of its individual
components. In this subtask of Specific Aim 2, we will design, fabricate, test and integrate the proposed RF
subsystem to allow wireless recording and transmission of neural signals in behaving animals.
Wireless Interface System description
The design of the wireless interface will be independently optimized for power efficiency and transmission
bandwidth and will consist of two RF links: (i) a low frequency inductive link, operated at 4MHz, will enable
transmission of 10kb/s data from an external base station; this link may also be used to wirelessly power the
implant site for battery charging in the event that a secondary battery is used for long term chronic implants,
and (ii) a 750MHz uplink for transmission of 500k pulses/s. The hardware blocks that make up the RF
subsystem are shown in Fig 14. Over the past six months we have successfully developed and tested the
power and battery management system and downlink receiver (see preliminary results). The remaining blocks
of the RFIC implant chip, including a µController, register bank and uplink transmitter are currently being
designed and are expected to be completed during Year 1. The external components of the RF subsystem
include (i) the power and downlink transmitter consisting of a D/A, a DC-DC converter and a Class-E amplifier
and (ii) the uplink receiver and antenna link. A commercial A/D and Digital I/O PCI card will be used to sample
the down-converted signals from the direct conversion uplink receiver for subsequent digital signal processing
using a standard PC. This PCI card will also be used to modulate and digitally control the downlink transmitter.
49
Principal Investigator: Harris, John G.
Fig 14. Wireless interface functional block diagrams. The diagram includes die photos for completed blocks and layouts
for submitted (in-fabrication) designs. The modules shaded in yellow are currently under design.
Power and forward telemetry link design: In the proposed architecture, the power link is not simultaneously
operational with the data telemetry links, thus avoiding noise management problems due to interference.
Previous experience in developing wireless interfaces for retinal implants have shown this to be a critical
design challenge, and often difficult to resolve in an experimental setting. Power carrier and data interference
is resolved in our current approach as a result of one of our original design goals, namely removing external
harnesses attached to the animal during the neural recording phase. This initial definition of the mechanical
interface suggests that powering of any internal devices during the neural signal detection and recording phase
must be accomplished via a miniature implantable battery instead of an inductive power link. In our current
design effort, we will employ a miniature coin-type Li-MnO2 primary battery that measures 10mm by 2.5mm
with a rated capacity of 30mAh at 3V. If we assume a power dissipation of 2mW (or roughly 666µA continuous
discharge rate), a total of ~45 one hour recording sessions can be carried out before the battery is completely
discharged. Similarly if low bandwidth mode is used with the IF chip, we project the total power of the system
to decrease to 1.5mW resulting in 60 one hour recording sessions. The lifetime of the implant can be easily
extended by employing a rechargeable battery which will also be supported with our current power and battery
management system. Although less critical given that external test bench equipment is generally free from
power limitations, results from previous experiments (Bashirullah) suggest that wireless power transfer
efficiencies of 30%-40% can be attained.
A communication link between the external transmitter and the implant receiver is required to update internal
system settings such as threshold voltages for neural signal detection. This forward telemetry downlink will
employ a synchronous communication protocol based on amplitude shift-keying (ASK) and pulse-position
modulation (PPM) scheme that facilitates clock and data recovery on the implant side (see preliminary results).
The sensitivity of the first pass receiver prototype was measured at 3.2mV with a power dissipation of 70µW,
which is sufficient for short range signal detection and recovery. Following clock and data recovery, the signals
are fed to a low complexity µcontroller that performs parity check and CRC checksum for data integrity. The
data is subsequently loaded and stored into a register bank to update the desired internal system settings. The
external downlink transmitter employs a standard class-E amplifier to modulate the 4MHz inductive link. ASK
modulation will be accomplished by varying the class-E supply voltage using a DC-DC converter. An initial
prototype of the DC-DC converter in 0.6µm CMOS has been submitted for fabrication and will be tested during
Year 1. Design and integration of the class-E amplifier, DC-DC converter and PCI card will be targeted for Year
2. Notice that custom IC implementation of the downlink transmitter is not necessary for the completion of this
task, as this can be implemented using off the shelf components. During the course of this task, we will monitor
the progress of the overall RF subsystem and make adjustments in student resources to complete the
essential tasks as required.
Back-telemetry link design: Due to the stringent power dissipation requirements of the implant circuits, a very
simple modulation scheme based on short pulse generation is chosen for the transmitter. This is much like an
ultra-wideband (UWB) transmitter without the PN-sequence code generation circuits used to spread the
radiated energy over a wide frequency spectrum. A key benefit of this approach is the simple integration with
the analog base-band processing circuits. Since the neural signal information is encoded by pulses of varying
time-base (i.e. the encoded signal information content is in the spacing between two pulses), the transmitter
can be driven directly by the base-band pulse generation circuits. Thus, no additional mixers or oscillators are
required; this minimizes area, power and complexity of the implanted chip. The transmitted signal will be
detected by an uplink receiver (base station) 0.5 meters from the source. Our link margin analysis indicate a
receiver sensitivity requirement of -72dBm @ 50MHz or -40dBm @ 800MHz for a miniature 7mm transmit coil
antenna operated in normal mode, receiver signal-to-noise ratio (Eb/No) of 13dB for BER of 10-5, -174dBm
noise floor, 1MHz noise bandwidth, ~ 5dBm transmit power and a receiver noise figure of 15dB. The analysis
includes 2mm of skin tissue loss [http://niremf.ifac.cnr.it/tissprop] estimated at less than 1dB. A first version of a
750MHz direct conversion receiver chip shown in Figure 14 has been submitted for fabrication in UMC 130nm
CMOS process. The microchip includes an LNA, I/Q mixers, LO ports and polyphase filter, IF filters and
amplifiers, and line drivers. Careful layout is used to minimize capacitive and substrate coupling between LO
signal and the LNA input RF port in order to reduce LO leakage. External antenna matching, filtering and
oscillator will be used to verify circuit functionality during Year 1. To simplify hardware development for
50
Principal Investigator: Harris, John G.
baseband processing, a PCI card with A/D will be used to perform complex demodulation after signal sampling
and A/D conversion.
Intepretation of Results
In order to integrate the multiple modules (electrodes, integrate-and-fire amplifiers, communication link) into an
implantable package using a flexible substrate, each module will be tested separately in different combinations.
By the end of year 1, we plan to have designed, fabricated and tested the following modules:
1. tungsten microwires attached to flexible substrate and Omnetics connector and encapsulation via wired
neural recording experiments in vivo
2. encapsulation of flexible substrate with battery and receive coil
3. flip-chip bonding of amplifier chip with flexible substrate
The focus of the experiments is to characterize the attachment of the tungsten microwire array with the flexible
substrate and to test in vivo using wires connected from the headstage to a standard Omnetics connector.
By the end of year 2, we plan to test the packaging of the integrate-and-fire amplifier with the flexible
substrate/tungsten microwire array assembly and the wireless antenna separately. Specifically, we plan to
have designed, fabricated, and tested the following modules:
1. tungsten microwire/flexible substrate with integrate-and-fire amplifier, battery, and Omnetics connector
and encapsulation via wired neural recording experiments in vivo
2. tungsten microwire/flexible substrate with transmit antenna, battery, and Omnetics connector and
encapsulation via wired neural recording experiments in vivo
The focus of the experiments is to characterize the flip-chip bonding of the IF amplifier chip with the tungsten
microwire/flexible substrate with battery and to test in vivo using wires connected from the headstage to a
standard Omnetics connector.
By the end of year 3, we plan to integrate in an implantable wireless neural recording unit the IF amplifier,
wireless link, battery, and microwire array on an encapsulated flexible substrate. Years 4 and 5 will focus on
integration of successive low power low bandwidth implementations of the IF amplifier and wireless link.
Encapsulation hermeticity: Hermeticity will be evaluated by resistance measurements between adjacent
probes in the wired configuration.
Neural recordings: Data analysis of neural recordings is detailed in Specific Aim 3 including electrode yield,
signal to noise ratio, and waveform reliability. Since invasive microwire recording technologies are targeting
single unit neuronal activity, we will use the action potential as our standard for evaluation of data collected
from the neural recording implant [Nicolelis, 1999]. First, action potentials will be manually sorted using a
combination of waveform, template, and principle component analysis (PCA) based techniques. The success
of the electrode implant will be assessed daily in terms of electrode yield which is the percentage of implanted
electrodes that successfully provide discriminable action potentials. Additionally, we can use PCA to relatively
track the variance of each of the neurons waveshape over time [Lewicki,1998].
The focus of this specific aim is the realization of an implantable wireless neural probe utilizing the integrateand-fire sampling method in a modular approach. The integrate-and-fire method is theoretically modeled in
Specific Aim 1 and implemented and tested in Specific Aim 2. The remaining components, the microelectrode
array and wireless communications interface, have been successfully tested as detailed in the Preliminary
Results. Therefore, the experimental validation consists of testing the continued functionality of the
components after integration in the implantable package. However, as detailed in the following section on
Potential Pitfalls and Alternative Approaches, alternative components may be substituted in the modular
approach to the FWIRE implantable wireless neural recording electrode. Once the functionality of the implantready unit is verified, experiments with rats will be done at the University of Florida Brain Institute (Dr
Sanchez’s laboratory). The major aspects of the testing related to the design of the assembly are easy and
reliable insertion in brain tissue, testing of the footer to ensure proper insertion, testing of the stiffness of
51
Principal Investigator: Harris, John G.
electrodes, testing of the “sharpness” at the electrode end and rounded elsewhere to ease insertion and
reduce intrusiveness. Furthermore, the quality of the electrode recordings and their longevity will be
addressed.
RF subsystem development timeline
Task
Preliminary
Results
T.1
Power and BMS
Tested
T.2
Downlink RX and CDR
Tested
Year 1
Year 2
Year 3
Redesign,
Fab*
Redesign,
Fab*
T.3
T.1, T.2, µC and Register Bank
Design
Fab, Test
T.4
DC-DC Converter
In-Fab
Redesign,
Fab, Test
T.5
Class-E and Inductive Link
T.6
T.4, T.5 and PCI Card
T.7
Uplink TX
Design
Fab
T.8
750MHz Antennal link
Design
Fab, Test
T.9
T.7 and T.8
T.10
Uplink RX
T.11
T.9, T.10 and PCI Card
T.12
T.1 – T.11 (RF Subsystem)
Year 4
Year 5
Test
Test
Redesign,
Fab* Test
Design,
Fab, Test
Redesign,
Fab
Test
In-vivo test
Redesign,
Fab*
Test
Test,
In-vivo test
In-vivo test
Test
In-Fab
Test
Redesign,
Fab
Test
In-vivo test
Test
In-vivo test
Test,
In-vivo test
* 0.18µm CMOS Technology
Potential Pitfalls and Alternative Approaches
An issue regarding finite battery life is an opportunity for future modular enhancement of FWIRE. For
applications requiring more than approximately 45-60 1-hr recording sessions, a slightly larger battery (12mm x
2.5mm) can be employed with a capacity of 48mAhours. This battery will providing 72-96 1-hr recording
sessions depending on the amount of data compression. Beyond these recording times, rechargeable battery
technology is the only viable option to extend the operational lifetime. To accommodate the use of both primary
and secondary battery technologies, the wireless power interface is being designed to allow easy extension to
wireless recharging. Furthermore, as the design of the electronics mature, additional circuitry will be added to
extend the battery lifetime. For instance, smart sensors will be integrated on-chip to dynamically shut-off
unused blocks to minimize the static power dissipation associated with each module. The integrate-and-fire
amplifiers can also be operated in standby mode (i.e. lower gain and lower static power) while the input signal
is below a predetermined threshold. The entire system can be shut-off (i.e. placed on standby) on command
with an external transmitter. Moreover, individual channels could be activated or turned off to maximize the
recording periods. During sleep-mode, only the receiver is active (~20uA) to detect external commands.
Another potential concern is the amount of hardware development in the RF subsystem. It is our view that
significant progress has been made in both external and implant side electronics. We have designs that are
currently in fabrication and preliminary experimental results on power and battery management and clock and
data recovery circuits. However, we will accommodate alternative approaches based on commercially
available components such as LNAs, mixers and filters to implement base station electronics. In addition, our
modular approach to hardware development of the FWIRE implantable wireless neural recording system will
allow future enhancements. For instance, new microwire technology can be used to replace the conventional
tungsten microwire electrodes. This has been demonstrated by employing a flexible substrate microelectrode
array which can be customized for FWIRE.
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Principal Investigator: Harris, John G.
.
Flexible substrate microelectrode array
The modular nature of the FWIRE implantable
wireless neural recording system will allow future
enhancements in microwire technology to replace
the conventional tungsten microwire electrodes. For
example, we have demonstrated a flexible substrate
microelectrode array which can be customized for
FWIRE as shown in Fig. 15.
Specific Aim 3: Study in vivo the characteristics
of FWIRE during the full duration of the
implantable probe development. The system
performance will be fully characterized and
benchmarked.
Fig 15 a) Flexible substrate microelectrode array
with Omnetics connector. b) Microelectrode array.
c) Probe tip showing insulation along shank and
gold plating on tip.
Rationale: Animal studies are required for portions
of this research in order to test novel neural
recording hardware under controlled conditions that are not possible with human patients or on the
experimental electronics bench. We have considered alternatives to the use of rats as models for neural
recording implant design/testing and have found none that are available. Rats are the lowest order of animals
with neuroanatomical substrates similar to humans, and are therefore the lowest order of animals that we can
use. We propose to test the implant in an operant-conditioning lever pressing box. The proposed animal testing
will serve two purposes in the context of this study. First, a behavioral experimental paradigm where an animal
is freely moving untethered provides the envisioned environment of use for the proposed implant. Other
researchers that could benefit from this technology will also have to contend with the implant use in a similar
behavioral box that is subject to noise and wireless transmission issues. The proposed behavioral paradigm
will provide the most meaningful feedback for “real-world” testing. Second, the behavioral study (lever
pressing) proposed is an example of a well known protocol that has clearly definable pattern of neural activity
and modulation. Since others have studied the patterns of neural modulation have a guide of what to expect
from the neurons that the implant samples and transmits. Attempting to constrain the variable of neural
modulation to known and repeatable values will help equalize the testing of the electrodes, amplifiers, and
wireless. In contrast, if the animal were randomly exploring the cage we will not have a consistent environment
for evaluating implant performance.
Experimental Approach
In vivo surgical procedures and testing
In-Vivo measurements. Adult male 350-450g
Sprague-Dauley rats will be used in our studies
to accommodate the size of the implants. In-vivo
measurement is critical to the evaluation of
implant performance because it is difficult to
anticipate on the “electronics bench” all of the
factors that will influence performance. In our invivo paradigm, we will use the implant to target,
amplify, and transmit the activity of layer V cells
of the animal’s cortex. In this environment we will
develop and test the design specifications of the
implantable neural recording device. Many of the
Fig 15. Diagram of the implant under the skin.
design constraints involve those of biologic
tissue which can include neural tissue damage from electrode design and configuration, tissue heating from
implanted electronics, reliability of wireless transmission, hermetic sealing of electronics, and surgical
technique for chronic implantation.
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Principal Investigator: Harris, John G.
Surgical Procedures. The proposed neural recording implant shown in Fig. 15 will be attached directly behind
the craniotomy (Fig. 7b) and secured with bone cement and anchoring screws [D'Lima et al., 2005; Ward et al.,
1996]. The anchoring material will serve to prevent abrasion against the scalp which will be sutured together
to close the midline incision. Within the anchoring material, the electronics will be hermetically sealed to
prevent moisture and particulate corrosion and degradation. The microelectrodes will be implanted first into the
cortical tissue using a hydraulic micropositioning system (FHC, Bowdoinham, Maine) at a rate of 1mm/0.5hour.
The electrode polyimide cable is offset from the body of the silicon chip so that the array is not located directly
under the implant (Fig. 12). During implantation, the electrode array and chip will be arranged in a collinear
fashion and attached to a fixed drive arm which is steadied in a similar manner to what we currently use for
conventional microwire arrays that are commercially available. This arrangement will ensure that only dorsalventral movement is possible and slashing is avoided. The physical construction of the microelectrodes will
also play a role in preventing slashing. A soft footer is designed to protect the cortical surface from the ribbon
cable, allowing only the thin (approx. 20-50 m diameter) microwires to enter the cortical tissue. We propose to
leave 3mm of wire to be free of the polyimide ribbon coating which will form the shanks of the implant. Once
the electrodes are implanted, the flexible cable will be “bowed” as the chip is secured to the skull which will
provide strain relief and minimize torque on the implant.
Benchmarking Recording Apparatus. In-vivo electrophysiological recordings will be compared with the TuckerDavis (TDT) Pentusa (RX5) recording system. The RX5 houses five user-programmable Analog Devices Sharc
DSP processors (100 MHz, 128MB RAM) for the acquisition of up 64 channels of neurophysiologic data. The
modular nature of the implant design will allow amplifier and telemetry integration or parallel recording with
chronic neuronal recording electrodes that connect (via an Omnetics low-profile adaptor) to an impedance
matching headstage (16 channels each, max input ±4mV) and that is routed to one of four optically-isolated
and battery powered preamplifiers. At this stage, the signals are digitally converted using 16-bits of resolution
sampled at 25kHz. Digitized signals are sent directly to the PC via a high-speed gigabit interface and can be
accessed in real-time by a variety of analysis packages (Matlab, C, Neurosolutions) through ActiveX controls.
The Pentusa will be programmed to digitally filter the acquired neuronal activity: single units (HP: 300Hz, LP:
7kHz) and local field potentials (HP: 0.5Hz, LP: 400Hz). We will utilize a dual Xenon (2.4 GHz) PC (2 GB RAM,
1 TB storage) for data acquisition and Pentusa DSP control. The PC will run TDT’s OpenEx software which is
capable of synchronizing (with a shared time clock) all neuronal activity, animal behavior, and video. Included
in the software package are tools for visualizing and analyzing neuronal data including spike sorting. All
digitized signals are backed up online using RAID-5 storage. Bi-weekly, all recordings are sent to two archival
devices: a 1TB Dell network attached storage device (NAT) and DVD recordable media. Data will be made
available to all the members of the team.
Telemetry Testing. In order to characterize the link margin of the data telemetry and the coupling efficiency of
the coil and antenna, test fixtures will be designed and fabricated. Table 5 outlines the wireless link
measurements over the corresponding frequency range and distance. In-vivo testing will involve implanting
and securing (with screws) a data coil on the top of the rodents skull. The surgical field will be closed by
suturing the scalp over the implanted coil. The source of testing pulses will be a signal generator that is
attached by a harness (Kent Scientific, Torrington, CT) to the animal’s back. Wires will be routed through the
skin to attach the coil with the signal generator. On the receiving end, antennas will be placed between 2050cm away from the animal at a variety of orientations with respect to the top and sidewalls of the operant
conditioning cage.
Table 5 Physical Constraints on transmitter/receiver.
Wireless link
Back telemetry
(Data Out)
Forward telemetry
(Data In)
Transmitter
Source: cont. wave and pulsed signal generator
Antenna: implanted data coil
Frequency range (10-300MHz).
Distance (20-50cm)
Source: continuous wave signal generator
Antenna: external data coil
Frequency range (1-10MHz)
Distance (20-50cm)
Receiver
Antenna: external dipole
Measure signal attenuation using spectrum
analyzer
Antenna: implanted power coil
Measure signal coupling using oscilloscope
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Principal Investigator: Harris, John G.
Intepretation of Results
Data Analysis Since invasive microwire recording technologies are targeting single unit neuronal activity, we
will use the action
potential
as
our
standard for evaluation
of data collected from
the neural recording
implant
[Nicolelis,
1999]. We will compute
the electrode yield, a)
b)
signal to noise ratio, Fig 16. a) Pile plots of well isolated unit waveforms. b) PCA clusters for four units.
and waveform reliability
to asses the neural implant data collection performance. First, action potentials will be manually sorted using a
combination of waveform, template, and principle component analysis (PCA) based techniques. The success
of the electrode implant will be assessed daily in terms of electrode yield which is the percentage of implanted
electrodes that successfully provide discriminable action potentials. In Fig. 16a, we present a “pile plot” that
displays the superposition of discriminated action potentials from two M1 neurons in chronic recordings from
one of our rodents in a BMI task.
Data analysis of this type will allow us to compute and track waveform statistics (mean and standard deviation
of pile plot) over time. Additionally, we can use PCA to relatively track the variance of each of the neurons
waveshape over time [Lewicki,1998]. By using the first three components of the action potential PCA
decomposition we can create clusters in PCA space shown in Fig 16b. By computing the Mahalanobis
distance between cluster centers the properties of the electrode, surrounding tissue, and telemetry can be
assessed. Finally, the signal to noise ratio SNR of the signal will be estimated using the average ratio of the
power of the action potential peak to peak amplitude to the average power of the signal devoid of action
potentials. Since electrode, electronics, and neural noise are difficult to estimate in vivo, we will also compute a
noise measure as the deviation of single unit average action potential waveform with respect to each action
potential.
Potential Pitfalls and Alternative Approaches
Potential Problems, Limitations of Procedures, and Alternative Approaches.
1.
Movement of electrode headset. One minor problem that we have encountered during long-term
monitoring is the interruption or premature termination of longitudinal recordings caused by the unexpected
loss of an animal’s electrode headset. Although headset loss has been infrequent, it has occurred
secondary to scalp infection, or to mechanical dislodgement by the animal’s scratching or inadvertent head
impact the lid of its cage. We have been able to replace headsets without difficulty in the past. In cases in
which the headset cannot be replaced without causing significant stress to the animal or in the case in
which significant brain injury occurs during the reinsertion of the electrodes, animals will be euthanized
immediately and the brain prepared for histology as described in the methods section.
2.
Loss of single neuron recording. Chronic microelectrode technology, at the post-surgical stage, is
subject to changes in the extracellular environment. Dealing with the experimental variability of chronically
implantable arrays has been a formidable task because the sensor recording sites can be influenced by
immune response, or tissue encapsulation, and structural changes. These factors can cause the
impedance properties of the electrode to change over time. Therefore, the viability of chronic electrodes
and recording from single neurons has been limited to times from a few months to a year (Williams,
Rennaker et al. 1999). We are aware (Sanchez, Alba et al. 2005) and have developed techniques to
contend with the complications that can result from chronic array implantation. Despite these challenges,
we have recorded single neurons in rats for up to one year. In the studies proposed here, we are interested
in recordings that range from 1-3 months; therefore, tracking neurons is feasible as shown in the
preliminary studies.
3.
Biocompatibility problems. The topographical properties of the implant surface and tissue heating
55
Principal Investigator: Harris, John G.
strongly influence the properties of biocompatibility. After implantation, tissue healing will produce
numerous bioactive signal molecules and the formation of proteins that will contribute to the response of
the tissue to the implant and influence whether the body accepts the implant or not. To contend with these
reactions we propose the following tests
Morphological Examination of Implant. In years 2 through 5 we will assess the biocompatibility of the neural
recording implant components and as a whole at weekly, biweekly, and monthly intervals. Examination of the
implant will be obtained either by surgical explantation or at the time of autopsy. We will keep a detailed log of
each implant component with the following form fields [Braybrook,1997]: (1) Date and Location of
Implant/Explant; (2) Presence of biological tissues other than anchoring materials; (3) Presence of tissue
encapsulation; (4) Presence of bacterial/fungal infection; (5) Pre/post implant dimensions, color, weight; (6)
Consistency of surrounding biological tissues (hardening, tears, thrombus); (7) Loss/damage of electronic
components (by radiography and visual inspection); (8) Presence of surface modifications (examination with
microscope)
Hermetic Sealing. To maintain electrical stability of the implanted amplifiers and telemetry system we will
explore methods for creating an effective moisture barrier around the implant [Mackay, 1970]. The technical
challenge in hermetic sealing for this application is to maintain access for modifications/repair of the implant as
well as minimizing telemetry transmission interference. Due to the cost and time to manufacture the analog
circuits, it will be critical to choose materials that do not permanently encapsulate the implant. Therefore, we
will explore a variety of silicone, epoxy, and plastic sealing materials. We will test for the amount of weight
change at weekly intervals in the encapsulated device both in vivo and soaked in 0.9% saline at 39ºC.
Histological Analysis. The introduction of microelectrode probes into the neural tissue sets off a series of
morphological and metabolic reactions [Chapin & Moxon 2001]. In an attempt to protect the brain from the
foreign objects (probes), astrocytes and microglia become activated and are believed to be involved in
electrode impedance increases due to encapsulation. To confirm the amount of tissue reactivity and its effect
on recording performance, we will both measure in-vivo the electrode impedance and compare with
histological analysis. In vivo impedance will be measured each day with a BK Precision 885 L/C/R meter.
Impedance measurements will be taken at 1KHz using a constant voltage of 5mV. At this setting, a current of
less than 5nA will be introduced into the neural tissue. To obtain histological slices, animals will be sacrificed
and the brains will be excised. Prior to perfusion, animals will be deeply anesthetized with sodium pentobarbital
(70 -100 mg/kg, I.P) and then transcardially perfused with 4% paraformaldehyde. The brains will then be fixed,
sectioned and processed for histology. To assess the amount of glial reaction around the electrodes, the slices
will be labeled for glia filament associated proteins (GFAP). The amount of glia present will be correlated with
electrode data quality measures and impedance. In the proposed plan of research, we will contract Histology
Tech Services (Gainesville, FL) to perform the technical aspects of labeling for GFAP. Our laboratory regularly
performs analysis of excised tissue and we have core perfusion facilities to prepare the brains for histological
analysis.
5- TIMELINE
Due to the level of complexity of the proposed neural recording implant, we will outline here the component
based testing protocol that will be implemented. The goal in the early phases of testing is to verify the
performance of individual modules. As the design specifications of the components are validated, system
integration will begin and eventually lead up to the complete implantable neural recording system. This
approach offers a low risk of complete system failure from poorly performing modules. In this paradigm, system
interaction could be a consideration but since we are proposing a fully integrated design we will have to
address communication protocols earlier rather than later in the proposed plan. We will outline here the
specific in vivo tests that will be used to assess performance in terms of goals, experimental setup,
measurements, and animal requirements.
Year 1, Stage 1 Goal: Assess electrode recording performance; Setup: MEMS electrodes→Omnetics
Connector→TDT Headstages/Recording Rig; Measurements: Yield, SNR, PCA, Waveform Analysis, Histology;
Animals: 20 rats
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Principal Investigator: Harris, John G.
Stage 2 Goal: Assess amplifier performance Setup: TDT electrodes→Omnetics Connector→TDT
Headstages→UF Amplifier→TDT A/D Measurements: SNR, PCA, Waveform Analysis Animals: 10 rats
Stage 3 Goal: Assess wireless transmission Setup: Signal Generator→UF Transmitter→Scalp→Receiver in
cage Measurements: Impedance, Absorption, Reliability, Tissue reactivity Animals: 5 rats
Year 2, Stage 4 Goal: Test ribbon cable; Setup: MEMS electrodes→Ribbon Cable→TDT
Headstages/Recording Rig; Measurements: SNR, PCA clusters, Waveform Analysis; Animals: 5 rats
Stage 5 Goal: Assess amplifier pulsed output Setup: TDT electrodes→Omnetics Connector→TDT
Headstages→UF Amplifier→Pulse Output→TDT digital input (for pulses) Measurements: Reconstruction
quality, SNR, PCA clusters, Waveform Analysis Animals: 5 rats
Stage 6 Goal: Assess battery charging Setup: Implanted battery charging circuit→Animal in Induction
Box→Power Delivery Coil Measurements: Animal distress (HR, Temp, etc), Absorption, Reliability, Time of
charge, Tissue reactivity Animals: 10 rats
Year 3, Stage 7 Goal: Test electrode/amplifier integration Setup: MEMS electrodes→Ribbon Cable→ UF
Amplifier→TDT A/D Measurements: SNR, PCA clusters, Waveform Analysis Animals: 5 rats
Stage 8 Goal: Test amplifier/wireless integration Setup: TDT electrodes→Omnetics Connector→TDT
Headstages→UF Amplifier→UF Pulsed Amplifier→Wireless (external) Measurements: SNR, PCA, Waveform
Analysis Animals: 5 rats
Year 4, Stage 9 Goal: Test electrode/amplifier/wireless integration (8 channels) Setup: MEMS
electrodes→Ribbon Cable→ UF Pulsed Amplifier→Wireless (all external) Measurements: SNR, PCA clusters,
Waveform Analysis, Wireless reliability Animals: 10 rats
Year 5, Stage 10 Goal: Test electrode/amplifier/wireless integration (16 channels fully implantable) Setup:
MEMS electrodes→Ribbon Cable→ UF Pulsed Amplifier→Wireless (all implanted) Measurements: Animal
distress, Tissue reactivity, SNR, PCA clusters, Waveform Analysis, Wireless reliability, Histology Animals: 5
rats
57