Download AN ALTERNATIVE CONFIGURATION FOR DIGITALLY CONTROLLED PARALLEL CONNECTED DC–DC POWER CONVERTERS

AN ALTERNATIVE CONFIGURATION FOR DIGITALLY CONTROLLED PARALLEL
CONNECTED DC–DC POWER CONVERTERS
Siew-Chong Tan, Y.M. Lai, and Kevin Y.C. Wong
Department of Electronic & Information Engineering
Hong Kong Polytechnic University, Hung Hom, Hong Kong
[email protected]
ABSTRACT
This paper proposes an alternate configuration for digitally controlled parallel connected DC–DC power converters. Unlike conventional scheme which uses only one digital controller to control all of the n parallel connected
power converters, the proposed scheme employs n digital controllers for n paralleled power converters. This arrangement prevents single controller breakdown from faulting the whole converter system, and therefore the reliability of the entire system is significantly improved. Furthermore, the configuration also fixates the computation resources allocated to each converter, regardless of the number of converter units employed. Experimental results suggested that the digitally controlled power converters function sufficiently in regulating the current distribution level
under this configuration.
Keywords: Power converters, parallel connected, digital
control, active current sharing.
1. INTRODUCTION
With the advent of modern digital signal processors (DSP),
the design of control for power electronics by digital technology has significantly changed. Older types of digital
controllers cannot replace conventional analog counterparts
because of the difficulty of programming and debugging in
low level languages; slow processing speed; and high cost,
is no longer valid. The advances of computer technology
which generates the production of ample types of low cost
and high speed DSP that can be programmed in various high
level programming environments (like Visual C++, Code
Composer etc.), have provided us the window to reconsider
the options of using digital controller in power electronics.
One such consideration is in the control of DC–DC power
converters.
Literature review showed that earlier works on digitally
controlled DC–DC power converter [1]–[3] were targeted
at high-end applications mainly for satellite or space systems. However, this is anachronistic. Today, there are many
digital controlled standalone power supplies commercially
available. This is attributed to their advantages of being
more flexible, noise robust, and reliable than analog controllers. In comparison, the advantages of using digital controllers on parallel connected converters system over single
standalone converter units are more obvious:
1) Provision for interleaving: digital controller can implement interleaving in paralleled converters more easily
than analog controller [3];
2) Allow easy implementation of different current programming schemes, control structures, and complicated control laws, through software codings and revisions.
However, contradictorily, little attention has been given
to the research or development of digitally controlled parallel connected DC–DC power converters. In fact, the authors have found only few works [3], [4], reporting in their
attempts to run digitally controlled DC–DC power converters in parallel. Even so, the controller used is a centralized
digital controller which is externally connected to control
concurrently all converters in parallel, as shown in Fig. 1.
Although economical (only one controller is used for all of
the n paralleled converters), this configuration has low reliability: since the failure of the controller may easily lead to
the failure the entire converter system. In addition, with n
paralleled converters sharing the limited computational resources of a single digital controller, the performance of the
system will deteriorate as n gets larger. This deterioration
is even more obvious for the digital controllers that are running computationally exhaustive control programs.
Hence, in this paper, we propose an alternative configuration for digitally controlled parallel connected converters. Following the philosophy of distributed computing, we
use n sets of DSP to control n power converters in parallel. This forms a decentralized system, whereby each power
converters is controlled by an individual DSP, as illustrated
in Fig. 2. By obtaining information from peer converters
through the control bus, each controller works in solo to
Control
signals
External
Digital
Controller
Feedback
signals
Power
Converter #1
V DC
Power
Converter #2
LOAD
Power
Converter #n
Figure 1: Parallel-connected power converters with centralized external digital controller.
Power
Converter #1
with DSP
DSP
Control bus
V DC
Power
Converter #2
with DSP
DSP
droops schemes for their superiority in achieving near uniform current distribution [6], [7]. Hence our work and discussion will be based on the active current sharing schemes.
2.1. Control Structures
There are two types of controller employed in active current
sharing schemes: internal controller and external controller.
External controller configuration was previously shown in
Fig. 1, with the exception that in conventional schemes,
analog controller is employed instead. For internal controller, there are two basic control structures, namely innerloop regulation and outer-loop regulation [5]. These structures varies in the way their current sharing loops are arranged. Since each has its merits and limitations, the choice
of the control structure is therefore dependent upon the required applications.
LOAD
2.2. Current-programming Schemes
Power
Converter #n
with DSP
DSP
regulate its own power output, ensuring even current distribution among different converters. This is analogous to conventional paralleled converters with the distributed analog
controllers setup [5]. The main advantages of this configuration over the external controller configuration in Fig. 1,
are that computation power and resources allocated to control each converter is maintained regardless of the number of
converters in parallel, and that the reliability of the system
is preserved since no single controller/converter failure can
bring down the entire system. The tradeoff of this arrangement is nevertheless the higher cost of the implementation,
constituted by the n sets of DSP.
There are three main types of current-programming
schemes: Average current sharing (ACS), Dedicated Master/Slave current sharing (DMSCS), and Automatic Master/Slave current sharing (AMSCS) control schemes. ACS
control scheme is the method of current sharing whereby
the reference current sharing signal, in which each converter tracks to achieve uniform current distribution, is the
weighted average of all output converter current signals.
For DMSCS scheme, the output current of a specific converter module is chosen as the reference signal. For AMSCS scheme, the highest (or lowest) output current signal
of the converters at any particular time, is automatically selected as the reference current signal. Hence, like AVCS,
both DMSCS and AMSCS control schemes perform their
current sharing control by having all their individual converters tracking the reference signal. Similarly, the choice
of the schemes is dependent upon their individual merits and
limitations, and the required application.
2. BRIEF REVIEW OF CONVENTIONAL ANALOG
PARALLELING SCHEMES
3. PROPOSED DIGITALLY CONTROLLED
PARALLEL-CONNECTED POWER CONVERTERS
Paralleling of power converters inherits the problem of uneven current distribution, which results in higher thermal
stress on specific converters, thereby reducing the system’s
reliability, and also resulting in an overall under-utilized
system. Numerous control schemes aiming to solve this
problem had been proposed. According to [5], they can
be classified into two categories: the droops schemes [6],
and the active current sharing schemes [7]. Among these,
the active current sharing control schemes, which individually comprises a combination of a specific control structure
and a current-programming scheme, are preferred over the
A two cells parallel connected buck converters using the
TMS320LF2407A DSP chips as the controllers, under the
outer-loop regulation control structure was constructed. The
system was tested and analyzed using the ACS scheme.
Figure 2: Parallel-connected power converters with distributed digital controllers in each power converter.
3.1. Experimental Setup
Fig. 3 shows the schematic diagram of a single unit of
the converter system. The complete experimental setup is
shown in Fig. 4. The specifications of the buck converters used in this prototype are shown in Table 1. The total
external loading for the paralleled converters, RLOAD , is
between 2.5 Ω to 20 Ω.
10k
10k
MUR460
22
10k
500 H
+VO of other
converters
12k
VIN
3.3nF
30V
MUR460
k
1N4001
+
1:
1
470 F
+
L
O
A
D
VO
1.37k
22
GND
DSP - TMS320LF2407A
Microprocessor
+
IO1
0.27
12 H
1N965B
220 F
1N4728A
10k
12 H
IRF620
220 F
137
+
-
3.3nF
-VO of other
converters
VO
Analog
to Digital
Converter
i
L1 (SENSE)
i
L2 (SENSE)
i
Ln (SENSE)
1N4001
TLP250
Gate Driver
PWM
Memory
Figure 3: Schematic diagram of one buck converter unit.
3.2. Active Current Sharing Scheme
Fig. 5 shows the control mechanism of the active sharing
control scheme employed in the experiment. This control
mechanism has an average current sharing control component to perform current distribution control, and an innerloop PI average current mode control component to perform
the voltage regulation of the individual converter. The control equation can be expressed as
¶
·
µ
¸
ki1
Vcn = (Iref − Ion + Vref − βVon ) kp1 +
− ILn
(1)
s
¶
µ
ki2
,
× kp2 +
s
L2
where Iref = IL1 +I
and Ion = LPF (ILn ). Here, ILn
2
is the measured inductor current; Ion is the low frequency
component of ILn ; Vref is the reference voltage; and βVon
is the measured output voltage; kp1 and kp2 are the proportional gain constants; ki1 and ki2 are the integral gain constants; and n = 1 or 2 is the converter unit number. Hence,
by computing for the control signal Vcn and then performing the comparator operation using the internal ramp signal
Vramp , a driving signal u to control the converter unit is generated.
3.3. Advantages over Analog Counterparts
1) Complex control idea which is sometimes difficult to
implement with analog hardware components is easily
implementable in software.
Figure 4: Proposed parallel connected converters.
2) Soft starting, slope compensation, interleaving, and
fault protection can also be easily implemented in software codes.
Table 1: Specifications of Buck Converter
3) Changing of control methodology for different field
applications requires only software revision, and does
not require hardware modification.
Description
Input voltage
Switching frequency
Load resistance
Output voltage
Reference voltage
Parameter
VIN
fS
RL
Vo
Vref
Nominal Value
30 V
100 kHz
5Ω
10 V
3.3 V
L1
1
2
ref
L2
LPF
o1
Vramp
PWM
VREF
Vo
u
VC
PI
PI
Figure 5: Function block of the control scheme.
4. EXPERIMENTAL RESULTS AND DISCUSSIONS
Figure 6(a) shows the inductor current waveforms of the
parallel connected converters operating without the current sharing component in the control mechanism, during
startup. The electronic load is set at 2 A. It can be observed
that current distribution is uneven with one converter dominating and supporting the entire current load.
Fig. 6(b) show the inductor current waveforms of the parallel connected converters operating with the average current sharing component in the control mechanism, during
startup. The electronic load is set at 2 A. With the ACS
control scheme incorporated, the power converters reached
even current distribution at around 0.072 s.
undershoot during is about 1.05 V. Figure 7(b) shows the
responses at step load change from 2.8 A to 2 A. The setting
time is around 3.5 ms. The output voltage overshoot is about
1.00 V.
OutputCurrent
05
. AD
/V
I
Converter #1
5. CONCLUSION
Converter #2
(b) With ACS control
An alternative configuration for digitally controlled parallel connected DC–DC power converters is proposed in this
paper. The main advantages of this configuration are that
computation resources are not affected by the number of
converters in parallel, and that the reliability of the system
is significantly improved in comparison with the previous
configuration. To proof the feasibility of the configuration,
a two cells parallel connected buck converters using the
T M S320LF 2407A DSP chips, is constructed. The system
was then tested and analyzed with the ACS control scheme.
The experimental results showed that the DSPs functioned
sufficiently in regulating the parallel connected power converters under the proposed configuration.
Figure 6: Startup inductor currents.
6. REFERENCES
(a) No current sharing control
OutputVotlage
2V/DIV
Output Voltage
OutputCurrent
05
. AD
/V
I
Converter #1
Converter #2
OutputCurrent
0.5AD
/V
I
Converter #1
Converter #2
OutputVotlage
0.5VD
/V
I
Output Voltage
1.05 V
(a) 2 A to 2.8 A
OutputCurrent
05
. AD
/V
I
Converter #1
Converter #2
Output Voltage
OutputVoltage
0.5VD
/V
I
1V
(b) 2.8 A to 2 A
Figure 7: Dynamic response of paralleled converters (with
ACS control) during step load changes.
Figure 7(a) shows the responses of the output voltage and
inductor currents (at different ground levels) of individual
converter modules with respect to load change from 2 A
to 2.8 A. The time for the converters to settle to near-even
current distribution is around 3.5 ms. The output voltage
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