Download FDS6975 Dual P-Channel, Logic Level, PowerTrench MOSFET

February 1999
FDS6975
Dual P-Channel, Logic Level, PowerTrenchTM MOSFET
General Description
Features
These P-Channel Logic
Level MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance.
-6 A, -30 V. RDS(ON) = 0.032 Ω @ VGS = -10 V,
RDS(ON) = 0.045 Ω @ VGS = -4.5 V.
These devices are well suited for notebook computer
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
RDS(ON).
SuperSOTTM-6
SOT-23
SuperSOTTM-8
Low gate charge (14.5nC typical).
High performance trench technology for extremely low
High power and current handling capability.
SO-8
SOIC-16
SOT-223
D2
D2
D1
D1
S
FD 75
69
S2
SO-8
pin 1
S1
Absolute Maximum Ratings
G2
G1
5
4
6
3
7
2
8
1
TA = 25oC unless otherwise noted
Symbol
Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current - Continuous
- Pulsed
-20
PD
Power Dissipation for Dual Operation
2
Power Dissipation for Single Operation
(Note 1a)
Units
-30
V
±20
V
-6
A
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
TJ,TSTG
Ratings
Operating and Storage Temperature Range
W
0.9
-55 to 150
°C
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
40
°C/W
© 1999 Fairchild Semiconductor Corporation
FDS6975 Rev.C
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, I D = -250 µA
-30
∆BVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
ID = -250 µA, Referenced to 25 C
IDSS
Zero Gate Voltage Drain Current
VDS = -24 V, VGS = 0 V
o
V
mV/oC
-21
TJ = 55°C
-1
µA
-10
µA
IGSSF
Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
100
nA
IGSSR
Gate - Body Leakage, Reverse
VGS = -20 V, VDS = 0 V
-100
nA
ON CHARACTERISTICS
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
∆VGS(th)/∆TJ
Gate Threshold Voltage Temp. Coefficient
ID = 250 µA, Referenced to 25 oC
-1
RDS(ON)
Static Drain-Source On-Resistance
VGS = -10 V, I D = -6 A
VGS = -4.5 V, I D = -5 A
On-State Drain Current
VGS = -10 V, VDS = -5 V
gFS
Forward Transconductance
VDS = -10 V, I D = -6 A
-3
V
mV/oC
4
TJ =125°C
ID(ON)
-1.7
0.025
0.032
0.033
0.051
0.034
0.045
-20
Ω
A
16
S
1540
pF
400
pF
170
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
VDS = -15 V, VGS = 0 V,
f = 1.0 MHz
Crss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
(Note 2)
tD(on)
Turn - On Delay Time
VDS = -15 V, I D = -1 A
13
24
ns
tr
Turn - On Rise Time
VGEN = -10 V, RGEN = 6 Ω
22
35
ns
tD(off)
Turn - Off Delay Time
47
75
ns
tf
Turn - Off Fall Time
18
30
ns
Qg
Total Gate Charge
VDS = -10 V, I D = -6 A,
14.5
20
nC
Qgs
Gate-Source Charge
VGS = -5 V
Qgd
Gate-Drain Charge
4
nC
5
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -1.3 A
(Note 2)
-0.73
-1.3
A
-1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is
guaranteed by design while RθCA is determined by the user's board design.
a. 78OC/W on a 0.5 in2
pad of 2oz copper.
b. 125OC/W on a 0.02 in2
pad of 2oz copper.
c. 135OC/W on a 0.003 in2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDS6975 Rev.C
Typical Electrical Characteristics
2.5
VGS = -10V
-4.5V
-6.0V
R DS(ON), NORMALIZED
24
-3.5V
18
12
-3.0V
6
DRAIN-SOURCE ON-RESISTANCE
- I D, DRAIN-SOURCE CURRENT (A)
30
V GS = -3.5V
2
-4.0 V
-4.5 V
1.5
-5.5 V
-7.0 V
-10V
1
0.5
0
0
1
2
3
4
0
5
6
12
Figure 1. On-Region Characteristics.
R DS(ON), ON-RESISTANCE (OHM)
R DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1
0.8
-25
0
25
50
75
100
125
I D = -3A
0.08
0.06
0.04
TA = 125° C
0.02
25° C
0
150
2
4
TJ , JUNCTION TEMPERATURE (° C)
Figure 3. On-Resistance Variation
Temperature.
with
- I S , REVERSE DRAIN CURRENT (A)
- I D, DRAIN CURRENT (A)
25° C
24
8
10
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
TJ = -55° C
V DS = -5.0V
6
- VGS , GATE TO SOURCE VOLTAGE (V)
30
125° C
18
12
6
0
1.5
30
0.1
I D = -6A
V GS = -10V
1.2
0.6
-50
24
Figure 2. On-Resistance Variation with
Dain Current and Gate Voltage.
1.6
1.4
18
- I D , DRAIN CURRENT (A)
- VDS , DRAIN-SOURCE VOLTAGE (V)
30
VGS = 0V
10
TJ = 125° C
1
25° C
-55° C
0.1
0.01
0.001
2
2.5
3
3.5
- VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
4
4.5
0
0.3
0.6
0.9
1.2
1.5
- VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDS6975 Rev.C
Typical Electrical Characteristics (continued)
3000
ID = -6A
V DS = -5V
2000
8
-10V
CAPACITANCE (pF)
- V GS, GATE-SOURCE VOLTAGE (V)
10
-15V
6
4
C iss
1000
Coss
500
200
2
100
0.1
0
0
6
12
18
24
30
0.2
Figure 7. Gate Charge Characteristics.
10
T
1m
10m
3
10
0m
0u
VGS = -10V
SINGLE PULSE
RθJA =135°C/W
TA = 25°C
0.05
0.01
0.1
0.3
5
10
20
30
30
s
SINGLE PULSE
RθJA =135°C/W
TA = 25°C
25
s
s
10
s
DC
0.5
2
s
1s
20
15
10
5
1
2
5
10
30
0
0.01
50
0.1
- VDS , DRAIN-SOURCE VOLTAGE (V)
0.5
10
50 100
300
SINGLE PULSE TIME (SEC)
Figure 10. Single Pulse Maximum Power
Dissipation.
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
- I D , DRAIN CURRENT (A)
10
1
Figure 8. Capacitance Characteristics.
POWER (W)
I
LIM
N)
S(O
D
R
0.5
- VDS , DRAIN TO SOURCE VOLTAGE (V)
Q g , GATE CHARGE (nC)
30
Crss
f = 1 MHz
VGS = 0 V
1
0.5
0.2
0.1
0.05
0.02
0.01
D = 0.5
0.2
R θJA (t) = r(t) * R θJA
R θJA = 135°C/W
0.1
0.05
0.02
P(pk)
0.01
t1
Single Pulse
0.005
0.002
0.001
0.0001
t2
TJ - TA = P * R θJA(t)
Duty Cycle, D = t1 /t2
0.001
0.01
0.1
1
10
100
300
t1 , TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6975 Rev.C
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.