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2008 IEEE Nuclear Science Symposium Conference Record
M08-7
Pulse Width Modulation: a Novel Readout Scheme
for High Energy Photon Detection
Peter D. Olcott, Student Member, IEEE, and Craig S. Levin, Member, IEEE
Abstract-In standard PET scintillation detection, the energy,
timing, and location of the incoming photon are recovered using
analog signal processing techniques. The energy and location
information are processed using an analog-to-digital (ADC)
converter that samples an analog value that is proportional to
the integral of the charge created by the scintillation event. We
propose to change the paradigm and modulate the width (rather
than amplitude) of a digital pulse to be proportional to the
integral of the charge created. The analog value of the outgoing
digital pulses is recovered by using a time-to-digital converter
(TDC) in the back-end electronics, without the need for an ADC.
Note that in this new scenario the same TDC used to record the
time of the event is used to recover the amplitude. The main
performance parameter that must be optimized is the dynamic
range versus the dead-time of the front-end detector. The goal is
an 8-bit dynamic range for this pulse-width modulation (PWM)
scheme, which is adequate for high resolution PET systems
based on semiconductor detectors such as avalanche photodiodes
(APD) or cadmium zinc telluride (CZT). A novel circuit has been
designed, fabricated, and tested for the proposed PWM readout
scheme. This circuit is different than previously developed time
over threshold pulse width modulation circuits used in high
energy physics. PWM techniques simplify the routing to the back
end electronics without degrading the performance of the system.
A readout architecture based on PWM processes digital rather
than analog pulses, which can be easily multiplexed, enabling
one to achieve very high channel density required for ultra-high
resolution, 3-D positioning PET detector systems.
•
ANALOG BUS
•
FRONT-END ASIC
•
DIGITAL BUS
•
FPGA LOGIC
(a) Light multiplexing is used to reduce the number of readout channels in a
standard PET block detector readout. The most common architecture for the
electronic readout is a low channel count (4-channel) ASIC, and four ADCs
read each analog channel.
•
ANALOG BUS
•
FRONT-END ASIC
•
DIGITAL BUS
•
FPGA LOGIC
(b) A multi-channel readout ASIC (32 or 64 channels) combined with triggering, an analog memory, and a single ADC reduce the number of channels to a
reasonable level, but suffers from a high density analog bus.
Index Terms-PET, Semiconductor detectors, PWM, Pulse
width modulation, Time over threshold, Wilkinson ADC
I. INTRODUCTION
I
N standard high energy photon (e.g. gamma ray or annihilation photon) detectors, information from individual interactions are recorded, such as the time of the event, the energy
of the event, and the location of the event. These parameters
are determined through certain processing algorithms applied
to the analog signals that the detector generates. In evaluating
the best architecture to implement very high channel count
PET data acquisition systems, pulse width modulation (PWM)
has significant advantages over previous generations of readout
architectures (see Fig. 1). PWM architectures eliminate ADCs
and dense analog buses. We are studying a PWM scheme
•
ANALOG BUS
•
FRONT-END ASIC
•
FPGA LOGIC
~ DIGITAL BUS
(c) A high channel count digital architecture that consists of a low channel
count front-end ASIC pulse width modulator and a high density digital bus.
No ADCs are needed to digitize amplitude information.
Fig. 1: Very high resolution PET systems [1], [2] require
new data acquisition architectures to accommodate the large
increase in the number of readout channels. The current
acquisition systems (a) scale poorly in the number of ADCs
required as the channel count increases. High analog channel
count ASICs (b) have problems with dense analog busses. A
new architecture (c) using pulse width modulation (PWM)
eliminates the ADC and enables the move to purely digital
high density back ends.
Manuscript received November 14,2008. This work is supported in part by
NIH research grants NIH ROI CA119056, NIH R33 EB003283, and NIH ROI
CAI20474), and Society of Nuclear Medicine Molecular Imaging Predoctoral
Fellowship.
P. D. Olcott is a graduate student in the Bio-Engineering Department
at Stanford University, 300 Pasteur Drive, Always Building Room Mool,
Stanford, CA 94305, email: ([email protected])
Dr. Craig Levin is with the Department of Radiology and Molecular.
.
.
Imaging Program, Stanford University, 300 Pasteur Drive, Always Building (see FIg. 2) that encodes the tIme, energy, and locatIon of
R§~~~2U~mf~r087$'2~tio~~oi88~·edu).
453Bach high energy photon interaction in a detector using the
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High Energy
Photon
Detector Charge
Charge
Sensitive
Preamplifier Voltage
Peak
Detector
Start
Dela
Voltage
Pulse
Width
Latch
Timing
Discriminator
SET
Start
Timing
Input Signal
Amplitude
Delay
Circuit
Integrated
Charge Signal
Start
Constant
Delay
Circuit
Rising
Edge
Peak Amplitude
Sense Dependent
1~1~1
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I I
II
Fig. 2: Pulse width modulation circuit converts the amplified and filtered electronic charge signal from the detector into .a
digital signal. The timing is encoded as the first rising edge, and each edge transition encodes a unique analog value. In thIS
current implementation, one energy and one time value is encoded into a single digital signal.
different arrival times of various edges of a digital signal,
rather than in the amplitude of an analog signal. This PWM
scheme marries the fast CFD timing needed for PET and the
time counter principles behind the Wilkinson ADC conversion
technique for encoding amplitude. Because it is relatively
simple to implement a very high degree of multiplexing using
digital pulses, the proposed PWM readout architecture can
potentially readout more channels than a high density analog
readout architecture without using ADCs. With the advent of
very high channel count FPGAs synthesized into very high
performance TDCs [3], [4], the diginal back-end readout of
PWM architectures, even with thousands of readout channels,
can be easily realized using off the shelf components and
simple high density digital buses.
A. Time over Threshold
II. PULSE WIDTH MODULATION CIRCUIT
In this work, we tried to improve two aspects of these
previous implementations of TOT for PET (see Fig. 2). In
the first modification, a CFD encodes the arrival time and
reduces time walk. Secondly, a peak detector captures the
maximum signal from a Gaussian shaped signal and generates
a ramp function that linearly decays to zero. By splitting the
signal into two paths, the SNR of coincidence timing can be
optimized at the same time as the SNR of the energy signal.
One of the TOT ASICs developed in the past [11] either uses
little or no shaping to attain the best timing performance, but
this severely degraded the SNR of the energy channel. The
second TOT ASIC [12] uses Gaussian shaping with good SNR
for energy performance, but this slow shaping significantly
degraded timing performance.
A. Pulse width modulation and CFD timing
In standard PET data acquisition, timing is performed by a
PWM circuits utilizing time-over-threshold (TOT) were constant fraction discriminator (CFD) to reduce the amplitude
some of the first methods to digitize amplitude information dependent time walk. In the proposed PWM circuit design,
of nuclear decay and drift chambers [5], [6]. By setting a the scintillation pulse is driven into a CFD that sets a latch
threshold voltage above zero, an amplitude dependent pulse started at the rising edge. The scintillation signal may have
width can be generated from a Gaussian, or other CR-RC type some small amount of fast shaping to optimize the timing
shaped pulse. The noise of time-over-threshold depends on the resolution. In terms of time pickoff, the proposed design is
shaping circuits used and strongly depends on the inherit non- identical to and will have the same performance as standard
linearity of the width versus amplitude dependence. [7] Since PET electronics. Thus, this paper will only focus on studying
the decay of a Gaussian-shaped pulse falls off exponentially the proposed PWM scheme energy resolution performance.
with the time 2 , it does not provide the good delay linearity
needed for a robust PWM scheme. The data acquisition architectures of TOT are used in very high channel count physics B. Peak detection and linear ramp
experiments using silicon vertex trackers and calorimeters[8],
The pulse width modulation circuit can be seen as an
[9], [10]. New high resolution PET systems have similar high ADC operating on the energy portion of the scintillation
channel count needs as these high energy physics experiments. pulse. The scintillation signal is first shaped by a Gaussian
Recently, two groups have developed TOT ASICs for PET shaper set with a time constant to maximize SNR.. B.eca~se
applications [11], [12], but their choice of pulse shaping leads the Gaussian shaper is a linear transform of the SCIntIllatIon
to deficiencies, as explained in the next section.
453~ignal, the time between the start of the pulse and the peak
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~-~-------------------------_.
~------2--------:.iI:lI--1
(j~;MP
---(JPWM
.
Fig. 4: An input scintillation signal (black) enters a peak-detector with a linear ramp discharge (green). The blue dotted line
represents the maximum of the signal and is proportional to maximum value of a Gaussian shaped signal. The red dotted line
represents the threshold for firing the trigger.
R'3
~----......--vvv------1
50
UI
PI
• )
y
~
50
C2
Cl
D2
lOpF
Rl
loopF lOOk
R4
lOOk
associated electronics to fire a sample-and-hold precisely at
the peak of the signal. The peak detector has a capacitor to
store the value. With a simple resistor, an approximately linear
discharge current can be generated that decays based on a RC
product. The peak detector will begin to decay as soon as
the output of the Gaussian shaper falls below the value of
the storage capacitor. On the other hand, a sample-and-hold
circuit would not have this limitation and could begin decaying
immedately after sampling the value. Therefore, for an ASIC
implementation, a sample-and-hold circuit would be preferred
over a peak detector because the ramp could decay faster than
the falling edge of the Gaussian shaper, which would improve
count rate performance.
c.
Fig. 3: Key to the PWM circuitry is a high speed analog
peak detector with RC delay circuit. The high speed Shockley
diodes D1 and D2 are matched. An offset voltage of the Shockley diodes is required due to the forward drop in the feedback
of the opamp. The capacitor C1 holds the peak voltage, and
when the input drops below the peak, the capacitor discharges
with a time constant of Rl *Cl. The terminal of Rl is tied to
VEE to improve linearity. The resistors and capacitors can be
changed to provide better dynamic range and less quantization
noise with a corresponding tradeoff in pile-up at high event
rates.
High speed comparator
The output of the PWM with a linear ramp discharge is fed
into a high speed comparactor with an adjustable threshold.
The output of the comparator fires the reset of the latch. The
final digital signal has the rising edge encoding the arrival
time of the scintillation pulse and the falling edge encoding
the width of the pulse. Other information can be tacked onto
the end of the pulse such as channel id [12], but these can
come with a large penalty to the maximum count rate.
III. NOISE ANALYSIS
The PWM circuit can be analyzed to understand its impact
on energy resolution for a scintillation detector. Other figures
of merit, including spatial resolution, can be easily derived
from this framework. First, the variance of the PWM in time
must be derived:
of the Gaussian shaper will be constant. This is exploited
in current PET detector readout electronics designs by firing
a sample and hold to sample at this peak. To capture the
peak of the Gaussian shaper, we implemented a very fast
peak detector with a linear ramp discharge (see Fig. 3). For
discrete implementations, a peak detector is simpler than th~532
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(1)
TABLE I: Definitions
av/at
a~i
a~t
Slope of discharge
Variance of peak input voltage signal
Variance of comparator voltage threshold
O"~CAP
Variance of voltage on capacitor
a&PD
Variance of CFD start timing
a'bOMP
Variance of Comparator stop timing
a~WM
Variance of pulse width modulation timing
a}DC
Variance of quantization error of time to digital converter
max(~)
VEE
RC
Maximum voltage of input signal
Negative Supply
Resistor and capacitor used to select slope
The slope of the discharge is related to the value of the resistor
Rl and capacitor Cl (see Fig. 3), and the negative supply
voltage. The discharge is made more linear by connecting the
terminal of the resistor to VEE. The slope is:
8V/8t ~
~
Vi - VEE
RC
VEE
- - because Vi
RC
«
VEE
(2)
The variance of the PWM can be converted into energy
resolution by optimizing the voltage headroom of the circuits
(max(Vi) ~ VEE/2, and max(Vi) ~ scaled so that it
accommodates the 5llkeV photopeak pulse height).
(J"PWM
max(Vi)/8V/8t
(3)
2
2
(J"CFD
2
+ 2(J"TDC
2
+ (J"COMP
+
RC
(J"2
VCAP
+ (J"2 + (J"2 t
Vi
V
max(Vi)
There is a clear tradeoff in choosing the RC constant. The
longer the RC constant, the better the energy resolution (ie
better SNR), but this will come with a penalty in deadtime. The dead-time of this PWM is different from ADC
based converters. The dead-time of this PWM circuit is the
same as that for a Wilkinson ADC, because the time to
convert the amplitude is linearly related to the amplitude. For
Wilkinson ADC or PWM circuits [14], the non-Poisson nature
of the dead-time has been derived. The voltage noise terms
of equation (3) should be made small relative to the input
amplitude Vi. The noise Vca ; is simply the k;{ noise of the
storage capacitor. Usually, the noise of the front end detector
is much larger than the noise of these simple elements.
IV.
MATERIALS AND METHODS
A discrete PWM test board (Figure 5) was fabricated and
evaluated for energy resolution performance versus a standard
peak-sampled ADC (see Fig 5). The PWM circuit comprises
a peak-detector with a linear ramp discharge (see Fig. 3)
and a high speed LTl171 comparator. The R was set at 10k
and the C at 100pF giving a slope of 50 ::s. Linearity of
the test board was tested by driving a pulser signal into the
input preamplifier and measuring the output voltage after
Fig. 5: We have developed a discrete pulse width modulation
test board that accepts signals from scintillation detectors.
Front-end programmable trans-impedance amplifiers (inside
light blue box) convert high speed signals for driving an
external CFD. Peak detector circuits (magenta box) produce
a linear ramp from a Gaussian shaped signal. A high speed
low noise comparator (LTll7l) (yellow box) compares the
peak-detector output to a programmable threshold.
TAC. For our tests the TAC followed by an ADC will mimic
the TDC that is intended to be used in this PWM scheme
(see Figure 2). After pulser linearity tests, a 10 !-Lei 22 N a
source irradiated a 3 mm x 3 mm x 20 mm LYSO crystal
connected to a single 3 mm x 3 mm solid state photomultipler
(SSPM) pixel of the SENSL 4x4 SPMArray 3035G16. The test
board contained a fast trans-impedance amplifier (500 Ohms)
to amplify and invert the input signal for the input to an Ortec
CFD-935. A CFD is key to the fast timing for the proposed
PWM scheme (see Fig. 2). The output of the CFD was the
start for the Ortec 567 TAC/SAC. For the energy channel, the
signal was shaped by a Cremat-200 lOOns Gaussian shaping
amplifier. The shaped signal was input to both the discrete
PWM circuit and to a Ortec 427A delay amplifier. The latter
channel enables comparison to the standard analog modulated
processing chain. After level shifting to negative NIM voltage
standard, the PWM signal was sent to the stop of the Ortec
567 TAC/SCA. The output of the delay amplifier and the
TAC went to a NI-lll0 peak-sampling ADC. The Ortec 567
TAC/SCA is being used to convert the pulse width back into
an amplitude for digitization to mimic the function of the TDC
and generate the PWM equivalent of a pulse height spectrum.
The 22 N a energy spectrum was acquired for both the standard
analog-modulation, peak-sensing ADC chain and the PWM
processing chain.
V.
RESULTS
The linearity of the PWM cir~uit (see Fig. 6) ~ts very
closely to a seco.nd order polynomIal ?ve~ the dynamIC r~nge
of the PWM. ThIS second orde: be~avlor IS solely determl~ed
Y the discharge of the capacItor In the peak-detector uSIng
ls3S
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Pulser Linearity of PWM circuit
50
100
Input Pulse Amplitude (mV)
150
200
Fig. 6: The PWM suffers from some non-linearity because
the RC discharge circuit is not a pure current source. Howver,
the linearity is significantly improved over the previous TOT
designs [9,10] and is sufficient for almost all scintillation
applications for PET.
Te~,
M Pos: 216.Ons
DISPLAY
•
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•
Format
11
"
CH1 1.00V
CH2 '1.00\1
M100M ""
IJse rnultff)urpo$t, knob ro adjust (:ontrasf
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a resistor with a large voltage offset (see Fig. 3). A scope
capture of the PWM test board output pulses (see Fig. 7)
shows the working operation of the circuits for SSPM-based
scintillation detection using 22 N a source irradiation. The
dead-time for this circuit is approximately 600 ns for a 1.27
MeV photon pulse. For a 511 keV photon pulse, the dead-time
would approximately 400 ns. The dead-time for just the 100
ns Gaussian shaper is approximately 300 ns or three times
the shaping constant. Therefore, this discrete PWM circuit
implementation does not have a significant dead-time penalty.
A wide dynamic range (for PET) scintillation signal (0-1.27
MeV) was digitized for the PWM circuit versus the standard
analog-modulated digitization (see Fig. 8). The correlation
between the ADC and PWM is 1.0 with a 1.2% standard
deviation. This PWM circuit is not fully able to linearize
the low amplitude pulses from the lOOns Gaussian shaper
(see Fig. 7 and Fig. 8). An RC constant with a larger time
constant relative to the shaper constant can be used to remove
this small amplitude non-linearity, but this will increase deadtime. However, we do not expect this small low-amplitude
non-linearity to be a significant detriment to the method.
VI. DISCUSSION
The circuit evaluated in this paper is a very simple discrete
prototype that was used as a proof of concept. There are many
better, but more complicated, linear ramp circuits that could
easily be implemented in ASICs or more discrete components
could have been used to achieve much better linearity. The
peak-detector with resistive discharge could easily be replaced
by a sample-and-hold with current source discharge architecture in an ASIC design. This would remove the non-linearity
for small signals that the peak-detection method may suffer
from with small RC constants used to improve dead-time
performance. Even in its current form, our results (Figs. 6 and
8) suggest this discrete circuit would perform in well in PET
scintillation applications. This circuit can be used to capture
the signals from a light sharing block detector[reference] or 3D positioning sensitive detectors [references to our workLevin
2008 and Pratx 2008] because of the improved linearity
and optimal SNR as compared to previous TOT designs for
PET [9,10]. The timing CFD of the front end may also be
replaced with a fast leading edge discriminator. The amplitude
information may be used to remove the time walk. However,
the same comparator that is used for timing should not also be
used for the energy signal, otherwise a poor tradeoff between
timing and energy SNR will result.
VII. CONCLUSION
A proof of concept, discrete pulse width modulation circuit
for PET has been analyzed and built. This PWM circuit
provided a simple method to study the trade off of dynamic
range and linearity versus dead-time by adjusting the slope of
a ramp reset circuit. We achieved a dynamic range, linearity
and SNR with a very simple circuit that can meet performance
parameters needed in PET data acquisition designs. The proposed scheme preserves the low jitter of CFD based triggering
while deriving a pulse width from an optimally shaped signal
453lchieving a high SNR energy signal.
Fig. 7: Scope capture of PWM evaluation circuit with the input
to the CFD (blue), output of the PWM (magenta) and the logic
output of the PWM that represents the integrated charge for
each analog pulse (yellow). It takes approximately 600 ns to
digitize the max signal amplitude for the 1.27 MeV line of
the 22 N a source using a resistor of 10k and a capacitor of
100pF.
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Correlation between PWM and ADC
.. 't'
• ~1'
•• i"" •
2.5
....
~:~
.
~.
2
0.5
0.5
1.5
ADC
2.5
2
(a) Histogram of the ADC sampled pulse height of the standard analogmodulated processing chain (x-axis) versus the PWM processing chain y-axis
for 22 N a irradiation of a LYSO-SSPM scintillation detector
Na-22 Energy Spectrum
3000
-ADC
-PWM
2500
2000
II)
E
::J
0
U
1500
1000
500
0
a
0.5
1
1.5
Pulse height (V)
2.5
(b) Energy spectra of the ADC sampled pulse height of the standard analogmodulated processing chain versus the PWM processing chain for 22 N a
irradiation of a LYSO-SSPM scintillation detector
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Fig. 8: (a) The PWM energy 22 N a energy spectra results
correlated very well with the analog-modulated scheme (b).
The energy resolution of the two conversions schemes is
identical at 19.3 + / - 0.4% FWHM at 511 keY. There is
some non-linearity for small amplitude signals from the PWM
circuit that can be seen in (a) and (b).
4535
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