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1750 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 10, OCTOBER 2003 A Low-Power Wide Dynamic Range Envelope Detector Serhii M. Zhak, Michael W. Baker, and Rahul Sarpeshkar, Member, IEEE Abstract—We report a 75-dB 2.8- W 100-Hz–10-kHz envelope detector in a 1.5- m 2.8-V CMOS technology. The envelope detector performs input dc insensitive voltage-to-current converting rectification followed by novel nanopower current-mode peak detection. The use of a subthreshold wide linear range transconductor allows greater than 1.7- pp input voltage swings. We show theoretically that the optimal performance of this circuit is technology independent for the given topology and may be improved only by spending more power due to thermal noise rectification limits. A novel circuit topology is used to perform 140-nW peak detection with controllable attack and release time constants. We demonstrate good agreement of experimentally measured results with theory. The envelope detector is useful in low-power bionic implants for the deaf, hearing aids, and speech-recognition front-ends. Index Terms—Bionic ear, cochlear implant, envelope detector, hearing aids, peak detector, rectifier, ultralow power. Fig. 1. Modified class-B mirror with active feedback and dead-zone reduction. I. INTRODUCTION E NVELOPE detection is required for gain control [1] and spectral energy estimation for a variety of audio applications such as implant processing, speech recognition, and hearing aids [2]–[5]. Portable systems impose a number of constraints on the design of envelope detectors. They are battery powered and required to run off a low voltage; this design is optimized for 2.8 V. The envelope detector must provide frequency-independent operation over most of the audio range, from 100 Hz to 10 kHz. It must be insensitive to the input dc voltage, providing a dc-offset-free current output. The envelope detector should have an adjustable attack time constant (often around 10 ms) and an adjustable release time constant (often around 100 ms). Most importantly, it must minimize power consumption while maximizing the dynamic range of the system. The organization of this brief is as follows. In Section II, we discuss the design of the voltage-to-current converting rectifier, which is the first half of the envelope detector. In Section III, we discuss the design of the current-mode peak detector, which is the second half of the envelope detector. In Section IV, we present experimental results from a chip. Finally, in Section V, we conclude by summarizing the key contributions of the brief. II. RECTIFIER DESIGN The basic current-converting rectifier topology examined - high-pass filter, where the current here is a subthreshold through the capacitor is split into a positive half and a negative half by an intervening class-B mirror. Fig. 1 shows the circuit. Manuscript received December 17, 2002; revised July 1, 2003. The authors are with the Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA 02139 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/JSSC.2003.817599 We can use one or both halves of the current in the rectifier output depending on whether we wish to perform half-wave or full-wave rectification, respectively. Circuit operation is , the voltage across based on the fact that provided the capacitor is given by the low-pass filter transfer function . Thus, the current through the . If the capacitor is given by is chosen to be sufficiently below the lowest frepole Hz, we have quency of interest independent of the input dc voltage or carrier frequency. In this is the negative implementation, the rectifier output current with half wave corresponding to ideally zero dc offset. As we have seen, however, there is . We will one very important condition, namely, show that both the minimum detectable signal and an observed current are determined residual dc offset component of the by this condition. We have described a different variation of this topology with significantly lower dynamic range in [6]. to be When designing the rectifier, we would like constant over a wide range of input voltages. We also want to avoid tiny input signals that are prone to noise and other effects. These conditions require using wide linear range transconductor (WLR OTA) techniques to implement the transconductor in Fig. 1. These techniques are described in detail in [7]. A. Rectifying Class-B Mirror Topology The structure shown in Fig. 1 is capable of sourcing and and mirroring it to the output sinking current from the input [6], [8]–[10]. If no current is applied to the input node, the input devices, Mn and Mp, are both turned off. The magnitude of the gate-to-source voltages for Mn and Mp must be sufficient to obtain a source or sink current equal to the input current, therefore, a voltage dead zone is present such that no 0018-9200/03$17.00 © 2003 IEEE IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 10, OCTOBER 2003 1751 current is mirrored until the gate-to-source voltage has changed significantly. The magnitude of this dead zone is a weak logarithmic function of the input current level, but, for simplicity, we shall assume that it is almost constant. It is about 2.2 in the MOSIS 1.5- m process and is comprised of the sum of the nMOS and pMOS diode drops. This dead zone presents a power–speed tradeoff, causing the rectification to fail if the amplitude is small enough. It can be shown that the minimum current amplitude is given by detectable (1) is the gate-to-source parasitic capacitance of Mn and where is due to the output WLR capacitance and node parMp, asitics, is the voltage gain of the feedback amplifier, and the peak to peak. dead-zone width is a constant in the We implement a geometric scaling ratio of output current mirror arms of the WLR OTA. Thus, the maxis the effective bias current of the WLR OTA, imum possible , and the dead-zone dynamic range limitation is given by (2) is possible by reducing the A further improvement in . Fig. 1 shows that this reduction can be dead-zone width accomplished by introducing a constant dc voltage shift between the gates of the Mn and Mp rectifying devices. This voltage shift decreases the required voltage swing on the gates of the Mn and Mp rectifying devices necessary to overcome the . dead zone. Effectively, the dead zone is reduced to However, from applying the translinear principle, it follows that this technique will result in an output offset current. We require this offset current to be no more than a few picoamperes, thus, setting a ceiling on . Nevertheless, this technique yields an . The value of improvement of a factor of 3, or 10 dB in can be adjusted to some degree by changing the bias current of the amplifier. B. Theoretical Analysis of Thermal Noise Rectification We now examine another limitation on the system dynamic range due to the noise of the WLR OTA. For our device sizes noise in our circuit is negligible in and currents, the effect of subthreshold operation [7]. However, the thermal noise current at the WLR OTA output is fed to the class-B mirror, rectified by it, and mirrored to the output, creating a residual output current floor that degrades the minimum detectable signal and dynamic range of the system. For simplicity, we shall assume that the create a low-pass filter with an infinitely steep dead-zone and slope at a still-to-be-determined cutoff frequency . With this current were assumption, the class-B mirror behaves as if the , where Gaussian with zero mean and variance is the effective number of noise sources in our WLR OTA [7]. It can be shown that the residual output current is given by [11] Fig. 2. Wide dynamic range current-mode peak detector with adjustable attack and release time constants. gets higher than the standard deviation of the thermal noise, little current is output by the rectifier. It can be shown from these considerations that [11] (4) is given by (2) and was initially designed and simuwhere for kHz. Equation (4) then lated to be dB pA, and the corresponding experimentally gives us pA, indicating that our approximeasured result is mations and assumptions are sound. The implication of (4) is that the larger we make to increase the minimum detectable signal limited by the dead-zone nonlinearity, the higher the rectified noise-current floor becomes, and the greater is the degradation in minimum detectable signal caused by this current floor. Thus, the maximum dynamic range is achieved if both effects yield the same limit, and equals (5) Equation (5) shows that the optimal dynamic range depends only on topological parameters like and , and is indepenand . dent of technological parameters like In our design, due to the power constraints, we could only afnA. According to (5), that gives us ford dB. In Section IV, we show experimentally that we can actually achieve this theoretical maximum. III. PEAK DETECTOR DESIGN Fig. 2 shows our novel current-mode peak detector topology with wide dynamic range nanopower operation. The attack and release time constants are adjustable. Note that the current through the M3 transistor is always equal to , provided that the parasitic capacitance of the node is small. Therefore, like in the current-mode low-pass filter topology described in [12], the source voltage of M2, , is proportional to a logarithm of the low-pass-filtered input current with a time constant given by (3) (6) To estimate the cutoff frequency , we note that once the frequency-dependent threshold presented by the dead zone in (1) mV, and is the subthreshold where slope coefficient. The M3 transistor, however, only acts like a 1752 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 10, OCTOBER 2003 Fig. 4. Experimental rectifier output current waveform. Fig. 3. Envelope detector die photo. simple shifter during attack: As increases during an attack voltage decreases. This decrease causes the drain phase, the current then quickly discurrent of M3 to decrease. The , decreasing . The decrease charges parasitic capacitance causes transistor M5 to open and to quickly decrease , in thus restoring M3’s drain current. Since M3 does behave like a shifter during attack, the attack time constant is given by (6). The feedback loop formed by M5 and M3 is similar to the one in the simple peak-detector topology described in [2]. To provide good phase margin, the current has to satisfy (7) . Unlike in the simple peak-detector where topology described in [2], the good phase-margin conditions do not affect the dynamic range of operation, because all currents decreases during in the M3–M5 feedback loop are fixed. As voltage goes up. This causes the drain current release, the voltage, which turns off of M3 to increase, increasing the only changes due to charging of by transistor M5. Now, such that the release time constant is given by Fig. 5. Experimental peak detector output current waveform; 1 kHz, and 10 kHz; T = 10 ms; T = 100 ms. f = 100 Hz, (8) IV. EXPERIMENTAL RESULTS A chip was fabricated on AMI’s 1.5- m CMOS process through MOSIS. Fig. 3 shows a photograph of the die. Fig. 4 shows experimental waveforms of the rectifier output Hz for a tone-burst input. The half-wave current at rectification is clearly evident. Fig. 5 shows experimental waveforms of the envelope-detector output current for three toneburst carrier frequencies of 300 Hz, 1 kHz, and 10 kHz with the same input signal amplitude. We can see that the attack time is approximately 10 ms, and the release time conconstant stant is approximately 100 ms. Both these time constants may be adjusted by altering and in Fig. 2. Fig. 6 shows experimentally measured envelope-detector characteristics at 100 Hz, 1 kHz, and 10 kHz for input signal Fig. 6. Experimentally measured f = 100 Hz, 1 kHz, and 10 kHz. envelope detector characteristics; amplitudes ranging over the entire 75 dB of operation. The plot V on the high end of the dynamic saturates at V range, and flattens out at approximately on the low end, revealing that the envelope detector provides proportional and linear information about the input signal IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 10, OCTOBER 2003 1753 with adjustable attack and release time constants. We confirmed theoretical predictions of the minimum detectable signal of the envelope detector due to dead-zone-limiting effects and thermal noise rectification effects experimentally. We also achieved the maximum possible dynamic range predicted from theory. The detector is useful in ultralow-power bionic implants for the deaf, hearing aids, and speech-recognition front-ends where gain control and spectral energy computations require the use of envelope detection. REFERENCES Fig. 7. Experimental envelope detector characteristics for f various I , i.e., dead-zone widths. = 10 kHz and envelope over a dynamic range of 75 dB at all audio frequencies of interest. The saturation is caused by the WLR OTA moving out of its linear range, while the flattening is due to the thermal noise rectified output current floor that was discussed in Section II. Fig. 7 shows experimentally measured envelope-detector characteristics at 10 kHz for various , i.e., various dead-zone , the dead zone is wide, so both widths. At low values of the dead-zone-limited dynamic range and the rectified noise , we decrease the current floor are low. By increasing dead-zone width, improving the dead-zone-limited dynamic range, but also increasing the rectified noise current floor. At nA , the dead-zone minimum the optimal point detectable signal equals the rectified noise current floor, and we obtain 75 dB of dynamic range, in excellent agreement with the theory of Section II. V. CONCLUSION We have demonstrated a 75-dB 2.8- W envelope detector with frequency-independent operation over the audio range from 100 Hz to 10 kHz. The current-mode peak detector provided wide dynamic range and good phase-margin operation [1] W. A. Serdijn, A. C. van der Woerd, J. Davidse, and H. M. van Roemund, “A low-voltage low-power fully-integratable front-end for hearing instruments,” IEEE Trans. Circuits Syst. I, vol. 42, pp. 920–932, Nov. 1995. [2] R. Sarpeshkar, R. F. Lyon, and C. A. Mead, “A low-power wide-dynamic-range analog VLSI cochlea,” Analog Integrated Circuits Signal Processing, vol. 16, pp. 245–274, 1998. [3] R. J. W. Wang, R. Sarpeshkar, M. Jabri, and C. Mead, “A low-power analog front-end module for cochlear implants,” presented at the 16th World Congr. Otorhinolaryngology, Sydney, Australia, Mar. 1997. [4] W. Germanovix and C. Tourmazou, “Design of a micropower current-mode log-domain analog cochlear implant,” IEEE Trans. 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[10] T. Kurashina, S. Ogawa, and K. Watanabe, “A high-performance class-AB current conveyor,” in Proc. IEEE Int. Conf. Electronic Circuits and Systems, vol. 3, 1998, pp. 143–146. [11] S. Zhak, M. Baker, and R. Sarpeshkar, “A low-power wide dynamic range envelope detector,” Research Lab. Electron., Mass. Inst. Technol., Cambridge, RLE Tech. Rep. 664, 2003. [12] D. R. Frey, “Log-domain filtering: An approach to current-mode filtering,” Proc. Inst. Electr. Eng., pt. G, vol. 140, pp. 406–416, 1993.