Download LT5512 - 1kHz-3GHz High Signal Level Down-Converting Mixer.

LT5512
1kHz-3GHz High Signal Level
Active Mixer
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FEATURES
DESCRIPTIO
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The LT®5512 is an active double-balanced mixer IC, optimized for high linearity HF, VHF and UHF applications.
The IC includes an integrated LO buffer amplifier to drive
the mixer and an RF buffer amplifier for improved LO-RF
isolation. Internal bias circuits eliminate the need for
precision external resistors and allow the device to be
powered-down using the enable control (EN) pin.
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■
■
■
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■
Broadband RF, LO and IF Operation
High Input IP3: >20dBm from 30MHz to 900MHz
+17dBm at 1900MHz
Typical Conversion Gain: 1dB
SSB Noise Figure: 11dB at 900MHz
14dB at 1900MHz
Integrated LO Buffer: Insensitive to LO Drive Level
Single-Ended or Differential LO Drive
High LO-RF Isolation
Enable Function
4.5V to 5.25V Supply Voltage Range
4mm × 4mm QFN Package
The externally matched RF and IF ports allow the mixer
to be used at very low frequencies, below 1MHz or up to
3GHz. The differential LO input is designed for single-ended
or a differential input drive.
The LT5512 is a high-linearity alternative to passive diode
mixers. Unlike passive mixers, which have conversion
loss and require high LO drive levels, the LT5512 delivers conversion gain and requires significantly lower LO
drive levels.
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APPLICATIO S
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HF/VHF/UHF Mixer
Cellular/PCS/UMTS Infrastructure
High Linearity Mixer Applications
ISM Band Receivers
Wireless Medical Telemetry System (WMTS)
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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TYPICAL APPLICATIO
Conv Gain, IIP3, NF and
LO Leakage vs LO Power
High Signal-Level Downmixer for 600MHz Wireless Medical Telemetry System
6.8nH
+
19
LO–
LT5512
RF
+
8:1
+
IF
IFOUT
45MHz
50Ω
1.8pF
RFIN
608MHz
TO 614MHz
50Ω
6.8pF
6.8nH
6.8pF
47nH
EN
5V
RF –
BIAS
IF –
EN VCC2
VCC1
0.01µF
20
21
0.01µF
IIP3
TA = 25°C
RF = 610MHz 0
HIGH-SIDE LO
IF = 45MHz
17
15
–20
13
11 SSB NF
9
–40
LO-IF
7
5
LO LEAKAGE (dBm)
LO
100Ω
GC, SSB NF (dB), IIP3 (dBm)
0.01µF
LOIN
–5dBm TYP
–60
LO-RF
3
1
–11
1µF
GC
–80
–9
VCC
4.5V TO 5.25V
–5
–3
–7
LO POWER (dBm)
–1
1
5512 TA01a
5512 TA01
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5512fa
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LT5512
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PACKAGE/ORDER I FOR ATIO
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ABSOLUTE
AXI U RATI GS
(Note 1)
NC
LO –
NC
LO+
TOP VIEW
Supply Voltage (VCC1, VCC2, IF+, IF–)........................5.5V
Enable Voltage .................................–0.3V to VCC + 0.3V
LO+ to LO– Differential Voltage ..............................±1.5V
.................................................... (+6dBm equivalent)
+
RF to RF– Differential Voltage ...............................±0.7V
.................................................. (+11dBm equivalent)
Operating Temperature Range ................. –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
Junction Temperature (TJ) .................................... 125°C
16 15 14 13
12 GND
NC 1
RF + 2
RF –
11 IF+
17
10 IF –
3
NC 4
6
7
8
EN
VCC1
VCC2
NC
9
5
GND
UF PACKAGE
16-LEAD (4mm × 4mm) PLASTIC QFN
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD IS GROUND (PIN 17)
(MUST BE SOLDERED TO PCB)
ORDER PART NUMBER
PART MARKING
LT5512EUF
5512
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
DC ELECTRICAL CHARACTERISTICS
(Test Circuit Shown in Figure 2) VCC = 5V, EN = High,
TA = 25°C (Note 3), unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Enable (EN) Low = Off, High = On
Turn On Time
3
μs
Turn Off Time
13
μs
50
μA
Input Current
VENABLE = 5V
Enable = High (On)
3
V
Enable = Low (Off)
0.3
V
5.25
V
Power Supply Requirements (VCC)
Supply Voltage
4.5
Supply Current
Shutdown Current
56
EN = Low
74
mA
100
μA
MAX
UNITS
AC ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
RF Input Frequency Range
Requires Appropriate Matching
0.001 to 3000
MHz
LO Input Frequency Range
Requires Appropriate Matching
0.001 to 3000
MHz
IF Output Frequency Range
Requires Appropriate Matching
0.001 to 2000
MHz
LO Input Power
1kHz to 1700MHz (Resistive Match)
1200MHz to 3000MHz (Reactive Match)
2
MIN
–11
–18
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TYP
–5
–10
1
–2
dBm
dBm
5512fa
LT5512
AC ELECTRICAL CHARACTERISTICS
Downmixer Applications: (Test Circuits Shown in Figures 1 and 2)
VCC = 5V, EN = High, TA = 25°C, PRF = –10dBm (–10dBm/tone for two-tone IIP3 tests, Δf = 200kHz), High-Side LO at –5dBm for 45MHz,
140MHz and 450MHz tests, Low-Side LO at –10dBm for 900MHz, 1900MHz and 2450MHz tests, unless otherwise noted.
(Note 2, 3 and 4)
PARAMETER
CONDITIONS
Conversion Gain
RF = 45MHz, IF = 2MHz
RF = 140MHz, IF = 10MHz
RF = 450MHz, IF = 70MHz
RF = 900MHz, IF = 170MHz
RF = 1900MHz, IF = 170MHz
RF = 2450MHz, IF = 240MHz
MIN
Conversion Gain vs Temperature
TA = –40°C to 85°C, RF = 900MHz
Input 3rd Order Intercept
–1
TYP
1
2
1.1
0
1
2
MAX
UNITS
dB
dB
dB
dB
dB
dB
–0.011
dB/°C
RF = 45MHz, IF = 2MHz
RF = 140MHz, IF = 10MHz
RF = 450MHz, IF = 70MHz
RF = 900MHz, IF = 170MHz
RF = 1900MHz, IF = 170MHz
RF = 2450MHz, IF = 240MHz
20.4
20.7
21.3
21
17
13
dBm
dBm
dBm
dBm
dBm
dBm
Single-Sideband Noise Figure
RF = 140MHz, IF = 10MHz
RF = 450MHz, IF = 70MHz
RF = 900MHz, IF = 170MHz
RF = 1900MHz, IF = 170MHz
RF = 2450MHz, IF = 240MHz
10.3
10.3
11
14
13.4
dB
dB
dB
dB
dB
LO to RF Leakage
fLO = 250kHz to 700MHz (Figure 1)
fLO = 700MHz to 2500MHz (Figure 2)
≤–63
≤–50
dBm
dBm
LO to IF Leakage
fLO = 250kHz to 500MHz (Figure 1)
fLO = 500MHz to 1250MHz (Figure 1)
fLO = 700MHz to 1500MHz (Figure 2)
fLO = 1500MHz to 1950MHz (Figure 2)
fLO = 1950MHz to 2500MHz (Figure 2)
≤–35
≤–40
≤–45
≤–40
≤–32
dBm
dBm
dBm
dBm
dBm
RF to LO Isolation
fRF = 250kHz to 800MHz (Figure 1)
fRF = 700MHz to 1200MHz (Figure 2)
fRF = 1200MHz to 1700MHz (Figure 2)
fRF = 1700MHz to 2500MHz (Figure 2)
>61
>49
>46
>43
dB
dB
dB
dB
2RF-2LO Output Spurious Product
(fRF = fLO + fIF/2)
900MHz: fRF = 815MHz at –12dBm, fIF = 170MHz
1900MHz: fRF = 1815MHz at –12dBm, fIF = 170MHz
–66
–59
dBc
dBc
3RF-3LO Output Spurious Product
(fRF = fLO + fIF/3)
900MHz: fRF = 786.67MHz at –12dBm, fIF = 170MHz
1900MHz: fRF = 1786.67MHz at –12dBm, fIF = 170MHz
–83
–58
dBc
dBc
Input 1dB Compression
RF = 10MHz to 500MHz (Figure 1)
RF = 900MHz (Figure 2)
RF = 1900MHz (Figure 2)
10.5
10.1
6.2
dBm
dBm
dBm
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: 45MHz, 140MHz and 450MHz performance measured on the test
circuit shown in Figure 1. 900MHz, 1900MHz and 2450MHz performance
measured on the test circuit shown in Figure 2.
Note 3: Specifications over the –40°C to 85°C temperature range are
assured by design, characterization and correlation with statistical process
control.
Note 4: SSB Noise Figure measurements performed with a small-signal
noise source and bandpass filter on RF input and no other RF signal
applied.
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LT5512
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TYPICAL DC PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
(Test Circuit Shown Figure 2)
Shutdown Current vs Supply Voltage
60
100
59
SUPPLY CURRENT (mA)
SHUTDOWN CURRENT (µA)
TA = 85°C
58
57
TA = 25°C
56
55
54
TA = –40°C
53
52
TA = 85°C
10
TA = 25°C
1
TA = –40°C
51
50
4.75
5.25
5.0
SUPPLY VOLTAGE (V)
4.5
0.1
4.5
5.5
5.0
5.25
4.75
SUPPLY VOLTAGE (V)
5512 G01
5.5
5512 G02
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TYPICAL AC PERFOR A CE CHARACTERISTICS
HF/VHF/UHF Downmixer Application
VCC = 5V, EN = High, PRF = –10dBm (–10dBm/tone for 2-tone IIP3 tests, Δf = 200kHz), High-Side LO, PLO = –5dBm,
unless otherwise noted. Test Circuit Shown in Figure 1.
Conv Gain, IIP3 and NF
vs LO Power (140MHz App)
22
–10
20
–20
18
IIP3
16
LO-IF
14
12
–30
–40
–50
IF = 10MHz
10
–60
LO-RF
8
–70
–40°C –80
25°C
85°C –90
–100
6
4
GC
2
90
115
140
165
RF FREQUENCY (MHz)
12
10
SSB NF
8
6
4
20
–20
18
16
–30
14
–40
LO-IF
–50
LO-RF
–60
8
–70
6
4
2
–40°C –80
25°C –90
85°C
–100
GC
0
400
425
450
475
RF FREQUENCY (MHz)
–110
500
5512 G06
4
GC, SSB NF (dB), IIP3 (dBm)
22
–10
LO LEAKAGE (dBm)
GC, SSB NF (dB), IIP3 (dBm)
0
20
12
12
10
–40°C
25°C
85°C
8
6
2
GC
0
–9
4.5
1
–7
–5
–3
–1
LO INPUT POWER (dBm)
5.5
4.75
5
5.25
SUPPLY VOLTAGE (V)
5512 G05
Conv Gain, IIP3 and NF
vs LO Power (450MHz App)
IF = 70MHz
PLO = –5dBm
RF = 140MHz
IF = 10MHz
5512 G04
22
10
16
14
4
GC
0
–11
Conv Gain, IIP3 and LO Leakage
vs RF Frequency (450MHz App)
IIP3
IIP3
18
14
5512 G03
18
20
TA = 25°C
RF = 140MHz
IF = 10MHz
16
2
–110
190
0
22
IIP3
Conv Gain and IIP3
vs Supply Voltage (450MHz App)
22
IIP3
20
18
TA = 25°C
RF = 450MHz
IF = 70MHz
16
14
12
GC (dB), IIP3 (dBm)
18
Conv Gain and IIP3
vs Supply Voltage (140MHz App)
GC (dB), IIP3 (dBm)
0
20
GC, SSB NF (dB), IIP3 (dBm)
22
LO LEAKAGE (dBm)
GC, SSB NF (dB), IIP3 (dBm)
Conv Gain, IIP3 and LO Leakage
vs RF Frequency (140MHz App)
SSB NF
10
8
6
0
–11
PLO = –5dBm
RF = 450MHz
IF = 70MHz
14
12
10
–40°C
25°C
85°C
8
6
4
4
2
IIP3
16
GC
GC
2
0
–9
–7
–5
–3
–1
LO INPUT POWER (dBm)
1
4.5
5512 G07
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4.75
5
5.25
SUPPLY VOLTAGE (V)
5.5
5512 G08
5512fa
LT5512
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TYPICAL PERFOR A CE CHARACTERISTICS
(1900MHz Downmixer Application)
VCC = 5V, EN = High, TA = 25°C, 1900MHz RF input matching, PRF = –10dBm (–10dBm/tone for 2-tone IIP3 tests, Δf = 200kHz),
Low-Side LO, PLO = –10dBm, IF output measured at 170MHz, unless otherwise noted. Test circuit shown in Figure 2.
Conv Gain and IIP3
Conv Gain and IIP3 vs Temperature
Conv Gain, IIP3 and NF
vs Supply Voltage
RF = 1900MHz, IF = 170MHz
vs RF Frequency
14
17
LOW-SIDE LO
HIGH-SIDE LO
10
SSB NF
16
15
8
14
6
13
4
TA = 25°C
12
IF = 170MHz
11
2
GC
0
1700
16
IIP3
10
8
6
4
CONV GAIN
TA = 25°C
TA = –40°C
2
TA = 85°C
20
10
19
0
4.75
5.25
5.0
SUPPLY VOLTAGE (V)
14
17
12
–40°C 16
25°C
85°C 15
SSB NF
14
13
6
GC
0
–18 –16 –14 –12 –10 –8 –6
LO INPUT POWER (dBm)
–4
–30
–60
11
–80
TA = 25°C
TA = –40°C
IM3
SPUR LEVEL (dBm)
POUT
(RF = 1900MHz)
2RF-2LO
(RF = 1815MHz)
–1
2
5512 G15
LO-IF
–40
–45
–55
–60
–18 –16 –14 –12 –10 –8 –6
LO INPUT POWER (dBm)
3
PRF = –10dBm
–75
–50
TA = 25°C
fLO = 1730MHz
fRF = 1786.67MHz
–55
–60
–65
PRF = –10dBm
–70
–75
–80
PRF = –16dBm
–90
–18 –16 –14 –12 –10 –8 –6
LO INPUT POWER (dBm)
–2
5512 G14
TA = 25°C
fLO = 1730MHz
fRF = 1815MHz
–65
–70
–4
3RF-3LO Spur Level
vs LO Input Power
PRF = –16dBm
–85
–85
–110
–22 –19 –16 –13 –10 –7 –4
RF INPUT POWER (dBm)
–35
LO-RF
TA = 25°C
–60
–80
–90
fLO = 1730MHz
TA = 25°C
5512 G13
–55
100
–50
–90
0
–21 –18 –15 –12 –9 –6 –3
RF INPUT POWER (dBm/TONE)
–50
75
–30
TA = 85°C
2RF-2LO (Half-IF) Spur Level
vs LO Input Power
–50
0
25
50
TEMPERATURE (°C)
5512 G11
TA = 85°C
–50
–70
10
–2
3RF-3LO
(RF = 1786.67MHz)
–25
LO-IF and LO-RF Leakage
vs LO Input Power
–40
12
10
IF OUTPUT POWER (dBm)
HIGH-SIDE LO
LOW-SIDE LO
–25
–20
IF Output Power, 2RF-2LO and
3RF-3LO vs RF Input Power
–70
CONV GAIN
4
–20
5512 G12
–30
6
–50
5.5
SPUR LEVEL (dBm)
10
TA = 25°C
fLO = 1730MHz
–10 PLO = –10dBm
8
TA = –40°C
–10 POUT
POUT, IM3 (dBm/TONE)
18
SSB NF (dB)
GC (dB), IIP3 (dBm)
IIP3
16
2
10
Output IF Power and Output IM3
vs RF Input Power (2 Input Tones)
20
4
HIGH-SIDE LO
12
5512 G10
Conv Gain, IIP3 and NF
vs LO Input Power
8
LOW-SIDE LO
14
0
4.5
5512 G09
18
IIP3
16
2
0
10
2100
1800
2000
1900
RF FREQUENCY (MHz)
TA = 85°C
14
12
18
TA = –40°C
LO LEAKAGE (dBm)
12
TA = 25°C
CONV GAIN (dB), IIP3 (dBm)
18
CONV GAIN (dB), IIP3 (dBm)
16 IIP3
20
18
19
SSB NF (dB)
GC (dB), IIP3 (dBm)
18
–4
–2
5512 G16
–90
–18 –16 –14 –12 –10 –8 –6
LO INPUT POWER (dBm)
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–4
–2
5512 G17
5512fa
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LT5512
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PI FU CTIO S
NC (Pins 1, 4, 8, 13, 16): Not connected internally. These
pins should be grounded on the circuit board for improved
LO to RF and LO to IF isolation.
RF+,
RF–
(Pins 2, 3): Differential Inputs for the RF Signal. These pins must be driven with a differential signal.
Each pin must be connected to a DC ground capable of
sinking 15mA (30mA total). This DC bias return can be
accomplished through the center-tap of a balun, or with
shunt inductors. An impedance transformation is required
to match the RF input to 50Ω (or 75Ω).
EN (Pin 5): Enable Pin. When the input voltage is higher
than 3V, the mixer circuits supplied through Pins 6, 7, 10,
and 11 are enabled. When the input voltage is less than
0.3V, all circuits are disabled. Typical enable pin input
current is 50μA for EN = 5V and 0μA when EN = 0V.
VCC1 (Pin 6): Power Supply Pin for the LO Buffer Circuits.
Typical current consumption is 22mA. This pin should be
externally connected to the other VCC pins, and decoupled
with 0.01μF and 1μF capacitors.
VCC2 (Pin 7): Power Supply Pin for the Bias Circuits.
Typical current consumption is 4mA. This pin should be
externally connected to the other VCC pins, and decoupled
with 0.01μF and 1μF capacitors.
GND (Pins 9 and 12): Ground. These pins are internally
connected to the backside ground for better isolation. They
should be connected to RF ground on the circuit board,
although they are not intended to replace the primary
grounding through the backside contact of the package.
IF–, IF+ (Pins 10, 11): Differential Outputs for the IF
Signal. An impedance transformation may be required to
match the outputs. These pins must be connected to VCC
through impedance matching inductors, RF chokes or a
transformer center-tap.
LO–, LO+ (Pins 14, 15): Differential Inputs for the Local
Oscillator Signal. They can also be driven single-ended by
connecting one to an RF ground through a DC blocking
capacitor. These pins are internally biased to 2V; thus, DC
blocking capacitors are required. An impedance transformation or matching resistor is required to match the LO
input to 50Ω (or 75Ω).
GROUND (Pin 17): (Backside Contact): Circuit Ground
Return for the Entire IC. This must be soldered to the
printed circuit board ground plane.
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BLOCK DIAGRA
BACKSIDE
GROUND
17
RF
+
2
LINEAR
AMPLIFIER DOUBLE-BALANCED
MIXER
15mA
15mA
RF – 3
12 GND
11 IF
+
10 IF –
9 GND
LO
+
15
HIGH-SPEED
LO BUFFER
LO– 14
BIAS
5 EN
6
VCC1
6
7
VCC2
5512 BD
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5512fa
LT5512
TEST CIRCUITS
C6
16
6
RFIN
T1
1:1
NC
1
2
2
C4
RF
GND
+
IF
GND
RF INPUT MATCHING
T1
L1, L2
WBC4-4L
--47nH
27nH
WBC1-1TL
12nH
6.8nH
5.6nH
4.7nH
1
C3
10
6
IFOUT
0.1MHz TO 100MHz
2
4
3
9
VCC1 VCC2 NC
5
EN
5V
C4
39pF
100pF
68pF
33pF
18pF
12pF
10pF
T2
8:1
12
+ 11
IF –
NC
EN
RF(MHz)
0.25 - 250
45
70
140
240
380
450
13
LO– NC
RF –
4
L2
14
+
LT5512
3
3
4
15
LO
NC
L1
1
C7
R1
LOIN
–5dBm
6
7
8
VCC
4.5V TO 5.25V
C1
C2
5512 F01
REF DES
VALUE
SIZE
PART NUMBER
REF DES
VALUE
SIZE
PART NUMBER
R1
100Ω
0402
AAC CR05-101J
C4
See Table
0402
AVX 0402
C1, C6, C7
See Table
0402
Toko LL1005-FH
0.01µF
0402
AVX 04023C103JAT
L1, L2
C2
1µF
0603
AVX 0603ZD105KAT
T1
1:1
Coilcraft WBC1-1TL
C3
1.8pF
0402
AVX 04025A1R8BAT
T2
8:1
Mini-Circuits TC8-1
Figure 1. Test Schematic for HF/VHF/UHF Downmixer Applications
C6
C7
LOIN
–10dBm
17 16
T1
1
4
1
ZO = 72Ω
L = 2mm
2
C4
3
3
5
4
ZO = 72Ω
L = 2mm
NC
DC
15
LO
+
14
0.018"
13
LO–
NC
NC
RF
GND
T2
L1
IF
LT5512
IF –
RF –
GND
NC
5
EN
GND
12
+ 11
+
EN
RF
GND
0.062"
L3
RFIN
ER = 4.4
0.018"
6
IFOUT
2
C3
10
1
C5
4
3
L2
9
VCC1 VCC2 NC
6
7
8
R1
VCC
APPLICATION (MHz)
900 RF/170 IF
1900 RF/170 IF
2450 RF/240 IF
T1 (MURATA)
LDB21881M05C-001
LDB211G9010C-001
LDB212G4020C-001
C4
3.9pF
1.5pF
1.2pF
L3
22nH
5.6nH
4.7nH
C3
6.8pF
6.8pF
3.3pF
C1
C2
5512 F02
REF DES
VALUE
SIZE
PART NUMBER
REF DES
VALUE
SIZE
PART NUMBER
C5, C6, C7
100pF
0402
Murata GRP1555C1H101J
L1, L2
47nH
0402
Coilcraft 0402CS-47NX
C1
0.01µF
0402
Murata GRP155R71C103K
L3
See Table
0402
Toko LL1005-FH
C2
1.0µF
0603
Taiyo Yuden LMK107F105ZA
R1
10
0402
C4
See Table
0402
Murata GRP1555C
T1
See Table
C3
See Table
0402
Murata GRP1555C
T2
8:1
Murata LDB21 Series
Mini-Circuits TC8-1
Figure 2. Test Schematic for 900MHz to 2.5GHz Downmixer Applications
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The LT5512 consists of a double-balanced mixer, RF buffer
amplifier, high-speed limiting LO buffer and bias/enable
circuits. The differential RF, LO and IF ports require simple
external matching which allows the mixer to be used at
very low frequencies, below 1MHz, or up to 3GHz. Low
side or high side LO injection can be used.
capable of sinking 15mA. This can be accomplished with
the center-tap of a balun as shown in Figure 3, or with
bias chokes connected from Pins 2 and 3 to ground, if a
differential RF input signal is available. The value of the
bias chokes should be high enough to avoid reducing the
input impedance at the frequency of interest.
Two evaluation circuits are available. The HF/VHF/UHF
evaluation circuit is shown in Figure 1 and the 900MHz
to 2.5GHz evaluation circuit is shown in Figure 2. The
corresponding demo board layouts are shown in Figures
10 and 11, respectively.
Table 1 lists the differential input impedance and differential reflection coefficient between Pins 2 and 3 for several
common RF frequencies. As shown in Figures 3 and 4,
low-pass impedance matching is used to transform the
differential input impedance up to the desired value for
the balun input. The following example shows how to
design the low-pass impedance transformation network
for the RF input.
RF Input Port
A simplified schematic of the differential RF input is
shown in Figure 3, with the associated external impedance matching elements for a 450MHz application. Each
RF input requires a low resistance DC return to ground
LT5512
VBIAS
From Table 1, the differential input impedance at 450MHz
is 18.1 + j5.2. As shown in Figure 4, the 5.2Ω reactance is
split, with one half on each side of the 18.1Ω load resistor.
The matching network will consist of additional inductance
in series with the internal inductance and a capacitor in
parallel with the desired 50Ω source impedance. The capacitance (C4) and inductance are calculated as follows.
VCC
15mA
Q = (RS / RL ) – 1 = (50 / 18 . 1) – 1 = 1 . 328
15mA
2
C4 =
3
L1
4.7nH
Q
1 . 328
=
= 9 . 4pF (use 10pF )
ωRS 2π • 450MHz • 50
L2
4.7nH
C4
10pF
L1, L2 =
1 8 . 1 • 1 . 328
RL • Q
=
2 • 2π • 450MHz
2ω
= 4 . 2nH (use 4 . 7nH)
Table 1. RF Input Differential Impedance
1:1
RFIN
50Ω
5512 F03
Figure 3. RF Input with External Matching
for a 450MHz Application
L1
2
RS
50Ω
C4
3
Differential S11
Mag
Angle
10
18.2 + j0.14
0.467
179.6
44
18 + j0.26
0.470
178.6
240
18.1 + j2.8
0.471
172.6
450
18.1 + j5.2
0.473
166.3
j2.6
950
18.7 + j11.3
0.479
150.8
1900
20.6 + j22.8
0.503
124.3
2150
21.4 + j26.5
0.512
116.9
2450
22.5 + j30.5
0.522
109.2
2700
24.1 + j34.7
0.530
101.7
RL
18.1Ω
j2.6
LT5512
5512 F04
Figure 4. 450MHz RF Input Matching
8
Differential Input
Impedance
1/2 XINT
1/2 XINT
L2
Frequency
(MHz)
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RF PORT RETURN LOSS (dB)
0
Table 2. LO Input Differential Impedance
–5
Frequency
(MHz)
Differential Input
Impedance
–10
–15
900MHz
–20
–25
140MHz
450MHz
1900MHz
–30
50
100
1000
RF FREQUENCY (MHz)
3000
5512 F05
Figure 5. RF Input Return Loss
(140MHz, 450MHz, 900MHz and 1900MHz Matching)
At high frequencies (greater than 900MHz), this same
matching technique is used, but it is important to consider
the IC’s input reactance when calculating the external inductance. As shown in Figure 2, the high-frequency evaluation
board uses short (2mm) 72Ω microstrip lines to realize
the required inductance, instead of chip inductors.
External matching values for several frequencies, ranging
from 45MHz to 2.45GHz are shown in Figures 1 and 2.
Measured RF input return losses are plotted in Figure 5.
LO Input Port
The LO buffer amplifier consists of high-speed limiting
differential amplifiers, designed to drive the mixer quad
for high linearity. The LO+ and LO– pins are designed for
differential or single-ended drive. Both LO pins are internally biased to 2VDC.
LO +
15
C6
0.01µF
200Ω
2V
R1
100Ω
VCC
Angle
750
263 + j172
0.766
–10.2
213 + j178
0.760
–13.4
1250
175 + j173
0.752
–16.6
1500
146 + j164
0.743
–19.8
1750
125 + j153
0.733
–22.8
2000
108 + j142
0.722
–25.8
2250
95 + j131
0.709
–28.9
2500
86 + j122
0.695
–31.8
2750
78 + j133
0.68
–34.6
A simplified schematic of the LO input is shown in Figure
6 with simple resistive matching and DC blocking capacitors. This is the preferred matching for LO frequencies
below 1.5GHz. The internal (DC) resistance is 400Ω. The
required LO drive at the IC is 150mVRMS (typical) which
can come from a 50Ω source, or a higher impedance
source such as PECL. The external matching resistor is
required only to reduce the amplitude of the LO signal
at the IC, although the input stage will tolerate 10dB of
overdrive without significant performance degradation.
Resistive LO port matching is used on the low-frequency
evaluation board (see Figure 1).
Above 1.5GHz, the internal capacitance becomes significant
and reactive matching to 50Ω with a single series inductor and DC blocking capacitors is preferred. A schematic
is shown in Figure 7. Table 2 lists the differential input
LOIN
50Ω
–10dBm
C7
0.01µF
Mag
1000
200Ω
LOIN
–5dBm
Differential S11
L3
LO +
15
C6
100pF
2V
200Ω
200Ω
VCC
C7
100pF
14
LO –
14
LO –
LT5512
LT5512
5512 F07
5512 F06
Figure 6. LO Input with Resistive Matching
Figure 7. LO Input with Reactive Matching
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close as possible to the IF+/IF– pins. Even small amounts
of inductance in series with C3 (such as through a via)
can significantly degrade IIP3. The value of C3 should be
reduced by the value of internal capacitance (see Table 3).
This matching network is simple and offers good selectivity
for narrow band IF applications.
0
RETURN LOSS (dB)
–5
–10
4.7nH
5.6nH
6.8nH
–15
–20
8.2nH
–25
10nH
–30
0
500 1000 1500 2000 2500 3000 3500 4000
FREQUENCY (MHz)
1573 F08
Figure 8. Single-Ended LO Port Return Loss
vs Frequency for Various Values of L3
impedance and differential reflection coefficient between
the LO+ and LO– pins. This information can be used to
compute the value of the series matching inductor, L3.
Alternatively, Figure 8 shows measured LO input return
loss versus frequency for various values of L3. Reactive
LO port matching is used on the high-frequency evaluation
board (see Figure 2).
IF Output Port
The differential IF outputs, IF+ and IF–, are internally connected to the collectors of the mixer switching transistors
as shown in Figure 9. These outputs should be combined
externally through an RF balun or 180° hybrid to achieve
optimum performance. Both pins must be biased at the
supply voltage, which can be applied through matching
inductors (see Figure 2), or through the center-tap of an
output transformer (see Figure 1). These pins are protected
with ESD diodes; the diodes allow peak AC signal swing
up to 1.3V above VCC.
As shown in Table 3, the IF output differential impedance
is approximately 390Ω in parallel with 0.44pF. A simple
band-pass IF matching network suitable for wireless applications is shown in Figure 9. Here, L1, L2 and C3 set the
desired IF output frequency. The 390Ω differential output
can then be applied directly to a differential filter, or an
8:1 balun for impedance transformation down to 50Ω.
To achieve maximum linearity, C3 should be located as
10
For IF frequencies below 100MHz, the simplest IF matching
technique is an 8:1 transformer connected across the IF
pins as shown in Figure 1. DC bias to the IF+ and IF– pins
is provided through the transformer’s center-tap. A small
value IF capacitor (C3) improves the LO-IF leakage and
attenuates the undesired image frequency. No inductors
are required.
Table 3. IF Output Differential Impedance (Parallel Equivalent)
Frequency
(MHz)
Differential Output
Impedance
Differential S11
Mag
Angle
10
396 II - j10k
0.766
0
70
394 II - j5445
0.775
–1.1
170
393 II - j2112
0.774
–2.8
240
392 II - j1507
0.773
–3.9
450
387 II - j798
0.772
–7.3
750
377 II - j478
0.768
–12.2
860
371 II - j416
0.766
–14.0
1000
363 II - j359
0.762
–16.2
1250
363 II - j295
0.764
–19.6
1500
346 II -j244
0.756
–23.6
1900
317 II - j192
0.743
–29.9
LT5512
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IF+
L1
400Ω
TO
VCC DIFFERENTIAL
FILTER OR
BALUN
C3
L2
10
IF–
5512 F09
Figure 9. IF Output Equivalent Circuit
with Band-Pass Matching Elements
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PACKAGE DESCRIPTIO
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
0.72 ±0.05
4.35 ± 0.05
2.15 ± 0.05
2.90 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.30 ±0.05
0.65 BCS
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
4.00 ± 0.10
(4 SIDES)
0.75 ± 0.05
R = 0.115
TYP
0.55 ± 0.20
15
16
PIN 1
1
2.15 ± 0.10
(4-SIDES)
2
(UF) QFN 0102
0.200 REF
0.00 – 0.05
0.30 ± 0.05
0.65 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. EXPOSED PAD SHALL BE SOLDER PLATED
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LO
LO
RF
IF
RF
Figure 10. HF/VHF/UHF Evaluation Board Layout
(DC933A)
IF
Figure 11. High-Frequency Evaluation Board Layout
(DC478B)
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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10MHz to 3700MHz High Linearity Upconverting
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400MHz to 2.7GHz High Signal Level
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4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended
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LT5524
Low Power, Low Distortion ADC Driver with
Digitally Programmable Gain
450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control
LT5525
High Linearity, Low Power Downconverting Mixer Single-Ended 50Ω RF and LO Ports, 17.6dBm IIP3 at 1900MHz, ICC = 28mA
LT5526
High Linearity, Low Power Downconverting Mixer 3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF, NF = 11dB, ICC = 28mA,
–65dBm LO-RF Leakage
LT5527
400MHz to 3.7GHz High Signal Level
Downconverting Mixer
Single-Ended 50Ω RF and LO Ports, 23.5dBm IIP3 at 1.9GHz
LT5528
1.5GHz to 2.4GHz High Linearity Direct I/Q
Modulator
21.8dBm OIP3 at 2GHz, –159dBm/Hz Noise Floor, 50Ω Interface at all Ports
Infrastructure
Corporation
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12 Linear Technology
5512fa
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