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Control Flow
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We have: beq, bne, what about Branch-if-less-than?
New instruction:
if $s1 < $s2 then
$t0 = 1
slt $t0, $s1, $s2
else
$t0 = 0
Compiling a While Loop in C,
Eg. Assume that i and k correspond to registers $s3 and $s5 and the base of
the array save is in $s6
While (save [i]==k)
i+=1;
MIPS Code :
Loop: sll $t1,$s3,2
add $t1,$t1,$s6
lw $t0,0($t1)
bne $t0,$s5,Exit
addi $s3,$s3,1
j Loop
Exit:
Supporting Procedures in Computer
Hardware
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Procedure is a stored subroutine that performs a specific task based on the parameters
with which it is provided. This is one tool that C or Java programmers use, to structure
programs, both to make them understand and to allow code to be reused.
MIPS software follows the following convention in allocating its 32 registers for procedure
calling:
• $a0-$a3 – four argument registers in which to pass parameters
• $v0-$v1 – two value registers in which to return values.
• $ra -- one return address register to return to the point of origin
MIPS assembly language includes an instruction just for the procedures
• jal (jump and link instruction) jumps to an address and simultaneously saves the
address of the following instruction in register $ra.
• jal Procedure address
• Program Counter
• The jal instruction saves PC + 4 in register $ra to link to the following instruction
to set up the procedure return
• jr $ra : The unconditional jump instruction that jumps to the address specified in
a register
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The calling program, or caller, puts the parameter values in $a0-$a3 and uses a
jal instruction (jal X) to jump to procedure X (sometimes named the callee).
The callee then performs the calculations, places the result in $v0-$v1, and
returns to the caller using jr $ra.
Stack : LIFO (Last In First Out)
Push and Pop : buzzwords for transferring data to and from the stack.
SP : Stack Pointer ($sp)
Stacks “grow” from higher addresses to lower addresses. This convention
means that we push values onto the stack by subtracting from SP. Adding to
SP on the other hand, shrinks the stack, thereby popping values from the
stack.
The parameter variables g, h, i, j correspond to the argument registers $a0,$a1,$a2,$a3 and f
corresponds to $s0.
int leaf_example ( int g, int h, int i, int j)
{
int f;
f = (g+h) – (i+j);
return f;
}
Compiled MIPS code
leaf_example:
addi $sp, $sp,-12
# adjust stack to make room for three items
sw $t1,8($sp)
sw $t0,4($sp)
sw $s0,0($sp)
add $t0, $a0, $ a1
add $t1, $a2, $ a3
sub $s0, $t0, $t1
add $v0, $s0,$zero
# statements corresponding to the body of the procedure
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Before returning, we restore the three old values of the registers we saved by popping
them from the stack
lw $s0, 0($sp)
lw $t0, 4($sp)
lw $t1, 8($sp)
addi $sp,$sp,12
# restore values from stack back to register
jr $ra
# jump back to calling routine
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$t0-$t9 : 10 temporary registers that are not preserved on a procedure call.
Policy of Use Conventions
Name Register number
$zero
0
$v0-$v1
2-3
$a0-$a3
4-7
$t0-$t7
8-15
$s0-$s7
16-23
$t8-$t9
24-25
$gp
28
$sp
29
$fp
30
$ra
31
Usage
the constant value 0
values for results and expression evaluation
arguments
temporaries
saved
more temporaries
global pointer
stack pointer
frame pointer
return address
Register 1 ($at) reserved for assembler, 26-27($k0,$k1) for operating system
How about larger constants?
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We'd like to be able to load a 32 bit constant into a register
Eg. 0000 0000 0011 1101 0000 1001 0000 0000
Must use two instructions, new "load upper immediate" instruction
filled with zeros
lui $t0, 61
0000000000111101
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0000000000000000
Then must get the lower order bits right, i.e.,
ori $t0, $t0, 2304
0000000000111101
0000000000000000
0000000000000000
0000100100000000
0000000000111101
0000100100000000
ori
Addresses in Branches and Jumps
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Instructions:
bne $t4,$t5,Label
beq $t4,$t5,Label
j Label
Next instr is at Label if $t4 ≠ $t5
Next instr is at Label if $t4 = $t5
Next instruction is at Label
Formats:
I
op
J
op
rs
rt
16 bit address
26 bit address
If the addresses of the program had to fit in this 16 bit field, it would mean that no program
can be bigger than 216, which is far too small to be a realistic option today.
Alternative is to specify a register that would always be added to the branch address, so that
a branch instruction would calculate the following:
• PC = PC + Branch address
• This form of branch addressing is called PC relative addressing. The MIPS address is actually
relative to the address of the following instruction (PC + 4), as opposed to the current
instruction (PC).
Addresses in Branches
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Instructions:
bne $t4,$t5,Label
beq $t4,$t5,Label
Formats:
I
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Next instruction is at Label if $t4≠$t5
Next instruction is at Label if $t4=$t5
op
rs
rt
16 bit address
Could specify a register (like lw and sw) and add it to address
– use Instruction Address Register (PC = program counter)
– most branches are local (principle of locality)
While (save [i]==k)
i+=1;
MIPS Code :
Loop: sll $t1,$s3,2
add $t1,$t1,$s6
lw $t0,0($t1)
bne $t0,$s5,Exit
addi $s3,$s3,1
j Loop
Exit:
If we assume we place the loop starting at location
80000 in memory, what is the MIPS machine
code for this loop?
80000
0
0
19
9
2
0
80004
0
9
22
9
0
32
80008
35
9
8
0
80012
5
8
21
2
80016
8
19
19
1
80020
2
20000
1. Immediate addressing
op
rs
rt
Immediate
2. Register addressing
op
rs
rt
rd
...
funct
Registers
Register
3. Base addressing
op
rs
rt
Memor y
Address
+
Register
Byte
Halfword
4. PC-relative addressing
op
rs
rt
Memor y
Address
PC
+
Word
5. Pseudodirect addressing
op
Address
PC
Memor y
Word
Word
Overview of MIPS
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simple instructions all 32 bits wide
very structured, no unnecessary baggage
only three instruction formats
R
op
rs
rt
rd
I
op
rs
rt
16 bit address
J
op
shamt
26 bit address
funct
To summarize:
MIPS operands
Name
32 registers
Example
Comments
$s0-$s7, $t0-$t9, $zero, Fast locations for data. In MIPS, data must be in registers to perform
$a0-$a3, $v0-$v1, $gp,
arithmetic. MIPS register $zero always equals 0. Register $at is
$fp, $sp, $ra, $at
reserved for the assembler to handle large constants.
Memory[0],
2
30
Accessed only by data transfer instructions. MIPS uses byte addresses, so
memory Memory[4], ...,
words
and spilled registers, such as those saved on procedure calls.
add
MIPS assembly language
Example
Meaning
add $s1, $s2, $s3
$s1 = $s2 + $s3
Three operands; data in registers
subtract
sub $s1, $s2, $s3
$s1 = $s2 - $s3
Three operands; data in registers
$s1 = $s2 + 100
$s1 = Memory[$s2 + 100]
Memory[$s2 + 100] = $s1
$s1 = Memory[$s2 + 100]
Memory[$s2 + 100] = $s1
Used to add constants
Category
Arithmetic
sequential words differ by 4. Memory holds data structures, such as arrays,
Memory[4294967292]
Instruction
addi $s1, $s2, 100
lw
$s1, 100($s2)
sw
$s1, 100($s2)
store word
lb
$s1, 100($s2)
load byte
sb
$s1, 100($s2)
store byte
load upper immediate lui $s1, 100
add immediate
load word
Data transfer
Conditional
branch
Unconditional jump
$s1 = 100 * 2
16
Comments
Word from memory to register
Word from register to memory
Byte from memory to register
Byte from register to memory
Loads constant in upper 16 bits
branch on equal
beq
$s1, $s2, 25
if ($s1 == $s2) go to
PC + 4 + 100
Equal test; PC-relative branch
branch on not equal
bne
$s1, $s2, 25
if ($s1 != $s2) go to
PC + 4 + 100
Not equal test; PC-relative
set on less than
slt
$s1, $s2, $s3
if ($s2 < $s3) $s1 = 1;
else $s1 = 0
Compare less than; for beq, bne
set less than
immediate
slti
if ($s2 < 100) $s1 = 1;
else $s1 = 0
Compare less than constant
jump
j
jr
jal
go to 10000
go to $ra
$ra = PC + 4; go to 10000
Jump to target address
jump register
jump and link
$s1, $s2, 100
2500
$ra
2500
For switch, procedure return
For procedure call
Summary
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Instruction complexity is only one variable
– lower instruction count vs. higher CPI / lower clock rate
Design Principles:
– simplicity favors regularity
– smaller is faster
– good design demands good compromises
– make the common case fast
Instruction set architecture
– a very important abstraction indeed!
Program 2.8 (unsolved problem in Book)
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srl $s0,$s1,2
andi $s0,$s0,0X00ff
andi $s1,$s1,0Xfffe
ori $s1,$s1,0X0002
OR
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sll $s0,$s1,22
srl $s0,$s0,24
andi $s1,$s1,0Xfffe
ori $s1,$s1,0X0002