Download Design and implementation of a fiber optic RS232 link. 1987

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Thesis and Dissertation Collection
1987
Design and implementation of a fiber optic RS232 link.
Ryan, James William.
http://hdl.handle.net/10945/22233
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THESIS
DESIGN AND IMPLEMENTATION OF A
FIBER OPTIC RS232 LINK
by
James William Ryan
September 1987
Thesis Advisor:
John
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Design and Implementation of a Fiber Optic RS232 Link
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Fiber Optics, RS232, Optical Link
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This thesis investigates the feasibility of using a bidirectional fiber optic link to implement a RS232 data link.
The results showed that a fiber optic link is a viable replacement. It offers. a bandwidth up to 5 MHz, 250 times that
of a RS232 data link. This fiber optic link was implemented
over a distance of 1.5 kilometers, nearly 100 times that of
the present RS232 link. It also offers the benefits of space
and weight savings and is comparable to devices produced
commercially but at a substantial cost savings.
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Approved for public release; distribution is unlimited
Design and Implementation of a Fiber Optic RS232 Link
by
James William Ryan
Lieutenant, United States Navy
B.S., Salem State College, 1981
Submitted in partial fulfillment of the
requirements for the degree of
MASTER OF SCIENCE IN ELECTRICAL ENGINEERING
from the
NAVAL POSTGRADUATE SCHOOL
September 1987
ABSTRACT
This thesis investigates the feasibility of using a bi-
directional fiber optic link to implement a RS232 data link.
The results showed that a fiber optic link is a viable replacement. It offers a bandwidth up to 5 MHz, 250 times that
of a RS232 data link. This fiber optic link was implemented
over a distance of 1.5 kilometers, nearly 100 times that of
the present RS232 link. It also offers the benefits of space
and weight savings and is comparable to devices produced
commercially but at a substantial cost savings.
5<5
TABLE OF CONTENTS
I
II
III
.
.
.
IV.
V.
INTRODUCTION
9
A.
PURPOSE
9
B.
RESULTS
10
BACKGROUND
12
A.
THE RS232 INTERFACE
12
B.
PROPOSED FIBER OPTIC LINK
15
IMPLEMENTED FIBER OPTIC LINK
20
A.
CROSS CONNECTIONS OF THE RS232
20
B.
TRANSMISSION OF THE LIGHT SIGNAL
27
C.
RECEPTION OF THE LIGHT SIGNAL
32
D.
RECEIVER MODIFICATIONS
34
SYSTEM EVALUATION
37
A.
TRANSMITTED OPTICAL POWER
37
B.
OPERATING WAVELENGTHS
38
C.
RECEIVER SENSITIVITY LEVELS
39
D.
CROSSTALK
39
E.
TRANSMITTED AND RECEIVED SIGNALS
46
F.
LINK DISTANCES
72
G
PRODUCT COMPARISON
73
CONCLUSIONS
APPENDIX A:
:
MOTOROLA MC1489 QUAD LINE RECEIVER
DATA SHEETS
75
76
APPENDIX
APPENDIX
B:
C:
RCA LINEAR INTEGRATED CIRCUIT
CA3127E HIGH FREQUENCY
N-P-N TRANSISTOR ARRAY
DATA SHEETS
81
MOTOROLA MC1488 QUAD LINE DRIVER
DATA SHEETS
84
LIST OF REFERENCES
90
INITIAL DISTRIBUTION LIST
92
LIST OF TABLES
I.
II
III
IV.
V.
VI
EIA RS232 STANDARDS
14
HP-85 RS232 PINS
21
NEC RS232 PINS
22
AMPEX RS232 PINS
23
APPLIED AND RECEIVED SIGNALS
50
PRODUCT COMPARISON
74
LIST OF FIGURES
1.
Light Transmission Scheme
11
2
.
CAF
17
2
.
Fiber Optic Module
18
3
.
HP-85 / NEC Connection
24
3
.
HP-85 / AMPEX Connection
25
3.3
HP-85 RS232 Voltage Levels
28
3.4
NEC RS232 Voltage Levels
29
3
Transmitter
31
.
3.6
Receiver
3.7
System Diagram
35
4
.
Applied 1 MHz Signal
41
4
.
Unshielded Circuitry. - Crosstalk
42
4
.
Shielded Circuitry - Crosstalk
43
4.4
Unshielded Circuitry With CAF - Crosstalk
44
4.5
Shielded Circuitry With CAF - Crosstalk
45
4.6
HP-85 NEC Signals
47
4.7
HP-85 AMPEX Signals...
48
4.8
1 Hz
Applied Signal
4.9
1 Hz
Signal After
.33
3
51
Meters
Hz Signal After 1511 Meters
4
.
10
1
4
.
11
100 Hz Applied Signal
4
.
12
100 Hz Signal After
3
53
54
55
Meters
56
4.13
100 Hz Signal After 1511 Meters.
4
.
14
1
KHz Applied Signal
4
.
15
1
KHz Signal After
4.16
1
KHz Signal After 1511 Meters
58
.
Meters
3
4
.
17
10 KHz Applied Signal
4
.
18
10 KHz Signal After
4
.
19
10 KHz Signal After 1511 Meters
3
59
60
61
62
Meters
63
65
4.20
1
MHz Applied Signal
4.21
1
MHz Signal After
4.22
1
MHz Signal After 1511 "Meters
68
4.23
5
MHz Applied Signal
69
4.24
5
MHz Signal After
4.25
5
MHz Signal After 1511 Meters
3
3
66
Meters
Meters
8
67
70
71
I.
INTRODUCTION
This thesis investigates replacing the RS232 electronic
link with a fiber optic link. The primary objectives were an
investigation of the practical problems associated with
connecting two noncompatible devices together and then to
implement these connections onto a fiber optic link.
m
A.
PURPOSE
The. implementation of a fiber optic link offers several
distinct advantages over an electrical one. First the fiber
and the supporting circuitry would require less space and
would weigh less than an electronic link. The increased
bandwidth offered by a fiber optic link would offer the user
the possibility of system expansion. Utilizing fibers would
virtually eliminate the problem of crosstalk which can occur
when two wires are close enough to each other to allow signals
from one line to cross over to another as a result of
electromagnetic interference (EMI)
.
[Ref
.
1]
The fiber optic link proposed here is full duplex bidirectional over a single fiber. The link achieves this
capability by utilizing a wavelength division multiplexing
scheme. In wavelength division multiplexing several optical
signals of differing wavelengths are coupled into a single
fiber [Ref.
2]
Wavelength division multiplexing is achieved in this
project through the use of a dichroic filter. As seen in
Figure 1.1 a dichroic filter allows the transmission of one
wavelength while reflecting the other wavelength. Specifically, a light wave, generated by an LED, transmits through
the filter and is directed into the fiber optic cable. A light
wave, which is generated in the same fashion at the other end
of the fiber, reflects off of the dichroic filter and into a
PIN detector. A complete ana-lysis of light generation and
reception is found in Chapter III.
B.
RESULTS
The researched showed that the link investigated in this
thesis is realizable and it was found to be comparable to
units on the commercial market. A detailed analysis of the
system performance is found in Chapter IV.
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II.
A.
BACKGROUND
THE RS232 INTERFACE
In order for two devices to communicate, they must be
connected in such a way so that electrical signals are trans-
mitted and received correctly by each unit.
This connection may be achieved directly by connecting
wires to the devices or by using an intermediate medium. More
often than not, the telephone network is used as this medium.
The most widely used connection to link the medium to the
device is the RS232 data link.
[Ref. 4:p.l67]
The RS232 link was originally designed to allow communi-
cations between data terminal equipment (DTE)
(i.e.,
computers) and data communication equipment (DCE)
modems)
[Ref.
5:p.
(e.g.,
11]. For the application discussed in this
project two DTEs will be connected without the use of DCEs.
This configuration is called null modem [Ref. 5:p. 13].
When this is done, a problem often arises. The DTEs cannot
communicate with each other as the pin configurations of the
RS232 were designed to be connected to DCEs. It would seem as
if all one would have to do is cross-connect the pins. However
this is not the case, as the manufacturers designate the pins
of the RS232 to suit their own needs. To find these
12
cross-connections required is sometimes a very frustrating and
time consuming venture.
In an effort to make equipment from different man-
ufacturers compatible the Electronic Industries Association,
(EIA)
,
published a standard, the RS232-C. Unfortunately this
standard specifies the connections between DTEs and DCEs.
Specifically it delineates the electrical characteristics of
the circuits between the two devices and the names and numbers
of the pins necessary for connection to allow communications.
The pins numbers and titles as specified by the EIA are
listed in Table I. Since this project is concerned only with
null modem configurations, not all the pins listed will be
discussed in this project.
While the RS232 link is an extremely useful interface it
has an potential ground loop problem. Because of this and
other prob-lems, the standard recommends that the cable
interconnection between the two devices should be limited to a
maximum dis-tance of 50 feet; at longer distances the
connection becomes unreliable and hazardous.
[Ref.
4: p.
168]
Another major problem with the use of the RS232 is that
large signal voltages are required to insure noise immunity is
achieved on the link. The RS232 signal voltages are anywhere
between plus and minus 25 volts. These high transmission
voltages are required because of common mode noise. This noise
could be on the level of a few volts. Some of the sources of
the common mode noise could be from photocopiers, typewriters,
13
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printers, etc. Even if a link of greater than 50 feet could be
safely achieved, one would find that a build up of capacitance
is present, which would severely affect the quality of the
signal as it transitions between the positive and negative
voltages.
[Ref.
5: p.
14]
Another limiting feature of the RS232 interface is that,
even with these high voltage levels that the EIA standard
specifies
the interface is rated for a signaling rate from
d.c. to an upper limits of only 20K bits per second. [Ref
.
6:p.
79]
B.
PROPOSED FIBER OPTIC LINK
The proposed fiber optic link presented in this project
would eliminate problems inherent in the RS232 link. This link
would increase the distances between DTEs almost 100 fold and
increase bandwidth to "that of 250 times to that of the RS232.
The applications for a link such as this one are numerous.
It opens the possibility of data transfer simplification,
weight reduction of the link, communications link security,
and the expansion to a LAN (local area network)
The link described here is full duplex over a single
fiber. In a full duplex mode both DTEs can be transmitting
simultaneously. In other fiber optic links simultaneous
transmission was only possible by using two fibers, one for
transmission and one for reception. To achieve a single fiber
scheme the two light signals must be multiplexed onto one
15
fiber. The multiplexing method used for this link is wave-
length division multiplexing (WDM)
WDM is obtained through the use of a coupler manufactured
by ADC FIBER OPTICS. This coupler is called a Connectorized
Active Full Duplex Coupler (CAF)
[Ref. 7:p.
1].
A diagram of
the operation of this coupler is shown in Figure 2.1. As can
seen there are two LEDs transmitting at two differing
wavelengths. The light signal transmitting at 865 nanometers
will be detailed as an example as the transmission and
reception of the other wavelength of 730 nanometers is
similar. The electronic signal generated by the DTE is
converted to a light signal by the 865 nanometer LED,
(a
detailed analysis of this process is found in chapter
3)
,
the
light wave passes through a dichroic filter, which passes that
wavelength, and is reflected into the fiber by a focusing
mirror. As the light exits the fiber at the other end it is
incident upon another focusing mirror which directs the light
wave onto another dichroic filter. This dichroic filter is set
to transmit the light 730 nanometer causing the light at 865
nanometers to be reflected into the PIN detector. From the
detector the light wave is converted to an electrical signal.
The CAF described above is an integral element of the
fiber optic modules used in this link; a diagram of these
modules is shown in Figure 2.2. The three major components of
are: the transmitting circuitry, the receiver circuitry and
the CAF. The basic operation for the modules is that the
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incoming electrical signal drives current through the LED in
the CAF, sending a light wave into fiber which is received by
the PIN detector in the other CAF. The light wave is converted
to an electrical signal and through the use of a three stage
amplifier is set to an acceptable level. Detailed analysis of
transmitting and receiving circuitry is given in Chapter III.
19
III.
A.
IMPLEMENTED FIBER OPTIC LINK
CROSS CONNECTIONS OF THE RS232
The first step in this project was to connect a Hewlett-
Packard Series 85 personal computer (HP-85) to a NEC
SPINWRITER model 7710 printer (NEC)
.
Following successful
operation the next step was to connect the HP-85 to an AMPEX
210 Video display terminal (AMPEX)
,
in a null modem config-
uration. The functions of the HP-85, NEC, and the AMPEX RS2 32
pins are listed in Tables II, III, and IV, respectively. The
reader is referred to section A of Chapter II for formal
definitions of these pins. The problem of connecting the DCEs
in a null modem configuration proved to be a most formidable
one, since manufacturers fail to adhere to any real consis-
tencies in their standards of their RS232 pin functions.
The cross connections necessary for transmission of the
data and for the handshaking between the two DTE's are shown
in Figures 3.1 and 3.2. Figure 3.1 shows the minimum
connections necessary for proper communication between the HP85 and the NEC. The direction of signal flow and the
manufacturers pin titles are also listed in the figure. Figure
3.2 shows the minimum connections of the RS232 required for
proper operation between the HP-85 and AMPEX. The pin titles
and direction of data flow are also shown.
20
TABLE II
HP-85 RS232 PINS
PIN
FUNCTION
1.
EQUIPMENT GROUND
2.
TRANSMITTED DATA
3.
RECEIVED DATA
4.
REQUEST TO SEND (RTS)
5.
CLEAR TO SEND (CTS)
6.
DATA SET READY (DSR)
7
SIGNAL GROUND
8.
RECEIVED LINE SIGNAL DETECTOR
12.
SECONDARY. RECEIVED LINE SIGNAL DETECTOR
13.
SECONDARY CLEAR TO SEND
14.
SECONDARY TRANSMITTED DATA
15.
TRANSMITTER SIGNAL ELEMENT TIMING
16.
SECONDARY RECEIVER DATA
17.
RECEIVER SIGNAL ELEMENT TIMING
IS.
SECONDARY REQUEST TO SEND
20.
DATA TERMINAL READY (DTR)
21.
SIGNAL QUALITY DETECTOR
22.
RING INDICATOR
23.
DATA SIGNAL RATE SELECTOR
24.
TRANSMIT SIGNAL ELEMENT TIMING
[Ref. 8:p. 47]
21
TABLE III
NEC RS232 PINS
PIN
FUNCTION
1.
EQUIPMENT GROUND
2.
TRANSMITTED DATA
3.
RECEIVED DATA
4.
REQUEST TO SEND (RTS)
5.
CLEAR TO SEND (CTS)
6.
DATA SET READY (DSR)
7.
SIGNAL GROUND
8.
CARRIER DETECT
19.
REVERSE CHANNEL
20.
DATA TERMINAL READY (DTR)
23.
PAPER OUT / RIBBON END
[Ref.
9:p.
22
3-5]
TABLE IV
AMPEX RS232 PINS
PIN
FUNCTION
1.
EQUIPMENT GROUND"
2
TRANSMITTED DATA
3.
RECEIVE DATA
4.
REQUEST TO SEND (RTS)
5.
CLEAR TO SEND (CTS)
6.
DATA SET READY (DSR)
7.
SIGNAL GROUND
8.
DATA CARRIER DETECT (DCD)
20.
DATA TERMINAL READY (DTR)
[Ref.
.
10:p. 21]
23
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The second step of this project was to determine which
were the data transmission pins and the data reception pins
and the pins required for the handshaking. Two pins are
readily identifiable. Pin
1
is the chassis ground and pin 7
the signal ground. This is true for both configurations.
Considering the connection between the HP-85 and the NEC,
pin
3
of the HP-85 is used to transmit the data to the receive
pin of the NEC which is also pin
3
.
The NEC uses pin
2
to
transmit a break signal back- to the HP-85. This signal, of 300
- 700 milliseconds duration,
is interpreted by the HP-85 as a
priority interrupt [Ref. 9:p. 4-5]. Once this signal is
received, the HP-85 ceases transmission of the data. The break
signal is transmitted when any of the following conditions
occur [Ref. 9:p. 4-6]:
1.
2.
3
paper out
buffer overflow
ribbon end
When the above situations have been rectified, the NEC
transmits another signal of the same duration as the break
signal and transmission of the data will occur [Ref.
6].
9: p.
4-
Pin 20 is Data Terminal Ready (DTR) line; this is a
handshaking line, where a positive voltage indicates that the
DTEs are ready to begin transmission [Ref. 6:p. 84].
For the configuration of the HP-85 connected to the AMPEX
terminal, pin
3
was determined to be the receive channel of
the AMPEX and pin
2
the transmit data from the AMPEX. Pin
is the DTR line here also.
26
2
Now that the data lines and handshaking pins have been
identified, the next step was to circumvent the handshaking
lines. The DTR lines of both configurations are connected to a
high voltage and the ground lines are connected to an absolute
ground. After doing this we will have two data channels: one
transmit and one receive. We now have the desired configuration for transmission on the fiber optic link.
B.
TRANSMISSION OF THE LIGHT SIGNAL
To transmit the signal oh the link the bipolar voltage
levels used by the RS232 are converted to TTL levels. On data
lines
2
and
3,
a positive level voltage (SPACE)
a logical zero and a negative voltage level
corresponds to
(MARK)
corresponds
to logical one [Ref. 5:p. 14]. The voltage levels used by the
HP-85 to indicate a logical "1" and a logical "0" are shown in
Figure 3.3. Figure 3*3 shows that the HP-85 interprets voltages between positive
5
volts and positive 15 volts as a
logical "0" and the voltages between negative
5
and negative
15 volts as a logical "1". The voltage levels used by the NEC
are shown in Figure 3.4. Figure
interprets voltages between
3
.
4
shows that the NEC
and positive 12 volts as a
logical "0" and the voltages between
and negative 12 volts
as a logical "1". The voltage levels used by the AMPEX could
not be referenced. It was assumed that voltages between +5
volts and +15 volts
will be interpreted as a SPACE and
voltages between -5 volts and -15 volts as a MARK. Since the
27
25 VOLTS
PERMISSIBLE OPEN-CIRCUIT
VOLTAGE
+ 15
VOLTS
LOGICAL "0"
"ON" CONDITION
"SPACE"+ 5 VOLTS
NOISE MARGIN
+3
VOLTS
\/\/\/\/\/\/\/\
TRANSITION
v y v v v v
A A HA A A r
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aa/wvw
VOLTS - CIRCUIT A8
REFERENCE VOLTAGE
-3 VOLTS
NOISE MARGIN
-5 VOLTS
LOGICAL
••V
"OFF" CONDITION
"MARK'"
-15 VOLTS
PERMISSIBLE OPEN-CIRCUIT
VOLTAGE
-25 VOLTS
Figure
3
.
HP-85 RS232 Voltage Levels
28
[Ref. 8:p.
45]
START
CODE BITS
(CHARACTER
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(SPACE)
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4
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110 BAUD.
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STOP
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EARLIEST POINT WHERE
NEXT CHARACTER CAN START
150, 300. 600,
ONE STOP
Figure
3
.
OR
1200 BAUD,
BIT
NEC RS232 Voltage Levels
29
[Ref.
9:p.
4-1]
voltage levels are bipolar they have to be converted to TTL
levels required for the fiber optic modules. The device
utilized for the conversion is the MC1489, a quad line
receiver [Ref
.
ll:p. 5-120]
(Appendix A)
.
The MC1489
interprets voltages between -3 and -25 volts as a logical "1"
and
voltages between +3 and +25 volts as a logical "0" [Ref.
5:p.
5-121]. The output voltage range from the MC1489 is 2.5
to 5.0 volts for logical "1" and
[Ref.
to 0.45 for logical "0"
ll:p. 5-121]. The TTL outputs from the MC1489 are
supplied to the transmitter circuitry of the fiber optic
module.
The function of the transmitter circuitry is to modulate
the LED of the CAF on or off in accordance with the input
signal. The circuitry is
shown in Figure 3.5. As Figure 3.5
shows, the TTL input is fed into two exclusive-or gates. On
the first gate, U2A, one input is the TTL signal and the other
input is always asserted high through a IK ohm
pull up
resistor. On the second gate, U2B, one input is the TTL input
signal and the other input is non-asserted through ground. By
having this configuration, Q6 and Q7 are alternately driven on
and off. When Q6 is asserted, it allows the LED to transmit a
light signal through the fiber. When Q7 is asserted, current
is drawn through resistor R15. This design has the advantage
that the power supply output remains constant and transient
emissions are minimized. Diodes Dl, D2
the bias on the base of Q8
.
Diodes,
30
,
and D3,are used to set
instead of resistors, are
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31
used so that a constant drive current will be maintained
during power fluctuations.
C.
[Ref.
7:p.
6]
RECEPTION OF THE LIGHT SIGNAL
The light signal transmitted into the fiber is received by
the pin detector in the CAF. The receiver circuitry is shown
in Figure 3.6. The light signal received must be significantly
amplified before it can be converted into a TTL signal. This
is achieved in the receiver by three separate stages: a high
gain feedback preamplifier, a low gain differential amplifier
and a voltage comparator.
[Ref. 7:p.
8]
The preamplifier is a three stage transistor amplifier.
The transistor array used is CA3127E, a high frequency n-p-n
transistor array (Appendix
B)
.
This stage converts the low
current levels received by the pin detector into a voltage.
The signal out of the preamplifier is applied to a low
gain differential amplifier. The purpose of this amplifier is
to convert the input to a complementary differential output.
The outputs of this stage are applied to a precision voltage
comparator, a LT1016. This comparator performs the function of
converting the differential analog input to TTL levels
[Ref.
7:p.
8].
The TTL levels are then converted to bipolar level by
a MC1488,
a quad line driver (Appendix C)
.
The MC1488 is
designed to provide a complete interface between the DTEs and
the DCEs [Ref. ll:p. 5-118]. The outputs are now suitable for
use by the RS232. Once the bipolar levels are achieved, the
*
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33
signals are routed back to the RS232 to complete the trans-
mission path. The diagram of the system is shown in Figure
3.7. This figure shows the complete fiber optic link. The
actual size of one of these units, including the connection
for the RS232 port is
D.
6
by 11 inches.
RECEIVER MODIFICATIONS
As has been seen, the main body of this project has been
fiber optic modules. These modules were developed by ADC Fiber
Optic Corporation. For our specific application modifications
were required to suit our frequency range. The frequency range
that the modules were designed for was from 0.4 MHz to 20 MHz
for a total bandwidth of 19.6 MHz. Our required bandwidth is
only 19.2 KHz, however the frequency range is from d.c. to
20 KHz. This is the bandwidth used by the RS232.
It was therefore
necessary to reduce the lower end of the frequency response of
the modules.
Analysis of the transmitter and receiver circuits of the
fiber optic modules revealed that in the receiver circuitry,
there was a high pass filter between the high feedback pre-
amplifier and the low gain differential amplifier. Referring
to the receiver circuit schematic (Figure 3.6), capacitor C4
and resistor Rl act as a high pass filter with a cutoff
frequency of 1592 Hz.
After reviewing the frequencies required for the
configurations (HP-85 to NEC, HP-85 to AMPEX)
34
,
it was found
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that the lowest frequency transmitted would be by the NEC,
1.43 Hz to 3.3 Hz for the break signal. The method to decrease
the cutoff frequency was to place another capacitor in
parallel with C4. This was determined to be the best solution
as the space the circuit board of the modules is limited and
the increased capacitance decreased the noise caused from high
speed components.
The increased capacitance was calculated to be 111.4
microfarads. A 100 microfarad capacitor was placed in parallel
with C4 to give a theoretical -cutoff frequency of 1.59 Hz.
After this addition was made to the
units)
,
receiver circuit (of both
a full duplex bi-directional fiber optic link capable
of handling the data flow of RS232 was achieved. Both the
connections to the printer and to the terminal performed
flawlessly.
36
IV. SYSTEM EVALUATION
Evaluation of the transmitted optical power, operating
wavelengths, receiver sensitivity, cross talk levels, and
lengths of possible links with fibers of different sizes and
differing losses are examined in this chapter. In the section
dealing with the transmitting optical both units will be
examined, however in the other sections only one unit will be
discussed as the data compiled for each unit was comparable to
the other.
A.
TRANSMITTED OPTICAL POWER
The measurement of the transmitted optical power was done
by a Photodyne Model 22XL Optical Multimeter. Each fiber optic
module was connected to the optical multimeter via three
meters of 62.5/125 micrometer graded index fiber, provided by
the manufacturer of the modules. In order to measure the power
output a square wave was applied to each of the fiber optic
modules* The square wave was generated by a Wavetek signal
generator and verified by using an oscilloscope. The signal
input frequency range was from 100 Hz to
1
MHz, i.e., the
complete operating range of the optical multimeter [Ref. 12].
The unit containing the CAF transmitting at 73
nanometers
transmitted a signal at -11.8 dbm (66.1 microwatts), while the
CAF transmitting at 865 nanometers transmitted a signal of
37
-12.2 dbm (60.3 microwatts) to give a total power through the
fiber, during duplex operation, of -8.98 dbm (126.4 micro-
watts)
.
These measurements were made by connecting the optical
multimeter
directly to the CAF. The rated power through the
fiber, at maximum capacity, is specified to be -10.0 dbm (100
microwatts)
[Ref.
13]. It is assumed that the manufacturer
rated his product conservatively to be safe.
B.
OPERATING WAVELENGTHS
The system, as has been stated, has two LEDs transmitting
at different wavelengths. The wavelength to be received is
reflected off the dichroic filter and into the PIN detector,
while the transmitted wavelength passes through the filter
into the fiber. The operating wavelengths were measured to see
if there was a possibility of crosstalk between the two wave-
lengths caused by an overlap of wavelengths from the LEDs.
The measurement of the wavelengths was accomplished by
connecting the CAF to a Photodyne Model 1100XM Fiber Optic
Spectral Analyzer and then to the optical multimeter.
For the CAF specified to transmit at 73
nanometers, the
peak output wavelength was found to be 729 nanometers. The
three db points were 717 nanometers and 745.5 nanometers, to
give a half power bandwidth of 28 nanometers. The full oper-
ating range of this CAF was found to be from 688 nanometers to
771 nanometers,
for total bandwidth of
38
83
nanometers.
The CAF specified to transmit at 865 nanometers had a peak
output wavelength of 862.5 nanometers. The three db points
were found to be at 843 nanometers and 874.5 nanometers, to
give a half power bandwidth of 31.5 nanometers. The operating
range of this CAF was found to be from 821 nanometers to 905
nanometers, for a bandwidth of 84 nanometers. Thus, there is a
50 nanometers separation between the two wavelengths.
C.
RECEIVER SENSITIVITY LEVELS
The receiver sensitivity level of the PIN detector was
specified, in the worst case, as -24.5 dbm. However it was
observed that the detector was able to receive a signal at a
level of -44.0 dbm and the receiver circuitry was able to
convert it the original TTL signal. This represents an increase of 79.5% in the sensitivity level of the detector. It
was also observed that, although a signal below -44.0 dbm
could be received by the PIN detector, it would not have
sufficient power to trigger a response from the first stage
amplifier of the receiver circuitry.
D.
CROSSTALK
Four crosstalk measurements were made on the fiber optic
modules. These measurements were made with different com-
ponents on and off the modules to see their effect on
crosstalk.
A
1
MHz square wave was applied to the fiber optic
modules. The
1
MHz frequency was chosen so that the effect of
39
a high frequency on the unshielded receiver circuitry could be
observed. A square waveform was chosen so that a spectral
analysis could be accomplished and the resulting sine pulse
efficiently analyzed for center frequencies and power levels.
A spectral analysis of the applied wave is shown in Figure
4.1. Figure 4.1 shows the spectrum of a sine pulse with a
power level of -18.80 dbm at a center frequency of
1
MHz (as
indicated by the annotation to the left of the spectral peak)
Figure 4.2 shows the measured spectrum of the sine pulse
at a center frequency of 1 MHz with a power level of -79.10
dbm on the other receiver. This power represents the crosstalk
due to the circuitry of the transmitter. In this observation
the receiver circuitry was unshielded from the transmitter.
Figure 4.3 shows a sine pulse spectrum at a center
frequency of 1.0 MHz at a level of -81.30 dbm. This represents
the amount of crosstalk that results with the receiver
circuitry shielded from the transmitter. Thus the shielding
provided an additional isolation of 2.2 db.
Figure 4.4 shows a sine pulse at a center frequency of
1.00 MHZ at a level of -77.30 dbm. This is the crosstalk due
to both the transmitting circuitry and CAF, mounted on the
fiber optic module. In this case the receiver circuitry was
left unshielded.
Figure 4.5 shows a sine pulse at a center frequency of
1.00 MHz at a level of -78.50 dbm. This the crosstalk level
due to both the transmitter and the CAF, but this time the
40
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receiver was shielded. The shielding gave an additional
isolation of 1.2 db.
The object of these measurements was to observe the
crosstalk due to the electronic emissions of the transmitter
and the optical crosstalk of the CAF. Overall the CAF was
observed to increase the crosstalk levels 1.2 to 2.8 db. This
crosstalk is possibly due to internal reflections of light
within the CAF being received by the PIN detector.
Although crosstalk is present in the system the levels
present at would not be sufficient to cause an erroneous
response from the receiver.
E.
TRANSMITTED AND RECEIVED SIGNALS
The transmitted and received signals of the HP85 NEC con-
figuration are shown in Figure 4.6. This diagram was obtained
was obtained by using the Hewlett-Packard 1615A Logic
Analyzer. Channel
shows the transmitted break signal from
the NEC (refer to section A of chapter
3)
,
while channel
1
shows the received break signal on the fiber optic module,
channel
6
shows the transmitted data from the HP85 while
channel
7
shows the data received at the end of the fiber. The
distance of transmission was 1.27 kilometers on 50/125
micrometer fiber. It is noted that the HP85 is triggered on
the trailing edge of the break signal.
In Figure 4.7 we see the data transmission of the HP85-
AMPEX configuration. Channel
6
shows the transmitted data from
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HP85 and channel
7
shows the received signal after the 1.27
kilometers link.
Signals of various frequencies were applied to the fiber
optic modules to obtain the frequency range of the modules.
The input frequencies ranged from
1
Hz to 5 MHz. Again the
waveforms were chosen to be square waves so that a spectral
analysis would be easy accomplished. Two different fibers were
used to determine the losses due to the connectors and to
observe the minimum sensitivity level of the detector. The
frequencies and amplitudes observed are listed in Table V.
Measurements were made of the amplitudes of the signal at the
input to the fiber optic modules and after transmission on
meters of 50/125 micrometer
3
graded index fiber to calculate
the connector losses. On the average, depending on the orien-
tation of the fiber, a connector loss of 1.25 dbm was
.
observed. Transmission on the 1511 meters length of 100/140
micrometer fiber was performed as the author believes that
this would be a realistic distance necessary for a high speed
data link. From Table V it is seen that at
5
MHz the maximum
sensitivity of the PIN detector is reached (-44.0 dbm). A
spectral analysis of the signals listed in Table V are shown
in Figures 4.8 to 4.25. Explanation of these figures follows.
Figure 4.8 shows the spectral analysis and power level of
a 1 Hz square wave that was applied to the input of the fiber
optic modules. As seen in Figure 4.8 the spectral analysis the
waveform is a sine shape at a center frequency of
49
1
Hz with a
TABLE V
APPLIED AND RECEIVED SIGNALS
FREQUENCY
REC. SIGNAL
3M F.O CABLE
(50/125 urn)
INPUT
SIGNAL
(dbm)
(dbm)
REC. SIGNAL
1511M CABLE
(100/140 urn)
(dbm)
-6.90
-9.60
-10.30
-17.80
-20.60
-36.70
-18.50
-20.50
-35.90
10 KHZ
-17.80
-20.50
-35.60
1
MHZ
-18.40
-21.00
-37.60
5
MHZ
-19.80
-21.80
-44.00
1
HZ
100 HZ
1
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power level of -6.90 dbm. A
1
Hz signal was applied to ensure
that the modules would be able to respond to the lowest freq-
uency seen experimentally for two DTEs, without experiencing
significant delay or distortion on a long distance link.
Figure 4.9 shows the same sine spectrum after
3
meters of
fiber. The level of power is observed to -9.60 dbm. Since
3
meters of fiber has a negligible amount of attenuation at
7
db/km the losses seen here are attributed to connectors. Here
a total connector loss of 2. 1 db is seen.
Figure
4
.
10 shows the 1 Hz sine spectrum after trans-
versing the 1511 meter fiber. A signal with a center frequency
of 1 Hz is observed at a level of -10.30 dbm. This power level
is more than sufficient to trigger a response from the
receiver circuitry. Thus the link would be able to handle the
lowest frequency transmitted by the DTEs.
Frequencies of 100 Hz, lKHz, and 10 KHz were applied to
the modules as these would be typical of the frequencies seen
by the RS232.
Figure 4.11 shows the spectral analysis of 100 Hz square
wave applied input signal. The sine spectrum shown in Figure
4.11 has a center frequency of 100 Hz at a level of -17.80
dbm.
Figure 4.12 has the same sine spectrum after the
fiber. This also has a center frequency of 100 Hz at
3
meter
a level
of -20.60 dbm. This implies a total connector loss of 2.8 db.
52
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meter fiber at a center frequency of 100 Hz and a power level
of -36.70 dbm, well within the receiver sensitivity limit of
-44.0 dbm.
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1
KHz
square wave is shown. The resulting spectrum pulse has a
frequency of
1
KHz at a power level of -18.50 dbm. This same
signal is observed in Figure 4.15 after the
3
meter fiber, a
power level of -20.50 dbm, to give a total connector loss of
2.0 db. This improved connector loss may have been the result
of an improved orientation of the fiber to the connectors of
the fiber optic modules.
Figure 4.16 displays the spectrum of the signal after the
1511 meters of fiber. A center frequency of 1.0007. KHz at a
power level of -35.90 dbm, still within the limits of the
receiver.
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wave at 10 KHz. The figure shows a center frequency of 10 KHz
at a power level of -17.80 dbm. Figure 4.18 has the spectrum
after the
3
meter fiber to give a total connector loss of
2.7 db.
Signals of frequencies
1
MHz and
5
MHz were also applied
to the fiber optic modules. These high frequencies were chosen
as they would reflect a data flow that would be seen on a
local area network.
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19 shows the same 10 KHz sine spectrum after the
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would still trigger a response from the receiver circuitry.
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MHz
square wave with power level of -18.40 dbm. Figure 4.21 shows
the signal after the
3
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giving a total connector loss of 2.6 db.
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1511 meter fiber at a center frequency of
level of -37.60 dbm.
1
MHz and a power
This signal is 6.4 dbm above the
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5
MHz. This sine pulse has an input amplitude of -19.80 dbm.
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3
meter fiber at a
level of -21.80 dbm to give a total connector loss of 2.0 db.
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meters of fiber. The center frequency is still at
5
MHz,
however, the power level of the signal is seen to be at the
maximum sensitivity level of the receiver, -44.0 dbm.
The fiber optic modules frequency range is effectively
from d.c. to
5
MHz, an increase of 250 times that of the
bandwidth of the RS232. The capability of the modules to
handle
1
to
5
MHz signals opens the system up to the
possibility of being utilized on a local area network.
64
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71
•
This set of data also showed that on the average, depen-
ding on the orientation of the fiber, a connector loss of 1.25
db could be anticipated for a professionally manufactured
cable. This figure will be used in the calculation of ideal
link distances.
F.
LINK DISTANCES
One of the limiting features in using the RS232 link is
that it is limited to a maximum length of 50 feet for baud
rates in excess of 300 baud [Ref. 8:p. 169]. With the utili-
zation of a fiber optic network lengths could be increased to
nearly 100 times that, for any baud rate that the DTEs are
capable of transmitting and receiving.
A link distance was calculated for 50/125 micrometer
graded index fiber with a loss of
7
db/km. Using the man-
ufacturer's specification the optical power coupled into the
fiber would be -20.0 dbm. The maximum rated sensitivity for
the detector, -25 dbm as specified by the manufacturer [Ref.
7: p. 13].
An average connector loss of 1.25 db per connector
was measured and was used in the calculations. An optical
budget of 7.0 db was obtained through these calculations,
(transmitted power - (connector loss + receiver sehsitivity)
)
This would provide a link distance of 1.00 kilometer.
Experimentally, using 200 meters of 50/125 micrometer
graded index fiber, at 7db/km loss, and an attenuator (since
greater lengths of 50/125 micrometer fiber were not available)
72
a link distance of 1.27 kilometers was obtained,
.
an increase
*
of 27.0% over design specifications.
For a 100/140 micrometer graded index fiber, at
7
db/km
loss, the manufacturer's maximum designed optical transmitted
power coupled into the fiber is -11.2 dbm. Using the specifications above, a calculated link of distance of 2.34
kilometers is possible.
Experimentally a link of distance 1.511 kilometers was
achieved. A greater distance may have been achieved but the
laboratory attenuator available was not suitable for use on
the 100/140 micrometer fiber.
G.
PRODUCT COMPARISON
A comparison of the costs and other major characteristics of
this unit and other equivalent units is shown in Table VI.
From analysis of Table VI it can be seen that the fiber optic
unit described in this project is comparable to commercial
units on the market in both price and in performance.
73
TABLE VI
PRODUCT COMPARISON
UNIT
MAX.
FREQ.
FOM
HPIB
5MHZ
4.8MHz
TOTAL
PRICE
MANNER OF
OPERATION
BI-DIRECTIONAL
FULL DUPLEX
HALF DUPLEX
593.00
2770.00
EXPANDABILITY
LINK
DIST.
1.27
K
YES
(AT A COST OF
300.00
PER STATION
1.25 KM
)
YES
(AT A COST OF
860.00
PER STATION
ATT
LIT.
19.2 KHz
BI-DIRECTIONAL
FULL DUPLEX
520.00
1
KM
MHz
BI-DIRECTIONAL
FULL DUPLEX
1998.00
8
KM
2
NO
UNKNOWN
LEGEND:
FOM - FIBER OPTIC MODULES
HPIB - HEWLETT-PACKARD INTERFACE BUS EXTENDER
[Ref.
14]
ATT - ATT ODL RS232-2 FIBER OPTIC MODEM
[Ref.
LIT.
-
15]
LITTON INDUSTRY E03 671
[Ref.
16]
74
)
V.
CONCLUSIONS
As can be seen from Table VI the link designed here would
have capability of expanding because of the great bandwidth
offered by the use of fibers.
The link presented in this thesis is a point to point
link, but the same principles would apply to higher order
networks. Stations could be added on this link, but it would
be at a minimum cost of three" hundred dollars per station.
Another limitation of expanding onto a higher level network
would be the optical power.
The optical budget of each
station would have to be observed to ensure that one station
did not drain the optical bus of such a large amount of power
to render the other taps useless.
Some possible solutions to this problem could be to inter-
change the LEDs in the CAFs with laser sources or to use more
sensitive detectors. A different approach would to have each
station at a differing wavelength within the CAF. The only
problem with scheme would be that it would not be interactive.
In essence, this thesis is the beginning point of a
possible inexpensive fiber optic local area network.
75
APPENDIX A
MOTOROLA MC1489 QUAD LINE RECEIVER DATA SHEETS
MC1489
MC1489A
&30TGFS&L.A
QUAD
QUAD MDTL
LINE RECEIVERS
LINE RECEIVERS
RS-232C
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MCI 489 monolithic quad line receivers are designed to interequipment with data communications equipment
conformance with the specifications of EIA Standard No. RS-232C.
face data terminal
in
• Input Resistance - 3.0 k
•
Input Signal Range
• Input Threshold Hysteresis
•
kilohms
to 7
- ± 30
Volts
Built In
Response Control
a) Logic Threshold Shifting
b) Input Noise Filtering
L SUFFIX
p SUFFIX
PLASTIC PACKAGE
CERAMIC PACKAGE
CASE 632-02
MO-O01AA
Input
TYPICAL APPLICATION
n>
A LI
Wotoonw r—
Control A Li.
UM «t Clrvl
KIWI
iMMCOWCTiiiG
CASK
Ourovf A rr
i
Input S (T
Cmntrol
9 I—
Ouioot 6 (V
KTincoaarcriM;
on mciowt
-
|
caiu
I
mm loccnuinn
EQUIVALENT CIRCUIT SCHEMATIC
•tisroiist
control
:
(1/4
CASE
iZNcc
^&
^t5
i5]
—'Control O
nJOulpul O
IQJ
5-120
76
Inoul
C
S"»*pon««
Con.ro, C
8| Output C
o
o
Input
siRiniaiin
Of CIRCUIT SHOWNI
MOTOROLA LINEAR/INTERFACE DEVICES
646-05
tcnouKO
MC1489, MC1489A
MAXIMUM RATINGS
»25°C
(T A •
unless otherw.se notedl
Symbol
Ratine,
Value
Unit
Power Supply Voltage
vC c
10
Vdc
Input Voitaoe Range
V|R
130
Vdc
'L
20
mA
Ouipul Load Current
Power Dissipation (Package Limitation, Ceramic and
Dual
Plastic
In
Line
Package!
Derate above T A
•
»25°C
Operating Ambient Temperature Rang*
'0
1000
mW
1'ftJA
6.7
mW/°C
TA
Oto <75
T stg
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (Response
control pin
is
-65 to
°C
U
M 75
open.) (V<;c - +5.0 Vdc 2 10%. T A =
C
to + 75'C unless
otherwise noted)
Characteristics
Symbol
Min
Typ
Max
Unit
l|H
3.6
—
8.3
mA
—
-8.3
mA
+ 25 Vdcl
(Vih = +3.0 Vdcl
Positive Input Current
(V|h
Negative Input Current
(V|i_
— -25,Vdc)
(V| L
= -3.0 Vdcl
0.43
Input Turn-On Threshold Voltage
(TA
- + 25'C. Vql *
°- 45
v
A - + 25'C. Voh »
2-5 V.
Output Voltage High
Ii_
1.0
(V|h
Low
1.75
(Vil
(All
«
0.75
» -0.5 mA)
Open Circuit. I(_ « -0.5 mA|
V H
» 10 mA)
vol
0.75 V, L
l
-
3.0 V,
li_
Gates "on." ou t »
mA, V|y
l
(V C C
'
5.0
Propagation Delay Time
0.8
2.5
4.0
5.0
2.5
4.0
5.0
(RL » 3.9
(Rl - 390
Propagation Oelay Time
Time
ice
PC
3.9 kill
(Rt
- 390
—
—
—
—
'TLH
kill.
•PHL
kill
tTHL
1.25
Vdc
0.2
0.45
Vdc
-3.0
-4.0
16
26
mA
mA
80
130
mW
ns
1.)
<PLH
kill
1.25
—
—
—
—
Vdc -1%, T A - +25X. See Figure
(Hl
Time
+5.0 Vdc)
+5.0 Vdc)
(V|h
SWITCHING CHARACTERISTICS
Fall
2.25
0.75
ios
Power Consumption
Rise
1.95
Vdc
MC1489
MC1489A
Output Short-Circuit Current
Power Supply Current
1.5
VlL
- -0.5 mA)
(Input
Output Voltage
Vdc
VlH
MC1489
MC1489A
»
Input Turn-Off Threshold Voltage
|T
-3.6
-0.43
hL
25
85
120
175
ns
25
50
ns
10
20
ns
TEST CIRCUITS
FIGURE
1
— SWITCHING RESPONSE
FIGURE 2
— RESPONSE CONTROL NODE
Vft
«E<i
±
ESP0NSE N00E
1/4
UCI489A
tUmrdtTHl
V,„
c>
«-
measured
Iff-. -
C. caoacitor
R. resistor
C(_
-
15 of
=
total parasilic capacitance,
-e>Vrj
90".
11
if
which includes
probe and wiring capacitances
MOTOROLA LINEAR/INTERFACE OEVICES
5-121
77
lor
none
liliennq
lor thfesriold shilling
MC1489, MC1489A
TYPICAL CHARACTERISTICS
tv CC " 5.0 Vdc.
FIGURE
3
TA
•
*2S C unlsss otherwise nof«dl
— INPUT CURRENT
— MC1489 INPUT THRESHOLD
VOLTAGE ADJUSTMENT
FIGURE 4
10
^r^
6
•>o
SO
•CO
V|
•40
i
2.0
5
<°
-5=-T~Vj^
-40
-
_
3
20
2
io
1
«T
13k
II k
_V,h
Vth
V.h
•SV
•SV
—
—
>
1
"
•
_J
-20
-IS
SO
-10
V,„.IKPUT
•iO
-10
>n
'It
«IS
20
30
FIGURE 6
— INPUT THRESHOLD VOLTAGE
•trjus
-
"
\
-"rl
-«T-
-5
II
_«s
10
—
E
11
»—
'«
S
1
k.
Vih
5
V
-=
°~
r«T-
-V|
TEMPERATURE
MCI«9AV| H
2 20
-Hi
10
24
sn
«o
>20
Vv INPUT VOLTAGE (VOLTS)
— MC14WA INPUT THRESHOLD
VOLTAGE ADJUSTMENT
—>r
(0
—»>
r
-10
10
VOLTAGE (VOlTSI
FIGURE 5
30
4.
VllH V|Hl
-10
-10
V
«.
»«
MC14M V| H
"
—J—
i
I 01
—
-
-
-
—
-2
-1
(I
•
V). INI
1
ot
'-
04
~,l
HCH
y<a«9A vn
S >-02
u
1
-]
—
...
VllH "V|H(.
"J
'2
•!
1
_L
o
*4
-c 1
r.
— INPUT THRESHOLD versus
POWER-SUPPLY VOLTAGE
FIGURE 7
20
VIH*
"3
Ml
<
1
Ml 1
(
1JTVOI T*GEI\ rOLTSI
>
3
o
1
—
-SV
\
-SO
E0
—
«T
_5k
>
•JO
_"T
_«T.
J0
|——>.
M
i—
VW
-
V^M. C14J9A
C14JS
—
"
»—
2
X
40
10
V(X POWER SUPPLY VOLTAGE
(VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
5-122
78
te« if (RAT
U«El°C
1
1
•170
MC1489, MC1489A
APPLICATIONS INFORMATION
The MC1489 input has
and turn-off of 1.0
volt for a typical hysteresis of 250 mV. The MC1489A
has typical turn-on of 1.95 volts and turn-off of 0.8 volt
hysteresis for noise rejection.
General Information
typical turn-on voltage of 1.25 volts
The Electronic Industries Association (EIA) has released
the RS-232C specification detailing the requirements for
the interface between data processing equipment and
data communications equipment. This standard specifies not only the number and type of interface leads,
but also the voltage levels to be used. The MCI 488 quad
driver and its companion circuit, the MC1489 quad receiver, provide a complete interface system between
DTL or TTL logic levels and the RS-232C defined levels.
The RS-232C requirements as applied to receivers are
for typically 1.15 volts of hysteresis.
Each receiver section has an external response connode in addition to the input and output pins,
trol
thereby allowing the designer to vary the input threshold voltage levels. A resistor can be connected between
this node and an external power-supply. Figures 2, 4
and 5 illustrate the input threshold voltage shift possible
through this technique.
This response node can also be used for the filtering
of high-frequency, high-energy noise pulses. Figures 8
and 9 show typical noise-pulse rejection for external
capacitors of various sizes.
These two operations on the response node can be
discussed herein.
The required input impedance
is defined as between
3000 ohms and 7000 ohms for input voltages between
3.0 and 25 volts in magnitude; and any voltage on the
receiver input in an open circuit condition must be less_
than 2.0 volts in magnitude. The MC1489 circuits meet"
these requirements with a maximum open circuit voltage of one Vgg.
The receiver shall detect a voltage between -3.0 and
-25 volts as a Logic "1" and inputs between +3.0 and
+ 25 volts as a Logic "0." On some interchange leads,
an open circuit of power "OFF" condition (300 ohms or
more to ground) shall be decoded as an "OFF" condition
combined or used
will
many combinations
The MC1489 circuits are particularly useful for interfacing between MOS circuits and
MDTL/MTTL logic systems. In this application, the input
threshold voltages are adjusted (with the appropriate
supply and resistor values) to fall in the center of the
MOS voltage logic levels. (See Figure 10)
The response node may also be used as the receiver
input as long as the designer realizes that he may not
drive this node with a low impedance source to a voltage greater than one diode above ground or less than
one diode below ground. This feature is demonstrated
in Figure 1 1 where two receivers are slaved to the same
or Logic "1." For this reason, the input hysteresis
thresholds of the MC1489 circuits are all above ground.
Thus an open or grounded input
individually for
of interfacing applications.
cause the same
output as a negative or Logic "1" input.
Device Characteristics
The MC1489 interface receivers have internal feedback
from the second stage to the input stage providing input
line
that
must
meet the RS-232C impedance
still
requirement.
FIGURE 9 — TYPICAL TURN-ON THRESHOLD versus
CAPACITANCE FROM RESPONSE CONTROL PIN TO GNO
FIGURE 8 —TYPICAL TURN-ON THRESHOLD versus
CAPACITANCE FROM RESPONSE CONTROL PIN TO GNO
MC1489A
l?pF
\
100
pA
SOOpA
300 pf \
V
>00
1000
PW INPUT PULSE WI0IM
10
000
1000
100
PW INPUT PULSE
lot)
\
MOTOROLA LINEAR/INTERFACE DEVICES
5-123
79
MOTH
Inil
ioooo
MC1489, MC1489A
APPLICATIONS INFORMATION
Icom.nuedl
FIGURE 10
— TYPICAL TRANSLATOR APPLICATION —
MOS TO
DTL OR TTL
•
'i Vdt
r
MCM89
MOS
FIGURE
11
1
L
^
i«00
•4Ydc
i
i
«
TTl
rl.-J
-,
OTl
10GIC
*-"GG
'
(
|"
~.
— TYPICAL PARALLELING OF TWO MC14«9A RECEIVERS TO MEET RS-232C
RESPONSE CONTROL PIN
INPUT
INPUT
RESPONSE CONTROL PIN
-
o-
MOTOROLA LINEAR/INTERFACE DEVICES
5-124
80
APPENDIX B
RCA LINEAR INTEGRATED CIRCUIT CA3127E HIGH FREQUENCY N-P-N
TRANSISTOR ARRAY DATA SHEETS
CA3127E
Features:
High-Frequency N-P-N
Transistor Array
Gain-Bandwidth Product
Power Gain - 30 dB
Noise Figure » 3.5
Low-Power Applications at Frequencies up to
For
500
RCACA3127E*
of
consists
purpose silicon n-p-n transistors
general-
five
on
a
common
© © © ©
©
3
<2
transistors
fj in excess of
»alue of
CA3I27E
VHF
dc
provided to each of the terminals
lor the individual transistors and a separate
substrate connection has been provided for
minimum application flexibility The monolithic construction of the CA3I27E provides
dose electrical and thermal matching of the
Access
1
GHz
"VHF
amplifiers
is
O©©.0©©0©
mixers
IF Converter
RF/mixer /oscillator
IF amplifiers
Sense amplifiers
Synthesizers
Synchronous detectors
Cascade
amplifiers
3JCS-ZZZI*
Fig. t
-
Se/itmttic diagrtm of
CA3I27S.
transistors.
live
CA3127E
The
is supplied in a 16 lead dual-inpackage and operates over the full
temperature range of -55 to + 1 25°C.
line plastic
military
'
(typ.)
Multifunction combinations—
GHz, making the
to 500 MHz.
1
from
useful
>
100 MHz
at 100 MHz
on a common substrate
Applications:
Each of the completely
exhibits low 1/f noise and
monolithic substrate.
i
dB
Five independent transistors
MHz
isolated
(f-p)
Ityp.) at
Formerly
RCA
STATIC ELECTRICAL CHARACTERISTICS
CHARACTERISTICS
TA
25°C
LIMITS
TEST CONDITIONS
TA6206.
Oev. No.
at
Min.
MAXIMUM RATINGS,
UNITS
Typ. Max.
For Each Transistor:
Absolute-Maximum Values:
Collector-to-Base
•0//ER DISSIPATION. P
8B mW
Any one transistor
Total
For
TA
425
up io ?S°C
> 75°C
mW
6.67
mW/°C
-55 to H 25 C
-65 tot 25 C
.
Storeqt
I
LEAO TEMPERATURE
I0URING SOLDERING):
At distance t / 1 6 1 1 132 inch
11.59
for
± 0.79
mml
10 seconds
32
-
V
mA,
15
24
-
V
20
60
-
V
4
5.7
-
V
-
0.5
uA
-
40
nA
Ir;
Breakdown Voltage
Collector-to-Substrate
I
Breakdown Voltage
TEMPERATURE RANGE:
0r»renng
20
1
Ig »
Derate
Linearly at
AMBIENT
Breakdown Voltage
Collector-to-Emitter
Package:
For T A
IC" 10 uA, E »0
l
:
C1 - 10uA, lg>0,
Emitter-to Base
It:
Breakdown Voltage*
»10uA, lc«0
Collector-Cutoff-Current
V CE -10V,
Collector-Cutoff-Current
VcB=
lg =
mas
I
t-265
C
apply tor each transistor in
DC
mA
mA
IC*0.1 mA
IC * 5 mA
Forward-Current
V CE
Transfer Ratio
- 6
V
me device:
Collector-to-Emitter Voltage.
Coiiectorto-8ase Voltage.
Collector. to-Substrat*
Current.
i
1SV
V
V
V(-£q
Vqqq
20
20
.
Voltage. Vj-jq*
20
r
'The collector of each transistor of the
>s
isolated
mA
Base-to-Emitter Voltage
Vce
- 6
V
must be connected to
5
35
88
IC
1
40
90
-
35
85
-
0.71
0.81
1
rnA
IC"0.1
Colledtor-to-Emitter
IC
Saturation Voltage
10
mA,
lg *
-
IC
IC "
CA3127E
from the substrate by an integral diode.
The substrate Iterminal 51
the
-
10 V. E =
Irons case
Th* following ratings
Collector
lg*0
1
rnA
mA
0.91
0.66 0.76 0.86
V
0.60 0.70 0.80
-
0.26 0.50
V
most negative point in the external circuit to
maintain
isolation
provide for
between
transistors
and to
normal transistor action.
Magnitude of Difference
in
Qs,
Vgg
Magnitude of Oifference
in
Ir
& 02 Matched
V CE >6V, lc
1
mA
-
0.5
5
mV
-
0.2
3
uA
•When used
as a zener for reference voltage, the device musi not be subjected to more than 0.1 milhioule of
energy from any possible capacitance or electrostatic discharge in order to prevent degradation of the
junction. Maximum operating zener current should be less than 10 mA.
fie.
2-
1/t
noite figure at » function of collector
current ar
^SOURCE
"
*""
"•
215
81
CA3127E
DYNAMIC CHARACTERISTICS at T A
CHARACTERISTICS
- 2S°C
LIMITS
TEST CONDITIONS
Min.
l/F Noise Figure
f
Gain-Bandwidth Product
Vce
Collector. to-Base
R$
= 100 kHz.
Col lector lo-Subsirate
V ct
Capacitance
Emitter-to-Base
Capacitance
Voltage Gain
» 6 V,
f-
1
-
f
1.8
—
dB
mA
-
1.15
—
GHz
MHz
-
See
-
pF
-
Fig.
-
pF
5
-
PF
dB
V.
f
-
VcE "6
V,
f
> 10
kfi.
1
1
MHz
1
VBE »4
R|_"
mA
-
500 n, lc -
- 6 V. lc • 5
VCB"6V.
Capacitance
-
1
UNITS
Typ. Max.
MHz
3—
Fig.
/// noite figure as j function of collector
current et R SOURCE • '
*U
MHz
Ic'ImA
-
28
-
27
30
_ i
co*.tic*o«- -0
Cascode Configuration
Power Gain
f- 100 MHz. V+- 12 V
Noise Figure
IC •
mA
-
Input Resistance
Common- Emitter
—
1
Output Resistance
Configuration
Input Capacitance
VC E
Output Capacitance
IC -
Magnitude of Forward
f
mA
2
—
—
—
—
24
-
400
4.6
3.7
-
MHz
» 200
-
3.5
—
—
V
6
1
.
Transadrnittance
(•>!(•
.oi.ft.ci
i^ii***
jjli:l::!:!:|:J
rJB
dB
n
ktt
pF
pF
mmho
4 — Gembendxrrdth product
Fig.
it t function of
collector current
__
-f r
JLZZ
^ *s
••
>rt _
1!-
1
-
I"
}
,:
I
"I
1:
I
I
Cmmm wojf
i
I
*
i
r ••
-
——
e co
hmmm
^£"i-*
•V
I SI
«iMft«a- ro-c*W
l~^^"
'
.J,
«
I
•
0.ts»- to^emitter
voltage si e function of
^'9- 67*W
i
•
•» vOt'**l
- Capacitance
voitagm for
collector current.
—
1
t>«
- •
at j function
»«1
m*
.
,0
»»
1
«
*°
!
,
1
<
07*»
pn
3 1*'
••»
«7«
—
O
\m
018
•
MO
IN
V
1
"0
0*10
'»
B
•
«o
<
n
1
f
f
»
MHi.
Guard
terminal! except thote un*Jer
test.
•»
couict a*
/
ZLujLU- T
f*M
MR (tan
1
Typical capacitance values at
Three termntef measurement
eft
»
7W
V
• OK
«7*
a i*i
-36
C0u.tC»O»-'0-|»»»'t« *X'*** "*c !•»
ta*o •« %-wv.t i«\.iooo
•OO ()* ' •(>' :i* ' « TO
U
••
-o
lOMltO
'•ft r
<*(!•••
-1L
3
'
1
«
«
.
1
"!
1
TT
1
-«
.1
'',1-1
1
/ - Voltmq*
tt R.
NTH
j..
...
—
,\Ji
1
<
^'^.
"~~
*-*
i'
1
,
|
i
1
5
67tW
fljp
Q}
1
;
tf
of bias
TO
n
OS
'-'
^i~i±J±.L.
I
04
r ..\..- /.\7\t*»*<.it»mc.l ic<#' -
77*
97r»
•
DON
03
•
no
CO
•
07
C(»j
T* COttldOO-'O-O**!
I
j
j
C»»K'n«Cf
1
5 —
«o
"»0_
JSL
0*
Fig,
« to
«Cf
gun
100
L_L»
-U
ji •
II
-
!.
1
function of frequency
101
^/».
J - vmiiq*
it
a. -
fttm »« • function ol frequency
1
*il
82
f«0.
^ -
DC
KbVOWoTol
tVHIM
tre*ufr+ rstiO *« #
function of collector current.
CA3127E
TmoXCM
Tf MVCMruM
couccioa- ro-CMirrta
•
tl 4
ri *<•>'»< <n**t»tli#(
l«lvC
.on«d
—
'
i
a i.« »
1!;; :i!:,:uj
1
':^!:TH:r-j:fcrtW:ttKit!fc«i:*
_
8.
.,
.
.
,
_
<-
,_
:i::!
:•
::
~
l
_
.,
UI'D't
i
ii
!»«<••«
CQLLCCtM CUMCHrdcl-
••
'•*
/
'°
1
•.:•:••
7
ii
; i
ii
,/
»
1
V
-3*^
0«
rfm
ri
01
1
'
!
•
:
/I
«
I
t
i
O
c oo
- topur admittance 1Y
,
racMacrtn— m
CaUSCIM CuMCNf H C I-*A
rfOuCMv If I— NM
ffl
.
'I
^*
"Til
*
M
A/
y/
S* sr
j 0,
I
fca,
i
/
*yr
1
*
/
J jj *
function of
fry.
"
—
freQuency.
/npuf admittance (Y
j
MB>RM
j) as a
function of
A'o; /«?
— Output admittance (^22*
** * function of
frepuency.
collector current.
f|i**-.*fti.»|
if A
wvt
COIIIC'
COLttCl 0* (U««(»t .\lMtft*
"
1
*>
*
»
:
—
3
h
Vfti
ii
—
-
* 'jo
3
1
Si
m
fO »
O
"
^td_
M
5
1
!
c
3
»
oo
7
caucfvicuMfiititci—«
fit.
/J
- Output admittance \Y22i
M( .
mM
'
000
J
'ltM«'(l!-«
o
1
collcctc* cu««t*riic>— •*
Mct'tfin
as * 'uflC " on "'
Fig.
14
- Forward trensadmittance (Y2ft
collector current.
es a
fioj
function of collector current.
WKim
'"M*:
•
>
i
riw
1T4M!
c
voitl Stnt
CW.L(Cr<J*-f
K»«M
/5 - forward transadmittance IY21I at a
function of frequency.
|l«
IV
•0
J
?
4/0
I
i
3
*04
i
Of
t5
vAj
•
0*
:
*•*.
g8
S*
si
s -
j
1
0*.'.
-
-
„
-jo*
<T)
1
——
•iCi
)
"!
T
M
Ml
1
«»o»*
<^
I/O
1
"'
1©
°."»
FI»fQuC«CTiM— «•*•
%
ft?
-
Reverse trensadmittance (Yj2*
function of collector current.
Kft*Wfk
F
«*
Fig.
•
17
-
reverse trensadmittance IY 12) at a
function of frequency.
Fig.
18
—
Voltage-gain test circuit using current-
mirror biasing for Q2.
— —-h
This circuit was chosen because it convenieoMy
represents a close appro hi mat on in i>erformance to
properly unrlateralizerj single transistor of this
type. The use 0* Q3 in a current-mirror configuration facilitates simplified biasmq. The use of the
cascode circuit in no way implies that the transistors cannot be used individually.
,
frrr:
a
I
1
11(1
Fig.
Fig.
19 -
100MHz
power-gain end noise- figure
test circuit.
20 — Block diagrams of power-gain and
figure test setups.
83
irno
noise-
APPENDIX C
MOTOROLA MC1488 QUAD LINE DRIVER DATA SHEETS
SY30T<GFZ€2LA
MC1488
QUAD MDTL
QUAD
The MC1488
LINE DRIVER
RS-232C
SILICON MONOLITHIC
INTEGRATED CIRCUIT
LINE DRIVER
a monolithic quad line driver designed to interequipment with data communications equipment
in conformance with the specificationsof EIA Standard No. RS-232C.
ii
face data terminal
Features:
• Current Limited Output
tlOmAtyp
• Power-Off Source Impedance
300 Ohms min
1L
• Simple Slew Rate-Control with External Capacitor
•
Flexible Operating Supply
•
Compatible with All Motorola
CERAMIC PACKAGE
CASE 632-02
MO-001AA
Range
MOT L
and
MTTL
1"
SUFFIX
P SUFFIX
PLASTIC PACKAGE
CASE
Logic Families
PIN
CONNECTIONS
TYPICAL APPLICATION
uftt omvfil
inffiicotnfCTiNlI
•Out
u»(
icnvm
CUM
CAilt
..HZ)*
"oiiioeiciwur
•
•onioeicoufnii
CIRCUIT SCHEMATIC
OF CIRCUIT SHOWNI
11/4
*vs
MOTOROLA LINEAR/INTERFACE DEVICES
5-114
84
O
purrut
646-05
MC1488
MAXIMUM RATINGS
»25 C unless otherwise noted .)
IT A •
Symbol
Rating
Power Supply Voltage
vcc
VEE
Input Voltage Range
V|R
Output Signal Voltage
vO
-
•
1'"»JA
.
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (Vcc - +9.0 * 10%
Vdc,
Low
Figure
Input Current
High Logic Slate
Logic State (V|(_
= 0)
V|n
I
•
5
V)
Output Voltage - High Logic Slate
(V| L
"08
IV|l
8
3 0klJ.
Vdc. Ri_
RL
Vclt.
"
VCc
3 0kiJ.
Vdc V EE
" *9.0
Vcc
*
,
'
>
3 2 Vdc.
V EE
Output Vottjge
Low Logic Slate
(V| H
1 9 Vdc. R L * 3.0 kfi, Vcc * *9-0 Vdc V EE
^
IV| H « 1.9 Vdc.
Positive
RL" 3
ki>.
Vcc
" *
Output Snort Circuit Current
Positive
IV|H
"
1.9
Vdc.
8 Vdc.
(V| L «
Vcc
VC C
VC c
•
19
Vdc.
(V, L •
08
Vdc.
IV|H
19
Vdc.
Vcc
Vcc
8 Vdc.
VC c
IV|h
V EE
*
Supply Current (R|
*
IV| L •
"
1
IV| L •
VE g
19 Vdc. Vgg
0.8 Vdc.Vgg
(V| H •
19
•
Vg
|
-
*2
'90 Vdc)
'
,9
*
»12 Vdc)
"
*12 Vdc
"
°C
°C
-
75'C unless otherwise noted.)
Typ
1
6
1
V H
'9
'105
-6.0
-7
(lA
Vdc
3
'OS*
'6
•
3
'OS-
-6
-10
10
300
o
-
-105
-9.0
r
mA
7
V OL
4
Unit
Vdc
2 vdct
VI
Ma.
10
° vdcl
" " ,3
to
Mm
Symbol
if.
12
mA
-12
inA
•
Ohms
-
mA
'cc
15
20
4.5
60
•
° vdcl
19
-
'
5.5
,s Vdc)
25
7
•34
'15 Vdc)
•17
<x*
5
>EE
-13
a
«.-9.0 Vdc)
<
-
-12 Vdc)
-18
-17
mA
-15
MA
-23
mA
-12 Vdc)
-15
„A
Vgg
-15 Vdc)
-34
<V ft_ • 0.8 Vdc. V EE
-15 Vdcl
-2 5
mA
mA
Vdc.
•
Power Consumption
IV c c 9 Vdc. V E g --9 Vdc)
IV C c * 12 Vdc. V EE • -12 Vdc)
Propagation Delay Time
Fall
Time
(i|
Propagation Oelay Time
Rise Time
Maximum
li| •
tti •
In
(V C c- + 9
0±1%
Vdc.
V EE
•
-9.0+ 1% Vdc. T A
ISpFI
6
and IS pF)
6
3.0 k and 15 pF)
6
and 15 pF)
6
3.0 k and
* 3
• 3
k
k
mW
"C
SWITCHING CHARACTERISTICS
(1)
Oto *75
'IH
5
*
" *
|
V E£
mW
mW/°C
-65 to »175
1
2
* "9
Vdc
T «.g
-13.2 Vdc)
11
1
9 Vdc. V EE - -9.0 Vdc)
IV (L -0.8 Vde.
(V|h
0.
-
•
Vdc
7
60
ao)
Negative Supply Current IR^
IV|H
-
-
6
.
"90 Vdc)
(11
Negative Output Short Circuit Current
Output Resistance (Vcc
13 2 vde
"
< 70
TA
1
2
Vdc
115
V EE - -9.0 i 10% Vdc, T A =
Characteristic
Input Current -
15
-15
1000
«25°C
Ooerating Amtnent Temperature Range
Unit
15 < V, B
Power Derating (Package Limitation, Ceramic and Plastic Oual-ln-Lme Package)
Derate above T A
Value
Package Power Dissipation
may be exceeded
if all
-
•
-
275
350
ns
-
45
75
ns
<PHL
-
110
175
ns
H
-
55
100
ns
'PLH
'THL
tTI
MOTOROLA LINEAR/INTERFACE DEVICES
85
333
576
25°C.)
outputs are shorted simultaneously.
5-115
-
.
MC1488
CHARACTERISTIC DEFINITIONS
FIGURE
1
sv
- INPUT CURRENT
-j
FIGURE
- OUTPUT VOLTAGE
2
-»V
•*V
v
IJV
VOL
VQH
•OIV
FIGURE
3
- OUTPUT SHORT CIRCUIT CURRENT
vce
•
FIGURE
4
- OUTPUT RESISTANCE (POWER-OFF)
*M
IJV
•0S-
ftl 6
'OS*
mA
Mti
•OIV
FIGURE
5
FIGURE
- POWER-SUPPLY CURRENTS
6
- SWITCHING RESPONSE
-»V„
•IJV
^ISpF
Jl
I
„jfF
v
•OIV
\
-0V
'PIH
-
SOX
ITMl
-'TLH
rTHl •"< <TLH
v«
MOTOROLA LINEAR/INTERFACE DEVICES
5-116
86
Ko»«
10%
l» 9CT%
MC1408
TYPICAL CHARACTERISTICS
(Ta * +25°C
unless otherwise noted.)
7 - TRANSFER CHARACTERISTICS
hiui POWER-SUPPLY VOLTAGE
FIGURE
12
•
FIGURE
<
a
1
l?V
\
1
o
bU
EE"
Vi
O
p-
£
-3
_ t-L> £.
o
3
OB
5
£
a
3
-30
» Vcc '9 V
V| •
_y*
1
en
y
^_
-9
1
•
3
°
s.o
19V
1
>
I
3
U
>v
1
<
'0S*
Hi
1
1
«I2
.90
z
1
\ V C C'VEE'i9V
P"»
- SHORT-CIRCUIT OUTPUT CURRENT
vanus TEMPERATURE
1
•
8
u
0,V
JL
1vee-9V
-6.0
IQS-
-go
it*
-12
-12
2
4
0.6
Vi„.INPUT
12
10
0.8
1.4
1.6
1
I
T.TEMPERATURECC)
VOLTAGE (VOLTS)
OUTPUT SLEW RATE
FIGURE 10 - OUTPUT VOLTAGE
LIM! TING CHARACTERISTICS
ANO CURRENT
mui LOAO CAPACITANCE
20
16
<
V\
as
u
1
,,
-12
5Z
vcc-v Ef
1.000
C|..
CAPACITANCE
-80
10.000
9\
'
-40
-MAXIMUM OPERATING TEMPERATURE
11
VOLTAGE
16
14
'cc
12
a
V
1
3k
3
10
1.0
N
—
6
3k
>
3k
II
3k
60
40
k -
i,
20
\
—\
'0
-L.
-40
Vq. OUTPUT VOLTAGE (VOITSI
venut POWER-SUPPLY
<
\
_j
<pf|
FIGURE
t
J_
-55
J
W5
»2S
T.
TEMPERATURE
125
(OCI
MOTOROLA LINEAR/INTERFACE DEVICES
5-117
87
/
_e-
\
~V0S
—
M! L0AO LINE.
-
\
19V
•20
100
\
-\
h:-J^t
.
-6
——
v\
p-
10
•125
*»5
»25
-55
2
-80
.12
MC1488
APPLICATIONS INFORMATION
FIGURE 13 - POWER SUPPLY PROTECTION
TO MEET POWER-OFF FAULT CONDITIONS
The
detail
Electronic Industries Association (EIAI RS232C specification
the requirements for the interface between data processing
equipment
snd
VCC
±
communications equipment. This standard
specifies not oniy the number and type of interface leads, but also the
voltage levers to be used. The MCI 488 quad driver and its companion
circuit, the MC1489 quad receiver, provide a complete interface system
between OTL or TTL logic levets and the RS232C defined levers. The
data
RS232C requirements
1
1
-0
»4-i. .--'
for
•-
»
1
1
"1".
-c
1
1
MC1488
is
much
FOR
Isc
versus
10
-I.
_•
1
•o
1
1
1
L
H
too
—
FIGURE 12 - SLEW RATE
"\
1
1
specification further requires that during transitions, the driver output slew rate must not exceed 30 volts per
microsecond. The inherent slew rate of the
r
-
O-T - s
Oi-
The RS232C
1
i
CAPACITANCE
mA
would he excessive
Therefore, if the system is designed to permit
low impedances to ground at the power supplies of the drivers, a
diode should be placed in each power-supply lead to prevent overheating m this fault condition
These two diodes, as shown in
Figure 13. could be used to decouple all the driver packages in a
system. (These same diodes will allow the MCI 488 to withstand
1000
momentary
'00
Standard
shorts to the
RS237B
I
»25voH
The addition
limits specified in the earlier
of the diodes also permits the
MCI 488 to withstand faults with power-supplies of
9.0 volts stated above.
*
—
o-t-T" **\
15-
These voltages ere so defined when the drivers ere
terminated with a 3000 to 7000-ohm resistor. The MC1488 meets
this voltage requirement by converting a OTL/TTL logic level into
RS232C levels with one stage of inversion.
a
i.
CI 481
O-f-O
as applied to driven are discussed herein.
The required driver voltages are defined ef between 5 and
volts in magnitude and are positive for a logic "0" and negative
a logic
6,.
—
MC14M
MC14J8
less
than the
The maximum short-circuit current -allowable under fault con
is
more than guaranteed by the previously mentioned
difions
io
10 niA output current limiting
Other Applications
The MC1488
is
an extremely versatile line driver with
of possible applications
a
myriad
Several features of the drivers enhance
this versatility:
1
Output Current Limiting
-
this
enables the circuit designer
output voltage levels independent ol power supplies
and can be accomplished by diode clamping ol the output pins
Figure 14 shows the MC1488 used as a OTL to MOS tremlator
where the high-level voltage output is clamoed one diode above
ground
The resistor divider shown is used to reduce the output
voltage below the 300 niV above ground MOS input iPrjsN Innri
to define the
fast for this requirement
The current limited output of the device
can be used to control this slew rate by connecting a capacitor to
each driver output The required capacitor can be easily determined
by using the relationship C
'OS * •iT/.W from which Fiqure I? is
derived Accoidmqiy. a 330 |iF capacitor on each output
guarantee a worst case slew rate of 30 volts per microsecond
The interface
will
driver is also required to withstand an accidental
short to any other
conduc tor in an interconnec ting cable. The worst
on any conductor would be another driver using a
plus or minus 15-volt. 5O0-mA source The MC1488 is designed to
possible signal
indefinitely withstand such a short to
all four outputs in a package
power-supply voltages are-greater than 9 volts d e.,
V CC?9 V; V EE< -9 vl ln some power-supply designs, a loss
of system power causes a low imoedance on the power suoply outputs. When this occurs a low impedance to ground would exist at
as long as the
the
power inputs
to the
MC1488
output lesistors to ground
to plus or
minus IS
If
volts, the
all
effectively shorting the
300-ohm
four outputs were then shorted
power
dissipation in these resistors
2 Power Supply Range
as can be seen liom the schematic
drawing of the drivers, the positive an<i negative driving elements
of the device are essentially. independent and do not iequire match
ing power supplies.
In fact, the positive supply can vary from a
minimum seven volts Irequired lor driving the negative pulldown
secttoni to the maximum specified 15 volts. The negative supply
can vary from approximately -2 5 volts to the minimum speolied
-IS volts. The MC1488 will drive the output to within 2 volts of
the positive or negative supplies as long as the current output limits
ere not exceeded
The combination of the current limning and
supply voltage features allow a wide combination of possible outputs within the same quad package Thus if only a portion of the
four drivers are used for driving RS232C 'mes. the remainder could
be used for OTL to MOS or even OTL to OTL translation Figure IS
shows one such combination
MOTOROLA LINEAR/INTERFACE DEVICES
5-118
88
KC1488
FIGURE
14
- MOTL/MTTLTOMOS TRANSLATOR
FIGURE
IJV
1/4
Mni«—-\
input
<—i
INPU
- LOGIC TRANSLATOR APPLICATIONS
i*-0
MOTl
f
IS
?
~T
T
*
MRTl OUTPUT
-o ; v io 'i i V
"T
T
*
MOTL OUTPUT
-0 7 V io <i 7 V
MCM88
MOS OUTPUT
WITH Vss-GNOI
—'Jo-
•>' 5V
—
MIITlOUIPur
-o; V
-12V
•12
in 10
V
V
1
10 k
MOTOROLA LINEAR/INTERFACE DEVICES
5-119
89
MOS OUTPUT
-IOVioOV
LIST OF REFERENCES
1.
Powers, J. P., AN INTRODUCTION TO FIBER OPTIC SYSTEMS
Course Notes Naval Postgraduate School, 1986.
.
2.
Wolf, H.F. and others, HANDBOOK OF FIBER OPTICS j_
THEORY AND APPLICATIONS p. 412, Garland STPM Press,
1979.
.
3.
Roberts, H. and Rando, J., "WDM ACTIVE COUPLER
FACILITATES BIDIRECTIONAL TRANSMISSION", LASER FOCUS,
V.22, p. 100, APRIL 1986.
4.
Stone, H.S.,
MICROCOMPUTER INTERFACING
Co., Inc., 1983.
5.
Gofton, P.W.
Inc., 1986.
6.
Sever, M.D., RS232 MADE EASY
1984.
7.
ADC FIBER OPTIC TRANSCEIVER EVALUATION KIT INSTRUCTION
MANUAL, ADC Fiber Optics, 1986.
8.
HP82939A Serial Interface Owner / s Manual Series 80
Hewlett-Packard Co., Inc., 1982.
9.
SPINWRITER 7700 Terminals Product Description
Information Systems Inc., 1981.
,
,
Addison-Wesley
Mastering Serial Communications
.
.
SYBEX
Prentice-Hall Inc.,
.
.
NEC
10.
AMPEX 210 Video Display Terminal Operation Manual
AMPEX Corporation, Computer Products Division, 1984.
11.
Motorola Linear Interface
.
Inc.,
/_
Linear Devices
.
Motorola
1987.
12.
Photodvne
13.
Connector i zed Active Bi-directional Coupler Data Sheet
p. 2, ADC Fiber Optics, 1986.
14.
Electronic Measurement Design Computation Catalog
p. 136, Hewlett-Packard Co., Inc., 1987.
2
2XLA Manual
,
p.
90
iv,
Photodyne Inc.
,
,
15.
ODL RS232 Fiber Optic Modem Preliminary Data Sheet
ATT,
16.
1986.
Ormond, T., " Military Fiber Optic Components
EDN .v.32. pp. 114-125, August 20 1987.
91
",
,
INITIAL DISTRIBUTION LIST
No. Copies
1.
Library, Code 0142
Naval Postgraduate School
Monterey, California 93943-5002
2
2.
Defense Technical Information Center
Cameron Station
Alexandria, Virginia 22304-6145
2
3.
Department Chairman, Code 62
Department of Electrical' and Computer Engineering
Naval Postgraduate School"
Monterey, California 93943-5000
5
4.
Professor S. Michael, Code 62Mi
Department of Electrical and Computer Engineering
Naval Postgraduate School
Monterey, California 93943-5000
1
5.
Lieutenant James W. Ryan, USN
37 Rock Avenue
Lynn, Massachusetts 01902
2
92
1
8*7 6 7
M01J
5002
tion of a ??i. impleiae nta° ptic
RS23 2 link.
•
Thesis
R9445
c.l
Ryan
Design and implementation of a fiber optic
RS232 link.