Download Presentation title goes here

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts
no text concepts found
Transcript
FEE Electronics progress
•Mezzanine manufacture progress
•FEE64 testing and VHDL progress
4th December 2009
Mezzanine manufacture
Progress
•
•
•
•
•
PCB manufacturer delayed through the processing
due to technically challenging design.
Shipped 20 to assembler ( Patronics Ltd ).
15 assembled boards delivered to DL 2/12/09.
5 assembled boards failed final quality control at
Patronics. Pads had lifted after re-work.
After visual inspection at DL.
–
–
–
–
•
•
4th December 2009
10 OK for use.
1 broken track and lifted resistor
1 solder whisker between resistors ( can repair )
3 solder on ASIC pads
Assembled to copper block and found a component
fouled. Mechanical workshops removing 0.2mm
copper to solve the problem.
Creating 5 kits with mezzanine card, mounting pins
and copper block with heat conducting foam pad in
place for despatch to RAL.
FEE64 testing and VHDL
progress
•
•
MIDAS control and acquisition system is under development as the
VHDL evolves.
Spectra taken from all four Mux readout ADCs with reference and input
ground. FWHM of 3 channels.
4th December 2009
Clock distribution
• No further work has taken place.
• Pcb layout to proceed after VHDL for acquisition complete.
• Designed for manufacture locally.
Master SYNC to clock box
FEE64 (sync master)
FEE64
Clock box
FEE64
FEE64
200Mhz clock and SYNC distribution
4th December 2009